RE: [U-Boot-Users] 440GX mfdcr/mtdcr

Duh, just answered my own question (write sdr0_cfgaddr, then read/write sdr0_cfgdata).
Never mind ... :/
-----Original Message----- From: Kerl, John [mailto:John.Kerl@Avnet.com] Sent: Tuesday, February 17, 2004 4:22 PM To: u-boot-users@lists.sourceforge.net Subject: [U-Boot-Users] 440GX mfdcr/mtdcr
Hello all,
I wonder if anyone has any advice on the following. On our upcoming 440GX board (currently being fabbed), of course one of the first things I will attempt to do, after a successful smoke test is to try to blink some LEDs. If I can do that, then probably my code path to the flash is OK, etc.
Problem is: GPIO0_OR, where I write my LEDs, is memory mapped, but the pin control which allows one to specify that a given GPIO pin is marked for output is a DCR. The DCR for GPIO pin control, sdr0_pfc0, is DCR 0x4100. mfdcr/mtdcr only allow a 10-bit operand.
Similarly affected are DCRs sdr0_cust0, sdr0_sdstp2, sdr0_cust1 and sdr0_sdstp3, all above 0x4100.
Does anyone know how one could ever possibly read/write these high-numbered DCRs?
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Kerl, John