[U-Boot] [PATCH v3 1/2] imx_watchdog: Add a header file for watchdog registers
From: Fabio Estevam fabio.estevam@freescale.com
Create fsl_wdog.h to store the watchdog registers and bit fields.
This can be useful when accesses to the watchdog block are made from other parts, such as arch/arm/ cpu code.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- Changes since v2: - None Changes since v1: - Newly introduced
drivers/watchdog/imx_watchdog.c | 14 +------------- include/fsl_wdog.h | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 13 deletions(-) create mode 100644 include/fsl_wdog.h
diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 9a77a54..0d77595 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -8,19 +8,7 @@ #include <asm/io.h> #include <watchdog.h> #include <asm/arch/imx-regs.h> - -struct watchdog_regs { - u16 wcr; /* Control */ - u16 wsr; /* Service */ - u16 wrsr; /* Reset Status */ -}; - -#define WCR_WDZST 0x01 -#define WCR_WDBG 0x02 -#define WCR_WDE 0x04 /* WDOG enable */ -#define WCR_WDT 0x08 -#define WCR_SRS 0x10 -#define SET_WCR_WT(x) (x << 8) +#include <fsl_wdog.h>
#ifdef CONFIG_IMX_WATCHDOG void hw_watchdog_reset(void) diff --git a/include/fsl_wdog.h b/include/fsl_wdog.h new file mode 100644 index 0000000..d15a70c --- /dev/null +++ b/include/fsl_wdog.h @@ -0,0 +1,18 @@ +/* + * (C) Copyright 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +struct watchdog_regs { + u16 wcr; /* Control */ + u16 wsr; /* Service */ + u16 wrsr; /* Reset Status */ +}; + +#define WCR_WDZST 0x01 +#define WCR_WDBG 0x02 +#define WCR_WDE 0x04 +#define WCR_WDT 0x08 +#define WCR_SRS 0x10 +#define SET_WCR_WT(x) (x << 8)
From: Fabio Estevam fabio.estevam@freescale.com
Since commit 623d96e89aca6("imx: wdog: correct wcr register settings") issuing a 'reset' command causes the system to hang.
Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.
This means that the watchdog on LS1021 has been working by accident as it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c. Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only revelead the endianness problem on LS102x.
In order to fix the reset hang, introduce a reset_cpu() implementation that is specific for ls102x, which accesses the watchdog WCR register in big-endian format. All that is required to reset LS102x is to clear the SRS bit.
This approach is a temporary workaround to avoid a regression for LS102x in the 2015.10 release. The proper fix is to make the watchdog driver endian-aware, so that it can work for i.MX, Vybrid and LS102x.
Reported-by: Sinan Akman sinan@writeme.com Tested-by: Sinan Akman sinan@writeme.com Reviewed-by: Wolfgang Denk wd@denx.de Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- Changes since v2: - Explain that this a temporary workaround (Tom) Changes since v1: - Do not add duplicate wdog struct (Wolfgang)
arch/arm/cpu/armv7/ls102xa/cpu.c | 15 +++++++++++++++ drivers/watchdog/Makefile | 2 +- 2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 8dd95d9..e2eb5f3 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -13,6 +13,8 @@ #include <tsec.h> #include <netdev.h> #include <fsl_esdhc.h> +#include <config.h> +#include <fsl_wdog.h>
#include "fsl_epu.h"
@@ -354,3 +356,16 @@ void smp_kick_all_cpus(void) asm volatile("sev"); } #endif + +void reset_cpu(ulong addr) +{ + struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; + + clrbits_be16(&wdog->wcr, WCR_SRS); + + while (1) { + /* + * Let the watchdog trigger + */ + } +} diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 9e9cb55..a007ae8 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -7,7 +7,7 @@
obj-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o -ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 mx7 vf610 ls102xa)) +ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 mx7 vf610)) obj-y += imx_watchdog.o endif obj-$(CONFIG_S5P) += s5p_wdt.o
Hi Tom,
On Sat, Oct 3, 2015 at 2:21 PM, Fabio Estevam festevam@gmail.com wrote:
From: Fabio Estevam fabio.estevam@freescale.com
Since commit 623d96e89aca6("imx: wdog: correct wcr register settings") issuing a 'reset' command causes the system to hang.
Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.
This means that the watchdog on LS1021 has been working by accident as it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c. Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only revelead the endianness problem on LS102x.
In order to fix the reset hang, introduce a reset_cpu() implementation that is specific for ls102x, which accesses the watchdog WCR register in big-endian format. All that is required to reset LS102x is to clear the SRS bit.
This approach is a temporary workaround to avoid a regression for LS102x in the 2015.10 release. The proper fix is to make the watchdog driver endian-aware, so that it can work for i.MX, Vybrid and LS102x.
Reported-by: Sinan Akman sinan@writeme.com Tested-by: Sinan Akman sinan@writeme.com Reviewed-by: Wolfgang Denk wd@denx.de Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Are you happy with this series?
This one fixes a regression, so it would be nice to have it applied in 2015.10.
Thanks
On Mon, Oct 12, 2015 at 12:53:12PM -0300, Fabio Estevam wrote:
Hi Tom,
On Sat, Oct 3, 2015 at 2:21 PM, Fabio Estevam festevam@gmail.com wrote:
From: Fabio Estevam fabio.estevam@freescale.com
Since commit 623d96e89aca6("imx: wdog: correct wcr register settings") issuing a 'reset' command causes the system to hang.
Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.
This means that the watchdog on LS1021 has been working by accident as it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c. Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only revelead the endianness problem on LS102x.
In order to fix the reset hang, introduce a reset_cpu() implementation that is specific for ls102x, which accesses the watchdog WCR register in big-endian format. All that is required to reset LS102x is to clear the SRS bit.
This approach is a temporary workaround to avoid a regression for LS102x in the 2015.10 release. The proper fix is to make the watchdog driver endian-aware, so that it can work for i.MX, Vybrid and LS102x.
Reported-by: Sinan Akman sinan@writeme.com Tested-by: Sinan Akman sinan@writeme.com Reviewed-by: Wolfgang Denk wd@denx.de Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Are you happy with this series?
This one fixes a regression, so it would be nice to have it applied in 2015.10.
Sorry, for some reason I thought it had been picked up already by Stefano.
Stefano, are there any other release critical imx/related changes? If not, I can pickup these two directly, otherwise put together a PR please. Or just put together a PR if you like, thanks!
On Mon, Oct 12, 2015 at 1:01 PM, Tom Rini trini@konsulko.com wrote:
Are you happy with this series?
This one fixes a regression, so it would be nice to have it applied in 2015.10.
Sorry, for some reason I thought it had been picked up already by Stefano.
Stefano, are there any other release critical imx/related changes? If not, I can pickup these two directly, otherwise put together a PR please. Or just put together a PR if you like, thanks!
Initially I thought Layerscape patches would go via York Sun's tree.
When I checked with him he said it would go via your tree: https://www.mail-archive.com/u-boot@lists.denx.de/msg187705.html
On 10/12/2015 09:06 AM, Fabio Estevam wrote:
On Mon, Oct 12, 2015 at 1:01 PM, Tom Rini trini@konsulko.com wrote:
Are you happy with this series?
This one fixes a regression, so it would be nice to have it applied in 2015.10.
Sorry, for some reason I thought it had been picked up already by Stefano.
Stefano, are there any other release critical imx/related changes? If not, I can pickup these two directly, otherwise put together a PR please. Or just put together a PR if you like, thanks!
Initially I thought Layerscape patches would go via York Sun's tree.
When I checked with him he said it would go via your tree: https://www.mail-archive.com/u-boot@lists.denx.de/msg187705.html
Tom,
There might be a confusion. Please pick it up if you think it is ready.
York
On Mon, Oct 12, 2015 at 01:06:24PM -0300, Fabio Estevam wrote:
On Mon, Oct 12, 2015 at 1:01 PM, Tom Rini trini@konsulko.com wrote:
Are you happy with this series?
This one fixes a regression, so it would be nice to have it applied in 2015.10.
Sorry, for some reason I thought it had been picked up already by Stefano.
Stefano, are there any other release critical imx/related changes? If not, I can pickup these two directly, otherwise put together a PR please. Or just put together a PR if you like, thanks!
Initially I thought Layerscape patches would go via York Sun's tree.
OK. For the record, I had this mentally filed as "generic imx/etc issue" rather than "Freescale platform specific issue".
Hi Tom,
On 12/10/2015 18:01, Tom Rini wrote:
On Mon, Oct 12, 2015 at 12:53:12PM -0300, Fabio Estevam wrote:
Hi Tom,
On Sat, Oct 3, 2015 at 2:21 PM, Fabio Estevam festevam@gmail.com wrote:
From: Fabio Estevam fabio.estevam@freescale.com
Since commit 623d96e89aca6("imx: wdog: correct wcr register settings") issuing a 'reset' command causes the system to hang.
Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.
This means that the watchdog on LS1021 has been working by accident as it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c. Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only revelead the endianness problem on LS102x.
In order to fix the reset hang, introduce a reset_cpu() implementation that is specific for ls102x, which accesses the watchdog WCR register in big-endian format. All that is required to reset LS102x is to clear the SRS bit.
This approach is a temporary workaround to avoid a regression for LS102x in the 2015.10 release. The proper fix is to make the watchdog driver endian-aware, so that it can work for i.MX, Vybrid and LS102x.
Reported-by: Sinan Akman sinan@writeme.com Tested-by: Sinan Akman sinan@writeme.com Reviewed-by: Wolfgang Denk wd@denx.de Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Are you happy with this series?
This one fixes a regression, so it would be nice to have it applied in 2015.10.
Sorry, for some reason I thought it had been picked up already by Stefano.
I missed them, as I was not in CC and I was not delegated.
Stefano, are there any other release critical imx/related changes? If not, I can pickup these two directly, otherwise put together a PR please. Or just put together a PR if you like, thanks!
There are a couple of fixes for imximage - I see you have already picked up this, so I send my PR with only the imximage fixes.
Stefano
On Sat, Oct 03, 2015 at 02:21:00PM -0300, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
Since commit 623d96e89aca6("imx: wdog: correct wcr register settings") issuing a 'reset' command causes the system to hang.
Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.
This means that the watchdog on LS1021 has been working by accident as it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c. Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only revelead the endianness problem on LS102x.
In order to fix the reset hang, introduce a reset_cpu() implementation that is specific for ls102x, which accesses the watchdog WCR register in big-endian format. All that is required to reset LS102x is to clear the SRS bit.
This approach is a temporary workaround to avoid a regression for LS102x in the 2015.10 release. The proper fix is to make the watchdog driver endian-aware, so that it can work for i.MX, Vybrid and LS102x.
Reported-by: Sinan Akman sinan@writeme.com Tested-by: Sinan Akman sinan@writeme.com Reviewed-by: Wolfgang Denk wd@denx.de Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot/master, thanks!
On Sat, Oct 03, 2015 at 02:20:59PM -0300, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
Create fsl_wdog.h to store the watchdog registers and bit fields.
This can be useful when accesses to the watchdog block are made from other parts, such as arch/arm/ cpu code.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot/master, thanks!
participants (4)
-
Fabio Estevam -
Stefano Babic -
Tom Rini -
York Sun