Removing this board because it does not build with any tool-chain that we know of.

The board fails to build with the tool-chain available at kernel.org: https://www.kernel.org/pub/tools/crosstool/files/bin/i686/4.6.3/i686-gcc-4.6...

It fails with the following errors: sh4-linux-gcc: error: command line option '-m2a' is not supported by this configuration sh4-linux-gcc: error: command line option '-m2a-nofpu' is not supported by this configuration

Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Phil Edworthy phil.edworthy@renesas.com ---

arch/sh/Kconfig | 5 - arch/sh/include/asm/cpu_sh2.h | 2 - arch/sh/include/asm/cpu_sh7264.h | 41 ------- board/renesas/rsk7264/Kconfig | 12 -- board/renesas/rsk7264/MAINTAINERS | 6 - board/renesas/rsk7264/Makefile | 7 -- board/renesas/rsk7264/lowlevel_init.S | 210 ---------------------------------- board/renesas/rsk7264/rsk7264.c | 71 ------------ configs/rsk7264_defconfig | 2 - drivers/serial/serial_sh.h | 3 +- include/configs/rsk7264.h | 74 ------------ 11 files changed, 1 insertion(+), 432 deletions(-) delete mode 100644 arch/sh/include/asm/cpu_sh7264.h delete mode 100644 board/renesas/rsk7264/Kconfig delete mode 100644 board/renesas/rsk7264/MAINTAINERS delete mode 100644 board/renesas/rsk7264/Makefile delete mode 100644 board/renesas/rsk7264/lowlevel_init.S delete mode 100644 board/renesas/rsk7264/rsk7264.c delete mode 100644 configs/rsk7264_defconfig delete mode 100644 include/configs/rsk7264.h

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 2128f23..395138e 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -34,10 +34,6 @@ config TARGET_RSK7203 bool "RSK+ 7203" select CPU_SH2A

-config TARGET_RSK7264 - bool "RSK2+SH7264" - select CPU_SH2A - config TARGET_RSK7269 bool "RSK2+SH7269" select CPU_SH2A @@ -140,7 +136,6 @@ source "board/renesas/r0p7734/Kconfig" source "board/renesas/r2dplus/Kconfig" source "board/renesas/r7780mp/Kconfig" source "board/renesas/rsk7203/Kconfig" -source "board/renesas/rsk7264/Kconfig" source "board/renesas/rsk7269/Kconfig" source "board/renesas/sh7752evb/Kconfig" source "board/renesas/sh7753evb/Kconfig" diff --git a/arch/sh/include/asm/cpu_sh2.h b/arch/sh/include/asm/cpu_sh2.h index 18a0f0b..1d0a683 100644 --- a/arch/sh/include/asm/cpu_sh2.h +++ b/arch/sh/include/asm/cpu_sh2.h @@ -20,8 +20,6 @@

#if defined(CONFIG_CPU_SH7203) # include <asm/cpu_sh7203.h> -#elif defined(CONFIG_CPU_SH7264) -# include <asm/cpu_sh7264.h> #elif defined(CONFIG_CPU_SH7269) # include <asm/cpu_sh7269.h> #else diff --git a/arch/sh/include/asm/cpu_sh7264.h b/arch/sh/include/asm/cpu_sh7264.h deleted file mode 100644 index a4a4d51..0000000 --- a/arch/sh/include/asm/cpu_sh7264.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef _ASM_CPU_SH7264_H_ -#define _ASM_CPU_SH7264_H_ - -/* Cache */ -#define CCR1 0xFFFC1000 -#define CCR CCR1 - -/* PFC */ -#define PACR 0xA4050100 -#define PBCR 0xA4050102 -#define PCCR 0xA4050104 -#define PETCR 0xA4050106 - -/* Port Data Registers */ -#define PADR 0xA4050120 -#define PBDR 0xA4050122 -#define PCDR 0xA4050124 - -/* BSC */ - -/* SDRAM controller */ - -/* SCIF */ -#define SCSMR_3 0xFFFE9800 -#define SCIF3_BASE SCSMR_3 - -/* Timer(CMT) */ -#define CMSTR 0xFFFEC000 -#define CMCSR_0 0xFFFEC002 -#define CMCNT_0 0xFFFEC004 -#define CMCOR_0 0xFFFEC006 -#define CMCSR_1 0xFFFEC008 -#define CMCNT_1 0xFFFEC00A -#define CMCOR_1 0xFFFEC00C - -/* On chip oscillator circuits */ -#define FRQCR 0xA415FF80 -#define WTCNT 0xA415FF84 -#define WTCSR 0xA415FF86 - -#endif /* _ASM_CPU_SH7264_H_ */ diff --git a/board/renesas/rsk7264/Kconfig b/board/renesas/rsk7264/Kconfig deleted file mode 100644 index 755d289..0000000 --- a/board/renesas/rsk7264/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_RSK7264 - -config SYS_BOARD - default "rsk7264" - -config SYS_VENDOR - default "renesas" - -config SYS_CONFIG_NAME - default "rsk7264" - -endif diff --git a/board/renesas/rsk7264/MAINTAINERS b/board/renesas/rsk7264/MAINTAINERS deleted file mode 100644 index f6202b7..0000000 --- a/board/renesas/rsk7264/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -RSK7264 BOARD -M: Phil Edworthy phil.edworthy@renesas.com -S: Maintained -F: board/renesas/rsk7264/ -F: include/configs/rsk7264.h -F: configs/rsk7264_defconfig diff --git a/board/renesas/rsk7264/Makefile b/board/renesas/rsk7264/Makefile deleted file mode 100644 index 7ada697..0000000 --- a/board/renesas/rsk7264/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# Copyright (C) 2011 Renesas Electronics Europe Ltd. -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := rsk7264.o -obj-y += lowlevel_init.o diff --git a/board/renesas/rsk7264/lowlevel_init.S b/board/renesas/rsk7264/lowlevel_init.S deleted file mode 100644 index eae2703..0000000 --- a/board/renesas/rsk7264/lowlevel_init.S +++ /dev/null @@ -1,210 +0,0 @@ -/* - * Copyright (C) 2011 Renesas Electronics Europe Ltd. - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (C) 2008 Nobuhiro Iwamatsu - * - * Based on board/renesas/rsk7203/lowlevel_init.S - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <config.h> - -#include <asm/processor.h> -#include <asm/macro.h> - - .global lowlevel_init - - .text - .align 2 - -lowlevel_init: - /* Cache setting */ - write32 CCR1_A ,CCR1_D - - /* io_set_cpg */ - write8 STBCR3_A, STBCR3_D - write8 STBCR4_A, STBCR4_D - write8 STBCR5_A, STBCR5_D - write8 STBCR6_A, STBCR6_D - write8 STBCR7_A, STBCR7_D - write8 STBCR8_A, STBCR8_D - - /* ConfigurePortPins */ - - /* Leaving LED1 ON for sanity test */ - write16 PJCR1_A, PJCR1_D1 - write16 PJCR2_A, PJCR2_D - write16 PJIOR0_A, PJIOR0_D1 - write16 PJDR0_A, PJDR0_D - write16 PJPR0_A, PJPR0_D - - /* Configure EN_PIN & RS_PIN */ - write16 PGCR2_A, PGCR2_D - write16 PGIOR0_A, PGIOR0_D - - /* Configure the port pins connected to UART */ - write16 PJCR1_A, PJCR1_D2 - write16 PJIOR0_A, PJIOR0_D2 - - /* Configure Operating Frequency */ - write16 WTCSR_A, WTCSR_D0 - write16 WTCSR_A, WTCSR_D1 - write16 WTCNT_A, WTCNT_D - - /* Control of RESBANK */ - write16 IBNR_A, IBNR_D - /* Enable SCIF3 module */ - write16 STBCR4_A, STBCR4_D - - /* Set clock mode*/ - write16 FRQCR_A, FRQCR_D - - /* Configure Bus And Memory */ -init_bsc_cs0: - -pfc_settings: - write16 PCCR2_A, PCCR2_D - write16 PCCR1_A, PCCR1_D - write16 PCCR0_A, PCCR0_D - - write16 PBCR0_A, PBCR0_D - write16 PBCR1_A, PBCR1_D - write16 PBCR2_A, PBCR2_D - write16 PBCR3_A, PBCR3_D - write16 PBCR4_A, PBCR4_D - write16 PBCR5_A, PBCR5_D - - write16 PDCR0_A, PDCR0_D - write16 PDCR1_A, PDCR1_D - write16 PDCR2_A, PDCR2_D - write16 PDCR3_A, PDCR3_D - - write32 CS0WCR_A, CS0WCR_D - write32 CS0BCR_A, CS0BCR_D - -init_bsc_cs2: - write16 PJCR0_A, PJCR0_D - write32 CS2WCR_A, CS2WCR_D - -init_sdram: - write32 CS3BCR_A, CS3BCR_D - write32 CS3WCR_A, CS3WCR_D - write32 SDCR_A, SDCR_D - write32 RTCOR_A, RTCOR_D - write32 RTCSR_A, RTCSR_D - - /* wait 200us */ - mov.l REPEAT_D, r3 - mov #0, r2 -repeat0: - add #1, r2 - cmp/hs r3, r2 - bf repeat0 - nop - - mov.l SDRAM_MODE, r1 - mov #0, r0 - mov.l r0, @r1 - - nop - rts - - .align 4 - -CCR1_A: .long CCR1 -CCR1_D: .long 0x0000090B -FRQCR_A: .long 0xFFFE0010 -FRQCR_D: .word 0x1003 -.align 2 -STBCR3_A: .long 0xFFFE0408 -STBCR3_D: .long 0x00000002 -STBCR4_A: .long 0xFFFE040C -STBCR4_D: .word 0x0000 -.align 2 -STBCR5_A: .long 0xFFFE0410 -STBCR5_D: .long 0x00000010 -STBCR6_A: .long 0xFFFE0414 -STBCR6_D: .long 0x00000002 -STBCR7_A: .long 0xFFFE0418 -STBCR7_D: .long 0x0000002A -STBCR8_A: .long 0xFFFE041C -STBCR8_D: .long 0x0000007E -PJCR1_A: .long 0xFFFE390C -PJCR1_D1: .word 0x0000 -PJCR1_D2: .word 0x0022 -PJCR2_A: .long 0xFFFE390A -PJCR2_D: .word 0x0000 -.align 2 -PJIOR0_A: .long 0xFFFE3912 -PJIOR0_D1: .word 0x0FC0 -PJIOR0_D2: .word 0x0FE0 -PJDR0_A: .long 0xFFFE3916 -PJDR0_D: .word 0x0FBF -.align 2 -PJPR0_A: .long 0xFFFE391A -PJPR0_D: .long 0x00000FBF -PGCR2_A: .long 0xFFFE38CA -PGCR2_D: .word 0x0000 -.align 2 -PGIOR0_A: .long 0xFFFE38D2 -PGIOR0_D: .word 0x03F0 -.align 2 -WTCSR_A: .long 0xFFFE0000 -WTCSR_D0: .word 0x0000 -WTCSR_D1: .word 0x0000 -WTCNT_A: .long 0xFFFE0002 -WTCNT_D: .word 0x0000 -.align 2 -PCCR0_A: .long 0xFFFE384E -PDCR0_A: .long 0xFFFE386E -PDCR1_A: .long 0xFFFE386C -PDCR2_A: .long 0xFFFE386A -PDCR3_A: .long 0xFFFE3868 -PBCR0_A: .long 0xFFFE382E -PBCR1_A: .long 0xFFFE382C -PBCR2_A: .long 0xFFFE382A -PBCR3_A: .long 0xFFFE3828 -PBCR4_A: .long 0xFFFE3826 -PBCR5_A: .long 0xFFFE3824 -PCCR0_D: .word 0x1111 -PDCR0_D: .word 0x1111 -PDCR1_D: .word 0x1111 -PDCR2_D: .word 0x1111 -PDCR3_D: .word 0x1111 -PBCR0_D: .word 0x1110 -PBCR1_D: .word 0x1111 -PBCR2_D: .word 0x1111 -PBCR3_D: .word 0x1111 -PBCR4_D: .word 0x1111 -PBCR5_D: .word 0x0111 -.align 2 -CS0WCR_A: .long 0xFFFC0028 -CS0WCR_D: .long 0x00000B41 -CS0BCR_A: .long 0xFFFC0004 -CS0BCR_D: .long 0x10000400 -PJCR0_A: .long 0xFFFE390E -PJCR0_D: .word 0x3300 -.align 2 -CS2WCR_A: .long 0xFFFC0030 -CS2WCR_D: .long 0x00000B01 -PCCR2_A: .long 0xFFFE384A -PCCR2_D: .word 0x0001 -.align 2 -PCCR1_A: .long 0xFFFE384C -PCCR1_D: .word 0x1111 -.align 2 -CS3BCR_A: .long 0xFFFC0010 -CS3BCR_D: .long 0x00004400 -CS3WCR_A: .long 0xFFFC0034 -CS3WCR_D: .long 0x0000288A -SDCR_A: .long 0xFFFC004C -SDCR_D: .long 0x00000812 -RTCOR_A: .long 0xFFFC0058 -RTCOR_D: .long 0xA55A0046 -RTCSR_A: .long 0xFFFC0050 -RTCSR_D: .long 0xA55A0010 -IBNR_A: .long 0xFFFE080E -IBNR_D: .word 0x0000 -.align 2 -SDRAM_MODE: .long 0xFFFC5040 -REPEAT_D: .long 0x00000085 diff --git a/board/renesas/rsk7264/rsk7264.c b/board/renesas/rsk7264/rsk7264.c deleted file mode 100644 index d938b3a..0000000 --- a/board/renesas/rsk7264/rsk7264.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright (C) 2011 Renesas Electronics Europe Ltd. - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (C) 2008 Nobuhiro Iwamatsu - * - * Based on u-boot/board/rsk7264/rsk7203.c - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <net.h> -#include <netdev.h> -#include <asm/io.h> -#include <asm/processor.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - puts("BOARD: Renesas Technology RSK7264\n"); - return 0; -} - -int board_init(void) -{ - return 0; -} - -int dram_init(void) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; - printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); - return 0; -} - -void led_set_state(unsigned short value) -{ -} - -/* - * The RSK board has the SMSC89218 wired up 'incorrectly'. - * Byte-swapping is necessary, and so poor performance is inevitable. - * This problem cannot evade by the swap function of CHIP, this can - * evade by software Byte-swapping. - * And this has problem by FIFO access only. pkt_data_pull/pkt_data_push - * functions necessary to solve this problem. - */ -u32 pkt_data_pull(struct eth_device *dev, u32 addr) -{ - volatile u16 *addr_16 = (u16 *)(dev->iobase + addr); - return (u32)((swab16(*addr_16) << 16) & 0xFFFF0000)\ - | swab16(*(addr_16 + 1)); -} - -void pkt_data_push(struct eth_device *dev, u32 addr, u32 val) -{ - addr += dev->iobase; - *(volatile u16 *)(addr + 2) = swab16((u16)val); - *(volatile u16 *)(addr) = swab16((u16)(val >> 16)); -} - -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC911X - rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); -#endif - return rc; -} diff --git a/configs/rsk7264_defconfig b/configs/rsk7264_defconfig deleted file mode 100644 index aedc333..0000000 --- a/configs/rsk7264_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_SH=y -CONFIG_TARGET_RSK7264=y diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 941e6ed..8cefa65 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -188,8 +188,7 @@ struct uart_port { #elif defined(CONFIG_CPU_SH7201) || \ defined(CONFIG_CPU_SH7203) || \ defined(CONFIG_CPU_SH7206) || \ - defined(CONFIG_CPU_SH7263) || \ - defined(CONFIG_CPU_SH7264) + defined(CONFIG_CPU_SH7263) # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ # define SCSPTR1 0xfffe8820 /* 16 bit SCIF */ # define SCSPTR2 0xfffe9020 /* 16 bit SCIF */ diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h deleted file mode 100644 index 2ecf785..0000000 --- a/include/configs/rsk7264.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Configuation settings for the Renesas RSK2+SH7264 board - * - * Copyright (C) 2011 Renesas Electronics Europe Ltd. - * Copyright (C) 2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Renesas Solutions Corp. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __RSK7264_H -#define __RSK7264_H - -#undef DEBUG -#define CONFIG_CPU_SH7264 1 -#define CONFIG_RSK7264 1 - -#ifndef _CONFIG_CMD_DEFAULT_H -# include <config_cmd_default.h> -#endif - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS "console=ttySC3,115200" -#define CONFIG_BOOTDELAY 3 -#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } - -#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ -#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ -#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ - -/* Serial */ -#define CONFIG_SCIF_CONSOLE 1 -#define CONFIG_CONS_SCIF3 1 - -/* Memory */ -/* u-boot relocated to top 256KB of ram */ -#define CONFIG_SYS_TEXT_BASE 0x0CFC0000 -#define CONFIG_SYS_SDRAM_BASE 0x0C000000 -#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) - -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) -#define CONFIG_SYS_MONITOR_LEN (128 * 1024) -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) - -/* Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 512 - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_OFFSET (128 * 1024) -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE - -/* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 36000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ -#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) - -/* Network interface */ -#define CONFIG_SMC911X -#define CONFIG_SMC911X_16_BIT -#define CONFIG_SMC911X_BASE 0x28000000 - -#endif /* __RSK7264_H */

Removing this board because it does not build with any tool-chain that we know of.

The board fails to build with the tool-chain available at kernel.org: https://www.kernel.org/pub/tools/crosstool/files/bin/i686/4.6.3/i686-gcc-4.6...

It fails with the following errors: sh4-linux-gcc: error: command line option '-m2a' is not supported by this configuration sh4-linux-gcc: error: command line option '-m2a-nofpu' is not supported by this configuration

Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Nobuhiro Iwamatsu iwamatsu.nobuhiro@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org ---

MAKEALL | 1 - README | 1 - arch/sh/Kconfig | 13 --- arch/sh/cpu/sh2/Makefile | 12 -- arch/sh/cpu/sh2/config.mk | 17 --- arch/sh/cpu/sh2/cpu.c | 85 --------------- arch/sh/cpu/sh2/interrupts.c | 23 ---- arch/sh/cpu/sh2/start.S | 65 ----------- arch/sh/cpu/sh2/watchdog.c | 24 ---- arch/sh/include/asm/cpu_sh2.h | 29 ----- arch/sh/include/asm/processor.h | 4 +- arch/sh/lib/Makefile | 4 - arch/sh/lib/time_sh2.c | 88 --------------- board/renesas/rsk7203/Kconfig | 12 -- board/renesas/rsk7203/MAINTAINERS | 7 -- board/renesas/rsk7203/Makefile | 10 -- board/renesas/rsk7203/lowlevel_init.S | 200 ---------------------------------- board/renesas/rsk7203/rsk7203.c | 70 ------------ configs/rsk7203_defconfig | 2 - include/configs/rsk7203.h | 94 ---------------- 20 files changed, 1 insertion(+), 760 deletions(-) delete mode 100644 arch/sh/cpu/sh2/Makefile delete mode 100644 arch/sh/cpu/sh2/config.mk delete mode 100644 arch/sh/cpu/sh2/cpu.c delete mode 100644 arch/sh/cpu/sh2/interrupts.c delete mode 100644 arch/sh/cpu/sh2/start.S delete mode 100644 arch/sh/cpu/sh2/watchdog.c delete mode 100644 arch/sh/include/asm/cpu_sh2.h delete mode 100644 arch/sh/lib/time_sh2.c delete mode 100644 board/renesas/rsk7203/Kconfig delete mode 100644 board/renesas/rsk7203/MAINTAINERS delete mode 100644 board/renesas/rsk7203/Makefile delete mode 100644 board/renesas/rsk7203/lowlevel_init.S delete mode 100644 board/renesas/rsk7203/rsk7203.c delete mode 100644 configs/rsk7203_defconfig delete mode 100644 include/configs/rsk7203.h

diff --git a/MAKEALL b/MAKEALL index a6e378f..06a7e93 100755 --- a/MAKEALL +++ b/MAKEALL @@ -465,7 +465,6 @@ LIST_blackfin="$(targets_by_arch blackfin)" ## SH Systems #########################################################################

-LIST_sh2="$(targets_by_cpu sh2)" LIST_sh3="$(targets_by_cpu sh3)" LIST_sh4="$(targets_by_cpu sh4)"

diff --git a/README b/README index 1ea397a..4553e64 100644 --- a/README +++ b/README @@ -191,7 +191,6 @@ Directory Hierarchy: /lib Architecture specific library files /sh Files generic to SH architecture /cpu CPU specific files - /sh2 Files specific to sh2 CPUs /sh3 Files specific to sh3 CPUs /sh4 Files specific to sh4 CPUs /lib Architecture specific library files diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index d23a952..088a3df 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -1,13 +1,6 @@ menu "SuperH architecture" depends on SH

-config CPU_SH2 - bool - -config CPU_SH2A - bool - select CPU_SH2 - config CPU_SH3 bool

@@ -30,10 +23,6 @@ config SH_32BIT choice prompt "Target select"

-config TARGET_RSK7203 - bool "RSK+ 7203" - select CPU_SH2A - config TARGET_MPR2 bool "Magic Panel Release 2 board" select CPU_SH3 @@ -112,7 +101,6 @@ config SYS_ARCH default "sh"

config SYS_CPU - default "sh2" if CPU_SH2 default "sh3" if CPU_SH3 default "sh4" if CPU_SH4

@@ -131,7 +119,6 @@ source "board/renesas/ecovec/Kconfig" source "board/renesas/r0p7734/Kconfig" source "board/renesas/r2dplus/Kconfig" source "board/renesas/r7780mp/Kconfig" -source "board/renesas/rsk7203/Kconfig" source "board/renesas/sh7752evb/Kconfig" source "board/renesas/sh7753evb/Kconfig" source "board/renesas/sh7757lcr/Kconfig" diff --git a/arch/sh/cpu/sh2/Makefile b/arch/sh/cpu/sh2/Makefile deleted file mode 100644 index a19ed5e..0000000 --- a/arch/sh/cpu/sh2/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007,2008 Nobuhiro Iwamatsu iwamatsu@nigauri.org -# Copyright (C) 2008 Renesas Solutions Corp. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -extra-y = start.o -obj-y = cpu.o interrupts.o watchdog.o diff --git a/arch/sh/cpu/sh2/config.mk b/arch/sh/cpu/sh2/config.mk deleted file mode 100644 index 12e202d..0000000 --- a/arch/sh/cpu/sh2/config.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# (C) Copyright 2007-2008 -# Nobuhiro Iwamatsu iwamatsu@nigauri.org -# -# SPDX-License-Identifier: GPL-2.0+ -# -# -ENDIANNESS += -EB - -ifdef CONFIG_CPU_SH2A -PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb -else # SH2 -PLATFORM_CPPFLAGS += -m3e -mb -endif -PLATFORM_CPPFLAGS += $(call cc-option,-mno-fdpic) - -PLATFORM_LDFLAGS += $(ENDIANNESS) diff --git a/arch/sh/cpu/sh2/cpu.c b/arch/sh/cpu/sh2/cpu.c deleted file mode 100644 index a2f856f..0000000 --- a/arch/sh/cpu/sh2/cpu.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (C) 2007,2008 Nobuhiro Iwamatsu iwamatsu@nigauri.org - * Copyright (C) 2008 Renesas Solutions Corp. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <command.h> -#include <asm/processor.h> -#include <asm/io.h> - -#define STBCR4 0xFFFE040C -#define cmt_clock_enable() do {\ - writeb(readb(STBCR4) & ~0x04, STBCR4);\ - } while (0) -#define scif0_enable() do {\ - writeb(readb(STBCR4) & ~0x80, STBCR4);\ - } while (0) -#define scif3_enable() do {\ - writeb(readb(STBCR4) & ~0x10, STBCR4);\ - } while (0) - -int checkcpu(void) -{ - puts("CPU: SH2\n"); - return 0; -} - -int cpu_init(void) -{ - /* SCIF enable */ -#if defined(CONFIG_CONS_SCIF3) - scif3_enable(); -#else - scif0_enable(); -#endif - /* CMT clock enable */ - cmt_clock_enable() ; - return 0; -} - -int cleanup_before_linux(void) -{ - disable_interrupts(); - return 0; -} - -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - disable_interrupts(); - reset_cpu(0); - return 0; -} - -void flush_cache(unsigned long addr, unsigned long size) -{ - -} - -void icache_enable(void) -{ -} - -void icache_disable(void) -{ -} - -int icache_status(void) -{ - return 0; -} - -void dcache_enable(void) -{ -} - -void dcache_disable(void) -{ -} - -int dcache_status(void) -{ - return 0; -} diff --git a/arch/sh/cpu/sh2/interrupts.c b/arch/sh/cpu/sh2/interrupts.c deleted file mode 100644 index e06f9bb..0000000 --- a/arch/sh/cpu/sh2/interrupts.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright 2007,2008 Nobuhiro Iwamatsu iwamatsu@nigauri.org - * Copyright (C) 2008 Renesas Solutions Corp. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> - -int interrupt_init(void) -{ - return 0; -} - -void enable_interrupts(void) -{ - -} - -int disable_interrupts(void) -{ - return 0; -} diff --git a/arch/sh/cpu/sh2/start.S b/arch/sh/cpu/sh2/start.S deleted file mode 100644 index ebf731a..0000000 --- a/arch/sh/cpu/sh2/start.S +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (C) 2007,2008 Nobuhiro Iwamatsu iwamatsu@nigauri.org - * Copyright (C) 2008 Renesas Solutions Corp. - - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <asm-offsets.h> -#include <config.h> - - .text - .align 2 - - .global _start -_sh_start: - .long 0x00000010 /* Ppower ON reset PC*/ - .long 0x00000000 - .long 0x00000010 /* Manual reset PC */ - .long 0x00000000 -_init: - mov.l ._lowlevel_init, r0 -100: bsrf r0 - nop - bsr 1f - nop -1: sts pr, r5 - mov.l ._reloc_dst, r4 - add #(_sh_start-1b), r5 - mov.l ._reloc_dst_end, r6 - -2: mov.l @r5+, r1 - mov.l r1, @r4 - add #4, r4 - cmp/hs r6, r4 - bf 2b - - mov.l ._bss_start, r4 - mov.l ._bss_end, r5 - mov #0, r1 - -3: mov.l r1, @r4 /* bss clear */ - add #4, r4 - cmp/hs r5, r4 - bf 3b - - mov.l ._gd_init, r13 /* global data */ - mov.l ._stack_init, r15 /* stack */ - - mov.l ._sh_generic_init, r0 - jsr @r0 - nop - -loop: - bra loop - - .align 2 - -._lowlevel_init: .long (lowlevel_init - (100b + 4)) -._reloc_dst: .long reloc_dst -._reloc_dst_end: .long reloc_dst_end -._bss_start: .long bss_start -._bss_end: .long bss_end -._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE) -._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16) -._sh_generic_init: .long sh_generic_init diff --git a/arch/sh/cpu/sh2/watchdog.c b/arch/sh/cpu/sh2/watchdog.c deleted file mode 100644 index 2edee74..0000000 --- a/arch/sh/cpu/sh2/watchdog.c +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2008,2010 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com - * Copyright (C) 2008,2010 Renesas Solutions Corp. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/processor.h> -#include <asm/system.h> - -int watchdog_init(void) -{ - return 0; -} - -void reset_cpu(unsigned long ignored) -{ - /* Address error with SR.BL=1 first. */ - trigger_address_error(); - - while (1) - ; -} diff --git a/arch/sh/include/asm/cpu_sh2.h b/arch/sh/include/asm/cpu_sh2.h deleted file mode 100644 index 1d0a683..0000000 --- a/arch/sh/include/asm/cpu_sh2.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (C) 2007,2008 Nobuhiro Iwamatsu iwamatsu@nigauri.org - * Copyright (C) 2008 Renesas Solutions Corp. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _ASM_CPU_SH2_H_ -#define _ASM_CPU_SH2_H_ - -/* cache control */ -#define CCR_CACHE_STOP 0x00000008 -#define CCR_CACHE_ENABLE 0x00000005 -#define CCR_CACHE_ICI 0x00000008 - -#define CACHE_OC_ADDRESS_ARRAY 0xf0000000 -#define CACHE_OC_WAY_SHIFT 13 -#define CACHE_OC_NUM_ENTRIES 256 -#define CACHE_OC_ENTRY_SHIFT 4 - -#if defined(CONFIG_CPU_SH7203) -# include <asm/cpu_sh7203.h> -#elif defined(CONFIG_CPU_SH7269) -# include <asm/cpu_sh7269.h> -#else -# error "Unknown SH2 variant" -#endif - -#endif /* _ASM_CPU_SH2_H_ */ diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index b07fe54..bdc1da6 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -1,8 +1,6 @@ #ifndef _ASM_SH_PROCESSOR_H_ #define _ASM_SH_PROCESSOR_H_ -#if defined(CONFIG_CPU_SH2) -# include <asm/cpu_sh2.h> -#elif defined(CONFIG_CPU_SH3) +#if defined(CONFIG_CPU_SH3) # include <asm/cpu_sh3.h> #elif defined(CONFIG_CPU_SH4) # include <asm/cpu_sh4.h> diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index f7ae4f8..0166f12 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile @@ -8,11 +8,7 @@

obj-y += board.o obj-$(CONFIG_CMD_BOOTM) += bootm.o -ifeq ($(CONFIG_CPU_SH2),y) -obj-y += time_sh2.o -else obj-y += time.o -endif obj-$(CONFIG_CMD_SH_ZIMAGEBOOT) += zimageboot.o

udivsi3-y := udivsi3_i4i-Os.o diff --git a/arch/sh/lib/time_sh2.c b/arch/sh/lib/time_sh2.c deleted file mode 100644 index 4b1f47b..0000000 --- a/arch/sh/lib/time_sh2.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright (C) 2007,2008 Nobobuhiro Iwamatsu iwamatsu@nigauri.org - * Copyright (C) 2008 Renesas Solutions Corp. - * - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/processor.h> - -#define CMT_CMCSR_INIT 0x0001 /* PCLK/32 */ -#define CMT_CMCSR_CALIB 0x0000 -#define CMT_MAX_COUNTER (0xFFFFFFFF) -#define CMT_TIMER_RESET (0xFFFF) - -static vu_long cmt0_timer; - -static void cmt_timer_start(unsigned int timer) -{ - writew(readw(CMSTR) | 0x01, CMSTR); -} - -static void cmt_timer_stop(unsigned int timer) -{ - writew(readw(CMSTR) & ~0x01, CMSTR); -} - -int timer_init(void) -{ - cmt0_timer = 0; - /* Divide clock by 32 */ - readw(CMCSR_0); - writew(CMT_CMCSR_INIT, CMCSR_0); - - /* User Device 0 only */ - cmt_timer_stop(0); - writew(CMT_TIMER_RESET, CMCOR_0); - cmt_timer_start(0); - - return 0; -} - -unsigned long long get_ticks(void) -{ - return cmt0_timer; -} - -static vu_long cmcnt = 0; -static unsigned long get_usec (void) -{ - ulong data = readw(CMCNT_0); - - if (data >= cmcnt) - cmcnt = data - cmcnt; - else - cmcnt = (CMT_TIMER_RESET - cmcnt) + data; - - if ((cmt0_timer + cmcnt) > CMT_MAX_COUNTER) - cmt0_timer = ((cmt0_timer + cmcnt) - CMT_MAX_COUNTER); - else - cmt0_timer += cmcnt; - - cmcnt = data; - return cmt0_timer; -} - -/* return msec */ -ulong get_timer(ulong base) -{ - return (get_usec() / 1000) - base; -} - -void __udelay(unsigned long usec) -{ - unsigned long end = get_usec() + usec; - - while (get_usec() < end) - continue; -} - -unsigned long get_tbclk(void) -{ - return CONFIG_SH_CMT_CLK_FREQ; -} diff --git a/board/renesas/rsk7203/Kconfig b/board/renesas/rsk7203/Kconfig deleted file mode 100644 index 10b8786..0000000 --- a/board/renesas/rsk7203/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_RSK7203 - -config SYS_BOARD - default "rsk7203" - -config SYS_VENDOR - default "renesas" - -config SYS_CONFIG_NAME - default "rsk7203" - -endif diff --git a/board/renesas/rsk7203/MAINTAINERS b/board/renesas/rsk7203/MAINTAINERS deleted file mode 100644 index 18d3663..0000000 --- a/board/renesas/rsk7203/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -RSK7203 BOARD -M: Nobuhiro Iwamatsu iwamatsu.nobuhiro@renesas.com -M: Nobuhiro Iwamatsu iwamatsu@nigauri.org -S: Maintained -F: board/renesas/rsk7203/ -F: include/configs/rsk7203.h -F: configs/rsk7203_defconfig diff --git a/board/renesas/rsk7203/Makefile b/board/renesas/rsk7203/Makefile deleted file mode 100644 index 16acfaf..0000000 --- a/board/renesas/rsk7203/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# Copyright (C) 2007,2008 Nobuhiro Iwamatsu -# Copyright (C) 2008 Renesas Solutions Corp. -# -# u-boot/board/rsk7203/Makefile -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := rsk7203.o -obj-y += lowlevel_init.o diff --git a/board/renesas/rsk7203/lowlevel_init.S b/board/renesas/rsk7203/lowlevel_init.S deleted file mode 100644 index ee472a4..0000000 --- a/board/renesas/rsk7203/lowlevel_init.S +++ /dev/null @@ -1,200 +0,0 @@ -/* - * Copyright (C) 2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Renesas Solutions Corp. - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <config.h> - -#include <asm/processor.h> -#include <asm/macro.h> - - .global lowlevel_init - - .text - .align 2 - -lowlevel_init: - /* Cache setting */ - write32 CCR1_A ,CCR1_D - - /* ConfigurePortPins */ - write16 PECRL3_A, PECRL3_D - - write16 PCCRL4_A, PCCRL4_D0 - - write16 PECRL4_A, PECRL4_D0 - - write16 PEIORL_A, PEIORL_D0 - - write16 PCIORL_A, PCIORL_D - - write16 PFCRH2_A, PFCRH2_D - - write16 PFCRH3_A, PFCRH3_D - - write16 PFCRH1_A, PFCRH1_D - - write16 PFIORH_A, PFIORH_D - - write16 PECRL1_A, PECRL1_D0 - - write16 PEIORL_A, PEIORL_D1 - - /* Configure Operating Frequency */ - write16 WTCSR_A, WTCSR_D0 - - write16 WTCSR_A, WTCSR_D1 - - write16 WTCNT_A, WTCNT_D - - /* Set clock mode*/ - write16 FRQCR_A, FRQCR_D - - /* Configure Bus And Memory */ -init_bsc_cs0: - write16 PCCRL4_A, PCCRL4_D1 - - write16 PECRL1_A, PECRL1_D1 - - write32 CMNCR_A, CMNCR_D - - write32 CS0BCR_A, CS0BCR_D - - write32 CS0WCR_A, CS0WCR_D - -init_bsc_cs1: - write16 PECRL4_A, PECRL4_D1 - - write32 CS1WCR_A, CS1WCR_D - -init_sdram: - write16 PCCRL2_A, PCCRL2_D - - write16 PCCRL4_A, PCCRL4_D2 - - write16 PCCRL1_A, PCCRL1_D - - write16 PCCRL3_A, PCCRL3_D - - write32 CS3BCR_A, CS3BCR_D - - write32 CS3WCR_A, CS3WCR_D - - write32 SDCR_A, SDCR_D - - write32 RTCOR_A, RTCOR_D - - write32 RTCSR_A, RTCSR_D - - /* wait 200us */ - mov.l REPEAT_D, r3 - mov #0, r2 -repeat0: - add #1, r2 - cmp/hs r3, r2 - bf repeat0 - nop - - mov.l SDRAM_MODE, r1 - mov #0, r0 - mov.l r0, @r1 - - nop - rts - - .align 4 - -CCR1_A: .long CCR1 -CCR1_D: .long 0x0000090B -PCCRL4_A: .long 0xFFFE3910 -PCCRL4_D0: .word 0x0000 -.align 2 -PECRL4_A: .long 0xFFFE3A10 -PECRL4_D0: .word 0x0000 -.align 2 -PECRL3_A: .long 0xFFFE3A12 -PECRL3_D: .word 0x0000 -.align 2 -PEIORL_A: .long 0xFFFE3A06 -PEIORL_D0: .word 0x1C00 -PEIORL_D1: .word 0x1C02 -PCIORL_A: .long 0xFFFE3906 -PCIORL_D: .word 0x4000 -.align 2 -PFCRH2_A: .long 0xFFFE3A8C -PFCRH2_D: .word 0x0000 -.align 2 -PFCRH3_A: .long 0xFFFE3A8A -PFCRH3_D: .word 0x0000 -.align 2 -PFCRH1_A: .long 0xFFFE3A8E -PFCRH1_D: .word 0x0000 -.align 2 -PFIORH_A: .long 0xFFFE3A84 -PFIORH_D: .word 0x0729 -.align 2 -PECRL1_A: .long 0xFFFE3A16 -PECRL1_D0: .word 0x0033 -.align 2 - - -WTCSR_A: .long 0xFFFE0000 -WTCSR_D0: .word 0xA518 -WTCSR_D1: .word 0xA51D -WTCNT_A: .long 0xFFFE0002 -WTCNT_D: .word 0x5A84 -.align 2 -FRQCR_A: .long 0xFFFE0010 -FRQCR_D: .word 0x0104 -.align 2 - -PCCRL4_D1: .word 0x0010 -PECRL1_D1: .word 0x0133 - -CMNCR_A: .long 0xFFFC0000 -CMNCR_D: .long 0x00001810 -CS0BCR_A: .long 0xFFFC0004 -CS0BCR_D: .long 0x10000400 -CS0WCR_A: .long 0xFFFC0028 -CS0WCR_D: .long 0x00000B41 -PECRL4_D1: .word 0x0100 -.align 2 -CS1WCR_A: .long 0xFFFC002C -CS1WCR_D: .long 0x00000B01 -PCCRL4_D2: .word 0x0011 -.align 2 -PCCRL3_A: .long 0xFFFE3912 -PCCRL3_D: .word 0x0011 -.align 2 -PCCRL2_A: .long 0xFFFE3914 -PCCRL2_D: .word 0x1111 -.align 2 -PCCRL1_A: .long 0xFFFE3916 -PCCRL1_D: .word 0x1010 -.align 2 -PDCRL4_A: .long 0xFFFE3990 -PDCRL4_D: .word 0x0011 -.align 2 -PDCRL3_A: .long 0xFFFE3992 -PDCRL3_D: .word 0x00011 -.align 2 -PDCRL2_A: .long 0xFFFE3994 -PDCRL2_D: .word 0x1111 -.align 2 -PDCRL1_A: .long 0xFFFE3996 -PDCRL1_D: .word 0x1000 -.align 2 -CS3BCR_A: .long 0xFFFC0010 -CS3BCR_D: .long 0x00004400 -CS3WCR_A: .long 0xFFFC0034 -CS3WCR_D: .long 0x00002892 -SDCR_A: .long 0xFFFC004C -SDCR_D: .long 0x00000809 -RTCOR_A: .long 0xFFFC0058 -RTCOR_D: .long 0xA55A0041 -RTCSR_A: .long 0xFFFC0050 -RTCSR_D: .long 0xa55a0010 - -SDRAM_MODE: .long 0xFFFC5040 -REPEAT_D: .long 0x00009C40 diff --git a/board/renesas/rsk7203/rsk7203.c b/board/renesas/rsk7203/rsk7203.c deleted file mode 100644 index 8800371..0000000 --- a/board/renesas/rsk7203/rsk7203.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (C) 2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Renesas Solutions Corp. - * - * u-boot/board/rsk7203/rsk7203.c - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <net.h> -#include <netdev.h> -#include <asm/io.h> -#include <asm/processor.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - puts("BOARD: Renesas Technology RSK7203\n"); - return 0; -} - -int board_init(void) -{ - return 0; -} - -int dram_init(void) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; - printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); - return 0; -} - -void led_set_state(unsigned short value) -{ -} - -/* - * The RSK board has the SMSC9118 wired up 'incorrectly'. - * Byte-swapping is necessary, and so poor performance is inevitable. - * This problem cannot evade by the swap function of CHIP, this can - * evade by software Byte-swapping. - * And this has problem by FIFO access only. pkt_data_pull/pkt_data_push - * functions necessary to solve this problem. - */ -u32 pkt_data_pull(struct eth_device *dev, u32 addr) -{ - volatile u16 *addr_16 = (u16 *)(dev->iobase + addr); - return (u32)((swab16(*addr_16) << 16) & 0xFFFF0000)\ - | swab16(*(addr_16 + 1)); -} - -void pkt_data_push(struct eth_device *dev, u32 addr, u32 val) -{ - addr += dev->iobase; - *(volatile u16 *)(addr + 2) = swab16((u16)val); - *(volatile u16 *)(addr) = swab16((u16)(val >> 16)); -} - -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC911X - rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); -#endif - return rc; -} diff --git a/configs/rsk7203_defconfig b/configs/rsk7203_defconfig deleted file mode 100644 index 44c0bc8..0000000 --- a/configs/rsk7203_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_SH=y -CONFIG_TARGET_RSK7203=y diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h deleted file mode 100644 index e7f7387..0000000 --- a/include/configs/rsk7203.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Configuation settings for the Renesas Technology RSK 7203 - * - * Copyright (C) 2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Renesas Solutions Corp. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __RSK7203_H -#define __RSK7203_H - -#undef DEBUG -#define CONFIG_CPU_SH7203 1 -#define CONFIG_RSK7203 1 - -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_NET -#define CONFIG_CMD_NFS -#define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_SDRAM -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_CACHE - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS "console=ttySC0,115200" -#define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */ - -#define CONFIG_VERSION_VARIABLE -#undef CONFIG_SHOW_BOOT_PROGRESS - -/* MEMORY */ -#define RSK7203_SDRAM_BASE 0x0C000000 -#define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */ -#define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024) - -#define CONFIG_SYS_TEXT_BASE 0x0C7C0000 -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ -#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ -#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ -/* Buffer size for Boot Arguments passed to kernel */ -#define CONFIG_SYS_BARGSIZE 512 -/* List of legal baudrate settings for this board */ -#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } - -/* SCIF */ -#define CONFIG_SCIF_CONSOLE 1 -#define CONFIG_CONS_SCIF0 1 - -#define CONFIG_SYS_MEMTEST_START RSK7203_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024)) - -#define CONFIG_SYS_SDRAM_BASE RSK7203_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) - -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024) -#define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1 -#define CONFIG_SYS_MONITOR_LEN (128 * 1024) -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) -#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) - -/* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#undef CONFIG_SYS_FLASH_QUIET_TEST -#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_BASE RSK7203_FLASH_BASE_1 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#define CONFIG_SYS_MAX_FLASH_SECT 64 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SECT_SIZE (64 * 1024) -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_FLASH_ERASE_TOUT 12000 -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 - -/* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ -#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) - -/* Network interface */ -#define CONFIG_SMC911X -#define CONFIG_SMC911X_16_BIT -#define CONFIG_SMC911X_BASE (0x24000000) - -#endif /* __RSK7203_H */

Removing this board because it does not build with any tool-chain that we know of.

The board fails to build with the tool-chain available at kernel.org: https://www.kernel.org/pub/tools/crosstool/files/bin/i686/4.6.3/i686-gcc-4.6...

It fails with the following error: sh4-linux-gcc: error: command line option '-m3' is not supported by this configuration

Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Mark Jonas mark.jonas@de.bosch.com ---

arch/sh/Kconfig | 5 -- board/mpr2/Kconfig | 9 --- board/mpr2/MAINTAINERS | 6 -- board/mpr2/Makefile | 19 ------ board/mpr2/lowlevel_init.S | 118 ------------------------------------ board/mpr2/mpr2.c | 148 --------------------------------------------- configs/mpr2_defconfig | 2 - include/configs/mpr2.h | 75 ----------------------- 8 files changed, 382 deletions(-) delete mode 100644 board/mpr2/Kconfig delete mode 100644 board/mpr2/MAINTAINERS delete mode 100644 board/mpr2/Makefile delete mode 100644 board/mpr2/lowlevel_init.S delete mode 100644 board/mpr2/mpr2.c delete mode 100644 configs/mpr2_defconfig delete mode 100644 include/configs/mpr2.h

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 088a3df..119db89 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -23,10 +23,6 @@ config SH_32BIT choice prompt "Target select"

-config TARGET_MPR2 - bool "Magic Panel Release 2 board" - select CPU_SH3 - config TARGET_MS7720SE bool "Support ms7720se" select CPU_SH3 @@ -109,7 +105,6 @@ config USE_PRIVATE_LIBGCC

source "board/alphaproject/ap_sh4a_4a/Kconfig" source "board/espt/Kconfig" -source "board/mpr2/Kconfig" source "board/ms7720se/Kconfig" source "board/ms7722se/Kconfig" source "board/ms7750se/Kconfig" diff --git a/board/mpr2/Kconfig b/board/mpr2/Kconfig deleted file mode 100644 index 54176e8..0000000 --- a/board/mpr2/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_MPR2 - -config SYS_BOARD - default "mpr2" - -config SYS_CONFIG_NAME - default "mpr2" - -endif diff --git a/board/mpr2/MAINTAINERS b/board/mpr2/MAINTAINERS deleted file mode 100644 index beedf8d..0000000 --- a/board/mpr2/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -MPR2 BOARD -M: Mark Jonas mark.jonas@de.bosch.com -S: Maintained -F: board/mpr2/ -F: include/configs/mpr2.h -F: configs/mpr2_defconfig diff --git a/board/mpr2/Makefile b/board/mpr2/Makefile deleted file mode 100644 index b6cdeb4..0000000 --- a/board/mpr2/Makefile +++ /dev/null @@ -1,19 +0,0 @@ -# -# Copyright (C) 2007 -# Yoshihiro Shimoda shimoda.yoshihiro@renesas.com -# -# Copyright (C) 2007 -# Nobuhiro Iwamatsu iwamatsu@nigauri.org -# -# Copyright (C) 2007 -# Kenati Technologies, Inc. -# -# (C) Copyright 2008 -# Mark Jonas mark.jonas@de.bosch.com -# -# board/mpr2/Makefile -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := mpr2.o -obj-y += lowlevel_init.o diff --git a/board/mpr2/lowlevel_init.S b/board/mpr2/lowlevel_init.S deleted file mode 100644 index 5246b63..0000000 --- a/board/mpr2/lowlevel_init.S +++ /dev/null @@ -1,118 +0,0 @@ -/* - * (C) Copyright 2008 - * Mark Jonas mark.jonas@de.bosch.com - * - * (C) Copyright 2007 - * Yoshihiro Shimoda shimoda.yoshihiro@renesas.com - * - * board/mpr2/lowlevel_init.S - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <asm/macro.h> - - .global lowlevel_init - - .text - .align 2 - -lowlevel_init: - -/* - * Set frequency multipliers and dividers in FRQCR. - */ - write16 WTCSR_A, WTCSR_D - - write16 WTCNT_A, WTCNT_D - - write16 FRQCR_A, FRQCR_D - -/* - * Setup CS0 (Flash). - */ - write32 CS0BCR_A, CS0BCR_D - - write32 CS0WCR_A, CS0WCR_D - -/* - * Setup CS3 (SDRAM). - */ - write32 CS3BCR_A, CS3BCR_D - - write32 CS3WCR_A, CS3WCR_D - - write32 SDCR_A, SDCR_D1 - - write32 RTCSR_A, RTCSR_D - - write32 RTCNT_A, RTCNT_D - - write32 RTCOR_A, RTCOR_D - - write32 SDCR_A, SDCR_D2 - - mov.l SDMR3_A, r1 - mov.l SDMR3_D, r0 - add r0, r1 - mov #0, r0 - mov.w r0, @r1 - - rts - nop - - .align 4 - -/* - * Configuration for MPR2 A.3 through A.7 - */ - -/* - * PLL Settings - */ -FRQCR_D: .word 0x1103 /* I:B:P=8:4:2 */ -WTCNT_D: .word 0x5A00 /* start counting at zero */ -WTCSR_D: .word 0xA507 /* divide by 4096 */ -.align 2 -/* - * Spansion S29GL256N11 @ 48 MHz - */ -/* 1 idle cycle inserted, normal space, 16 bit */ -CS0BCR_D: .long 0x12490400 -/* tSW=0.5ck, 6 wait cycles, NO external wait, tHW=0.5ck */ -CS0WCR_D: .long 0x00000340 - -/* - * Samsung K4S511632B-UL75 @ 48 MHz - * Micron MT48LC32M16A2-75 @ 48 MHz - */ -/* CS3BCR = 0x10004400, minimum idle cycles, SDRAM, 16 bit */ -CS3BCR_D: .long 0x10004400 -/* tRP=1ck, tRCD=1ck, CL=2, tRWL=2ck, tRC=4ck */ -CS3WCR_D: .long 0x00000091 -/* no refresh, 13 rows, 10 cols, NO bank active mode */ -SDCR_D1: .long 0x00000012 -SDCR_D2: .long 0x00000812 /* refresh */ -RTCSR_D: .long 0xA55A0008 /* 1/4, once */ -RTCNT_D: .long 0xA55A005D /* count 93 */ -RTCOR_D: .long 0xa55a005d /* count 93 */ -/* mode register CL2, burst read and SINGLE WRITE */ -SDMR3_D: .long 0x440 - -/* - * Registers - */ - -FRQCR_A: .long 0xA415FF80 -WTCNT_A: .long 0xA415FF84 -WTCSR_A: .long 0xA415FF86 - -#define BSC_BASE 0xA4FD0000 -CS0BCR_A: .long BSC_BASE + 0x04 -CS3BCR_A: .long BSC_BASE + 0x0C -CS0WCR_A: .long BSC_BASE + 0x24 -CS3WCR_A: .long BSC_BASE + 0x2C -SDCR_A: .long BSC_BASE + 0x44 -RTCSR_A: .long BSC_BASE + 0x48 -RTCNT_A: .long BSC_BASE + 0x4C -RTCOR_A: .long BSC_BASE + 0x50 -SDMR3_A: .long BSC_BASE + 0x5000 diff --git a/board/mpr2/mpr2.c b/board/mpr2/mpr2.c deleted file mode 100644 index 7449e03..0000000 --- a/board/mpr2/mpr2.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Copyright (C) 2008 - * Mark Jonas mark.jonas@de.bosch.com - * - * board/mpr2/mpr2.c - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/processor.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - puts("BOARD: MPR2\n"); - return 0; -} - -int board_init(void) -{ - /* - * For MPR2 A.3 through A.7 - */ - - /* CS2: Ethernet (0xA8000000 - 0xABFFFFFF) */ - __raw_writel(0x36db0400, CS2BCR); /* 4 idle cycles, normal space, 16 bit data bus */ - __raw_writel(0x000003c0, CS2WCR); /* (WR:8), no ext. wait */ - - /* CS4: CAN1 (0xB0000000 - 0xB3FFFFFF) */ - __raw_writel(0x00000200, CS4BCR); /* no idle cycles, normal space, 8 bit data bus */ - __raw_writel(0x00100981, CS4WCR); /* (SW:1.5 WR:3 HW:1.5), ext. wait */ - - /* CS5a: CAN2 (0xB4000000 - 0xB5FFFFFF) */ - __raw_writel(0x00000200, CS5ABCR); /* no idle cycles, normal space, 8 bit data bus */ - __raw_writel(0x00100981, CS5AWCR); /* (SW:1.5 WR:3 HW:1.5), ext. wait */ - - /* CS5b: CAN3 (0xB6000000 - 0xB7FFFFFF) */ - __raw_writel(0x00000200, CS5BBCR); /* no idle cycles, normal space, 8 bit data bus */ - __raw_writel(0x00100981, CS5BWCR); /* (SW:1.5 WR:3 HW:1.5), ext. wait */ - - /* CS6a: Rotary (0xB8000000 - 0xB9FFFFFF) */ - __raw_writel(0x00000200, CS6ABCR); /* no idle cycles, normal space, 8 bit data bus */ - __raw_writel(0x001009C1, CS6AWCR); /* (SW:1.5 WR:3 HW:1.5), no ext. wait */ - - /* set Pin Select Register A: /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND */ - __raw_writew(0xAABC, PSELA); /* 10 10 10 10 10 11 11 00 */ - - /* set Pin Select Register B: /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC, LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved */ - __raw_writew(0x3C00, PSELB); /* 0 0 11 11 0 0 00000000 */ - - /* set Pin Select Register C: SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved */ - __raw_writew(0x0000, PSELC); /* 00 00 00 00 00000000 */ - - /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved */ - __raw_writew(0x0000, PSELD); /* 0 00 00 00 00 00 00 00 0 */ - - /* OTH: (00) Other fuction - * GPO: (01) General Purpose Output - * GPI: (11) General Purpose Input - * GPI+: (10) General Purpose Input with internal pull-up - *------------------------------------------------------- - * A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5); - * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); */ - __raw_writew(0x5555, PACR); /* 01 01 01 01 01 01 01 01 */ - - /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1); - * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); */ - __raw_writew(0x5555, PBCR); /* 01 01 01 01 01 01 01 01 */ - - /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4); - * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0; */ - __raw_writew(0x5500, PCCR); /* 01 01 01 01 00 00 00 00 */ - - /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4); - * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0); */ - __raw_writew(0x5555, PDCR); /* 01 01 01 01 01 01 01 01 */ - - /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP; - * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM; */ - __raw_writew(0x2800, PECR); /* 00 10 10 00 00 00 00 00 */ - - /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3; - * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc); */ - __raw_writew(0x0002, PFCR); /* 00 00 00 00 00 00 00 10 */ - - /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ);G4 GPI(KEY2); - * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9); */ - __raw_writew(0x03D5, PGCR); /* 00 00 00 11 11 01 01 01 */ - - /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE); - * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR; */ - __raw_writew(0x0050, PHCR); /* 00 00 00 00 01 01 00 00 */ - - /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3; - * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC; */ - __raw_writew(0x0000, PJCR); /* 00 00 00 00 00 00 00 00 */ - - /* K7 (x); K6 (x); K5 (x); K4 (x) - * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nc); K0 PINT4(FLASH_READY); */ - __raw_writew(0x00FB, PKCR); /* 00 00 00 00 11 11 10 11 */ - - /* L7 TRST; L6 TMS; L5 TDO; L4 TDI; - * L3 TCK; L2 (x); L1 (x); L0 (x); */ - __raw_writew(0x0000, PLCR); /* 00 00 00 00 00 00 00 00 */ - - /* M7 GPO(CURRENT_SINK);M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED); M4 GPO(LAN_RESET); - * M3 GPO(BUZZER); M2 GPO(LCD_BL); M1 CS5B(CAN3_CS); M0 GPI+(nc); */ - __raw_writew(0x5552, PMCR); /* 01 01 01 01 01 01 00 10 */ - __raw_writeb(0xF0, PMDR); /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit, LAN_RESET=off, BUZZER=off, LCD_BL=off */ - - /* P7 (x); P6 (x); P5 (x); P4 GPO(on pullup); - * P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ);P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ); */ - __raw_writew(0x0100, PPCR); /* 00 00 00 01 00 00 00 00 */ - __raw_writeb(0x10, PPDR); /* no current flow through pullup */ - - /* R7 A25; R6 A24; R5 A23; R4 A22; - * R3 A21; R2 A20; R1 A19; R0 A0; */ - __raw_writew(0x0000, PRCR); /* 00 00 00 00 00 00 00 00 */ - - /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2); - * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; */ - __raw_writew(0x0140, PSCR); /* 00 00 00 01 01 00 00 00 */ - - /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS; - * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG); */ - __raw_writew(0x0001, PTCR); /* 00 00 00 00 00 00 00 01 */ - - /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT); - * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK; */ - __raw_writew(0x0240, PUCR); /* 00 00 00 10 01 00 00 00 */ - - /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2); - * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT); */ - __raw_writew(0x0142, PVCR); /* 00 00 00 01 01 00 00 10 */ - - return 0; -} - -int dram_init(void) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; - printf("SDRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); - return 0; -} diff --git a/configs/mpr2_defconfig b/configs/mpr2_defconfig deleted file mode 100644 index c8be987..0000000 --- a/configs/mpr2_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_SH=y -CONFIG_TARGET_MPR2=y diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h deleted file mode 100644 index 8ae497c..0000000 --- a/include/configs/mpr2.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Configuation settings for MPR2 - * - * Copyright (C) 2008 - * Mark Jonas mark.jonas@de.bosch.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __MPR2_H -#define __MPR2_H - -/* Supported commands */ -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_FLASH - -/* Default environment variables */ -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS "console=ttySC0,115200" -#define CONFIG_BOOTFILE "/boot/zImage" -#define CONFIG_LOADADDR 0x8E000000 -#define CONFIG_VERSION_VARIABLE - -/* CPU and platform */ -#define CONFIG_CPU_SH7720 1 -#define CONFIG_MPR2 1 - -/* U-Boot internals */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ -#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ -#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ -#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */ -#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN (128 * 1024) -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) - -#define CONFIG_SYS_TEXT_BASE 0x8FFC0000 - -/* Memory */ -#define CONFIG_SYS_SDRAM_BASE 0x8C000000 -#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) - -/* Flash */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_BASE 0xA0000000 -#define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 - -/* Clocks */ -#define CONFIG_SYS_CLK_FREQ 24000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */ - -/* UART */ -#define CONFIG_SCIF_CONSOLE 1 -#define CONFIG_CONS_SCIF0 1 - -#endif /* __MPR2_H */

Removing this board because it does not build with any tool-chain that we know of.

The board fails to build with the tool-chain available at kernel.org: https://www.kernel.org/pub/tools/crosstool/files/bin/i686/4.6.3/i686-gcc-4.6...

It fails with the following error: sh4-linux-gcc: error: command line option '-m3' is not supported by this configuration

Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Nobuhiro Iwamatsu iwamatsu.nobuhiro@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org

---

MAKEALL | 1 - README | 1 - arch/sh/Kconfig | 9 ---- arch/sh/cpu/sh3/Makefile | 15 ------ arch/sh/cpu/sh3/cache.c | 96 ---------------------------------- arch/sh/cpu/sh3/config.mk | 14 ----- arch/sh/cpu/sh3/cpu.c | 68 ------------------------ arch/sh/cpu/sh3/interrupts.c | 26 --------- arch/sh/cpu/sh3/start.S | 64 ----------------------- arch/sh/cpu/sh3/watchdog.c | 27 ---------- arch/sh/include/asm/cpu_sh3.h | 29 ----------- arch/sh/include/asm/cpu_sh7706.h | 50 ------------------ arch/sh/include/asm/cpu_sh7710.h | 61 ---------------------- arch/sh/include/asm/processor.h | 4 +- arch/sh/lib/Makefile | 1 - board/shmin/Kconfig | 9 ---- board/shmin/MAINTAINERS | 7 --- board/shmin/Makefile | 10 ---- board/shmin/lowlevel_init.S | 22 -------- board/shmin/shmin.c | 101 ----------------------------------- configs/shmin_defconfig | 2 - drivers/serial/serial_sh.h | 28 ++-------- include/configs/shmin.h | 110 --------------------------------------- include/sh_tmu.h | 22 -------- 24 files changed, 5 insertions(+), 772 deletions(-) delete mode 100644 arch/sh/cpu/sh3/Makefile delete mode 100644 arch/sh/cpu/sh3/cache.c delete mode 100644 arch/sh/cpu/sh3/config.mk delete mode 100644 arch/sh/cpu/sh3/cpu.c delete mode 100644 arch/sh/cpu/sh3/interrupts.c delete mode 100644 arch/sh/cpu/sh3/start.S delete mode 100644 arch/sh/cpu/sh3/watchdog.c delete mode 100644 arch/sh/include/asm/cpu_sh3.h delete mode 100644 arch/sh/include/asm/cpu_sh7706.h delete mode 100644 arch/sh/include/asm/cpu_sh7710.h delete mode 100644 board/shmin/Kconfig delete mode 100644 board/shmin/MAINTAINERS delete mode 100644 board/shmin/Makefile delete mode 100644 board/shmin/lowlevel_init.S delete mode 100644 board/shmin/shmin.c delete mode 100644 configs/shmin_defconfig delete mode 100644 include/configs/shmin.h

diff --git a/MAKEALL b/MAKEALL index 06a7e93..6320e37 100755 --- a/MAKEALL +++ b/MAKEALL @@ -465,7 +465,6 @@ LIST_blackfin="$(targets_by_arch blackfin)" ## SH Systems #########################################################################

-LIST_sh3="$(targets_by_cpu sh3)" LIST_sh4="$(targets_by_cpu sh4)"

LIST_sh="$(targets_by_arch sh)" diff --git a/README b/README index 4553e64..587dff7 100644 --- a/README +++ b/README @@ -191,7 +191,6 @@ Directory Hierarchy: /lib Architecture specific library files /sh Files generic to SH architecture /cpu CPU specific files - /sh3 Files specific to sh3 CPUs /sh4 Files specific to sh4 CPUs /lib Architecture specific library files /sparc Files generic to SPARC architecture diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index a4a32b2..9960278 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -1,9 +1,6 @@ menu "SuperH architecture" depends on SH

-config CPU_SH3 - bool - config CPU_SH4 bool

@@ -23,10 +20,6 @@ config SH_32BIT choice prompt "Target select"

-config TARGET_SHMIN - bool "SHMIN" - select CPU_SH3 - config TARGET_ESPT bool "Data Technology ESPT-GIGA board" select CPU_SH4 @@ -93,7 +86,6 @@ config SYS_ARCH default "sh"

config SYS_CPU - default "sh3" if CPU_SH3 default "sh4" if CPU_SH4

config USE_PRIVATE_LIBGCC @@ -114,6 +106,5 @@ source "board/renesas/sh7753evb/Kconfig" source "board/renesas/sh7757lcr/Kconfig" source "board/renesas/sh7763rdp/Kconfig" source "board/renesas/sh7785lcr/Kconfig" -source "board/shmin/Kconfig"

endmenu diff --git a/arch/sh/cpu/sh3/Makefile b/arch/sh/cpu/sh3/Makefile deleted file mode 100644 index 1dccaf9..0000000 --- a/arch/sh/cpu/sh3/Makefile +++ /dev/null @@ -1,15 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2007 -# Nobuhiro Iwamatsu iwamatsu@nigauri.org -# -# (C) Copyright 2007 -# Yoshihiro Shimoda shimoda.yoshihiro@renesas.com -# -# SPDX-License-Identifier: GPL-2.0+ -# - -extra-y = start.o -obj-y = cpu.o interrupts.o watchdog.o cache.o diff --git a/arch/sh/cpu/sh3/cache.c b/arch/sh/cpu/sh3/cache.c deleted file mode 100644 index 34cbbff..0000000 --- a/arch/sh/cpu/sh3/cache.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * (C) Copyright 2007 - * Yoshihiro Shimoda shimoda.yoshihiro@renesas.com - * - * (C) Copyright 2007 - * Nobobuhiro Iwamatsu iwamatsu@nigauri.org - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <command.h> -#include <asm/processor.h> -#include <asm/io.h> - -/* - * Jump to P2 area. - * When handling TLB or caches, we need to do it from P2 area. - */ -#define jump_to_P2() \ - do { \ - unsigned long __dummy; \ - __asm__ __volatile__( \ - "mov.l 1f, %0\n\t" \ - "or %1, %0\n\t" \ - "jmp @%0\n\t" \ - " nop\n\t" \ - ".balign 4\n" \ - "1: .long 2f\n" \ - "2:" \ - : "=&r" (__dummy) \ - : "r" (0x20000000)); \ - } while (0) - -/* - * Back to P1 area. - */ -#define back_to_P1() \ - do { \ - unsigned long __dummy; \ - __asm__ __volatile__( \ - "nop;nop;nop;nop;nop;nop;nop\n\t" \ - "mov.l 1f, %0\n\t" \ - "jmp @%0\n\t" \ - " nop\n\t" \ - ".balign 4\n" \ - "1: .long 2f\n" \ - "2:" \ - : "=&r" (__dummy)); \ - } while (0) - -#define CACHE_VALID 1 -#define CACHE_UPDATED 2 - -static inline void cache_wback_all(void) -{ - unsigned long addr, data, i, j; - - jump_to_P2(); - for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) { - for (j = 0; j < CACHE_OC_NUM_WAYS; j++) { - addr = CACHE_OC_ADDRESS_ARRAY - | (j << CACHE_OC_WAY_SHIFT) - | (i << CACHE_OC_ENTRY_SHIFT); - data = inl(addr); - if (data & CACHE_UPDATED) { - data &= ~CACHE_UPDATED; - outl(data, addr); - } - } - } - back_to_P1(); -} - - -#define CACHE_ENABLE 0 -#define CACHE_DISABLE 1 - -int cache_control(unsigned int cmd) -{ - unsigned long ccr; - - jump_to_P2(); - ccr = inl(CCR); - - if (ccr & CCR_CACHE_ENABLE) - cache_wback_all(); - - if (cmd == CACHE_DISABLE) - outl(CCR_CACHE_STOP, CCR); - else - outl(CCR_CACHE_INIT, CCR); - back_to_P1(); - - return 0; -} diff --git a/arch/sh/cpu/sh3/config.mk b/arch/sh/cpu/sh3/config.mk deleted file mode 100644 index dcafd19..0000000 --- a/arch/sh/cpu/sh3/config.mk +++ /dev/null @@ -1,14 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2007 -# Nobuhiro Iwamatsu iwamatsu@nigauri.org -# -# (C) Copyright 2007 -# Yoshihiro Shimoda shimoda.yoshihiro@renesas.com -# -# SPDX-License-Identifier: GPL-2.0+ -# -# -PLATFORM_CPPFLAGS += -m3 diff --git a/arch/sh/cpu/sh3/cpu.c b/arch/sh/cpu/sh3/cpu.c deleted file mode 100644 index ea0006a..0000000 --- a/arch/sh/cpu/sh3/cpu.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * (C) Copyright 2007 - * Yoshihiro Shimoda shimoda.yoshihiro@renesas.com - * - * (C) Copyright 2007 - * Nobuhiro Iwamatsu iwamatsu@nigauri.org - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <command.h> -#include <asm/processor.h> - -int checkcpu(void) -{ - puts("CPU: SH3\n"); - return 0; -} - -int cpu_init(void) -{ - return 0; -} - -int cleanup_before_linux(void) -{ - disable_interrupts(); - return 0; -} - -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - disable_interrupts(); - reset_cpu(0); - return 0; -} - -void flush_cache(unsigned long addr, unsigned long size) -{ - -} - -void icache_enable(void) -{ -} - -void icache_disable(void) -{ -} - -int icache_status(void) -{ - return 0; -} - -void dcache_enable(void) -{ -} - -void dcache_disable(void) -{ -} - -int dcache_status(void) -{ - return 0; -} diff --git a/arch/sh/cpu/sh3/interrupts.c b/arch/sh/cpu/sh3/interrupts.c deleted file mode 100644 index 80a13e0..0000000 --- a/arch/sh/cpu/sh3/interrupts.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * (C) Copyright 2007 - * Yoshihiro Shimoda shimoda.yoshihiro@renesas.com - * - * (C) Copyright 2007 - * Nobuhiro Iwamatsu iwamatsu@nigauri.org - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> - -int interrupt_init(void) -{ - return 0; -} - -void enable_interrupts(void) -{ - -} - -int disable_interrupts(void) -{ - return 0; -} diff --git a/arch/sh/cpu/sh3/start.S b/arch/sh/cpu/sh3/start.S deleted file mode 100644 index 7a934e2..0000000 --- a/arch/sh/cpu/sh3/start.S +++ /dev/null @@ -1,64 +0,0 @@ -/* - * (C) Copyright 2007 - * Yoshihiro Shimoda shimoda.yoshihiro@renesas.com - * - * (C) Copyright 2007 - * Nobuhiro Iwamatsu iwamatsu@nigauri.org - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <asm-offsets.h> -#include <config.h> - - .text - .align 2 - - .global _start -_sh_start: - mov.l ._lowlevel_init, r0 -100: bsrf r0 - nop - - bsr 1f - nop -1: sts pr, r5 - mov.l ._reloc_dst, r4 - add #(_sh_start-1b), r5 - mov.l ._reloc_dst_end, r6 - -2: mov.l @r5+, r1 - mov.l r1, @r4 - add #4, r4 - cmp/hs r6, r4 - bf 2b - - mov.l ._bss_start, r4 - mov.l ._bss_end, r5 - mov #0, r1 - -3: mov.l r1, @r4 /* bss clear */ - add #4, r4 - cmp/hs r5, r4 - bf 3b - - mov.l ._gd_init, r13 /* global data */ - mov.l ._stack_init, r15 /* stack */ - - mov.l ._sh_generic_init, r0 - jsr @r0 - nop - -loop: - bra loop - - .align 2 - -._lowlevel_init: .long (lowlevel_init - (100b + 4)) -._reloc_dst: .long reloc_dst -._reloc_dst_end: .long reloc_dst_end -._bss_start: .long bss_start -._bss_end: .long bss_end -._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE) -._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16) -._sh_generic_init: .long sh_generic_init diff --git a/arch/sh/cpu/sh3/watchdog.c b/arch/sh/cpu/sh3/watchdog.c deleted file mode 100644 index 45640ff..0000000 --- a/arch/sh/cpu/sh3/watchdog.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * (C) Copyright 2010 - * Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com - * - * (C) Copyright 2007 - * Yoshihiro Shimoda shimoda.yoshihiro@renesas.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/processor.h> -#include <asm/system.h> - -int watchdog_init(void) -{ - return 0; -} - -void reset_cpu(unsigned long ignored) -{ - /* Address error with SR.BL=1 first. */ - trigger_address_error(); - - while (1) - ; -} diff --git a/arch/sh/include/asm/cpu_sh3.h b/arch/sh/include/asm/cpu_sh3.h deleted file mode 100644 index 443aaeb..0000000 --- a/arch/sh/include/asm/cpu_sh3.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * (C) Copyright 2007-2009 Nobuhiro Iwamatsu iwamatsu@nigauri.org - * (C) Copyright 2007 Yoshihiro Shimoda shimoda.yoshihiro@renesas.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _ASM_CPU_SH3_H_ -#define _ASM_CPU_SH3_H_ - -/* cache control */ -#define CCR_CACHE_STOP 0x00000008 -#define CCR_CACHE_ENABLE 0x00000005 -#define CCR_CACHE_ICI 0x00000008 - -#define CACHE_OC_ADDRESS_ARRAY 0xf0000000 -#define CACHE_OC_WAY_SHIFT 13 -#define CACHE_OC_NUM_ENTRIES 256 -#define CACHE_OC_ENTRY_SHIFT 4 - -#if defined(CONFIG_CPU_SH7706) -#include <asm/cpu_sh7706.h> -#elif defined(CONFIG_CPU_SH7710) -#include <asm/cpu_sh7710.h> -#else -#error "Unknown SH3 variant" -#endif - -#endif /* _ASM_CPU_SH3_H_ */ diff --git a/arch/sh/include/asm/cpu_sh7706.h b/arch/sh/include/asm/cpu_sh7706.h deleted file mode 100644 index 8066ff7..0000000 --- a/arch/sh/include/asm/cpu_sh7706.h +++ /dev/null @@ -1,50 +0,0 @@ -#ifndef _ASM_CPU_SH7706_H_ -#define _ASM_CPU_SH7706_H_ - -#define CACHE_OC_NUM_WAYS 4 -#define CCR_CACHE_INIT 0x0000000D - -/* MMU and Cache control */ -#define MMUCR 0xFFFFFFE0 -#define CCR 0xFFFFFFEC - -/* PFC */ -#define PACR 0xA4050100 -#define PBCR 0xA4050102 -#define PCCR 0xA4050104 -#define PETCR 0xA4050106 - -/* Port Data Registers */ -#define PADR 0xA4050120 -#define PBDR 0xA4050122 -#define PCDR 0xA4050124 - -/* BSC */ -#define FRQCR 0xffffff80 -#define BCR1 0xffffff60 -#define BCR2 0xffffff62 -#define WCR1 0xffffff64 -#define WCR2 0xffffff66 -#define MCR 0xffffff68 - -/* SDRAM controller */ -#define DCR 0xffffff6a -#define RTCSR 0xffffff6e -#define RTCNT 0xffffff70 -#define RTCOR 0xffffff72 -#define RFCR 0xffffff74 -#define SDMR 0xFFFFD000 -#define CS3_R 0xFFFFE460 - -/* SCIF */ -#define SCSMR_2 0xA4000150 -#define SCIF0_BASE SCSMR_2 - -/* Timer */ -#define TMU_BASE 0xFFFFFE90 - -/* On chip oscillator circuits */ -#define WTCNT 0xFFFFFF84 -#define WTCSR 0xFFFFFF86 - -#endif /* _ASM_CPU_SH7706_H_ */ diff --git a/arch/sh/include/asm/cpu_sh7710.h b/arch/sh/include/asm/cpu_sh7710.h deleted file mode 100644 index e4ecef7..0000000 --- a/arch/sh/include/asm/cpu_sh7710.h +++ /dev/null @@ -1,61 +0,0 @@ -#ifndef _ASM_CPU_SH7710_H_ -#define _ASM_CPU_SH7710_H_ - -#define CACHE_OC_NUM_WAYS 4 -#define CCR_CACHE_INIT 0x0000000D - -/* MMU and Cache control */ -#define MMUCR 0xFFFFFFE0 -#define CCR 0xFFFFFFEC - -/* PFC */ -#define PACR 0xA4050100 -#define PBCR 0xA4050102 -#define PCCR 0xA4050104 -#define PETCR 0xA4050106 - -/* Port Data Registers */ -#define PADR 0xA4050120 -#define PBDR 0xA4050122 -#define PCDR 0xA4050124 - -/* BSC */ -#define CMNCR 0xA4FD0000 -#define CS0BCR 0xA4FD0004 -#define CS2BCR 0xA4FD0008 -#define CS3BCR 0xA4FD000C -#define CS4BCR 0xA4FD0010 -#define CS5ABCR 0xA4FD0014 -#define CS5BBCR 0xA4FD0018 -#define CS6ABCR 0xA4FD001C -#define CS6BBCR 0xA4FD0020 -#define CS0WCR 0xA4FD0024 -#define CS2WCR 0xA4FD0028 -#define CS3WCR 0xA4FD002C -#define CS4WCR 0xA4FD0030 -#define CS5AWCR 0xA4FD0034 -#define CS5BWCR 0xA4FD0038 -#define CS6AWCR 0xA4FD003C -#define CS6BWCR 0xA4FD0040 - -/* SDRAM controller */ -#define SDCR 0xA4FD0044 -#define RTCSR 0xA4FD0048 -#define RTCNT 0xA4FD004C -#define RTCOR 0xA4FD0050 - -/* SCIF */ -#define SCSMR_0 0xA4400000 -#define SCIF0_BASE SCSMR_0 -#define SCSMR_0 0xA4410000 -#define SCIF1_BASE SCSMR_1 - -/* Timer */ -#define TMU_BASE 0xA412FE90 - -/* On chip oscillator circuits */ -#define FRQCR 0xA415FF80 -#define WTCNT 0xA415FF84 -#define WTCSR 0xA415FF86 - -#endif /* _ASM_CPU_SH7710_H_ */ diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index bdc1da6..ca2a81b 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -1,8 +1,6 @@ #ifndef _ASM_SH_PROCESSOR_H_ #define _ASM_SH_PROCESSOR_H_ -#if defined(CONFIG_CPU_SH3) -# include <asm/cpu_sh3.h> -#elif defined(CONFIG_CPU_SH4) +#if defined(CONFIG_CPU_SH4) # include <asm/cpu_sh4.h> #endif #endif diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index 0166f12..f5c300c 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile @@ -14,7 +14,6 @@ obj-$(CONFIG_CMD_SH_ZIMAGEBOOT) += zimageboot.o udivsi3-y := udivsi3_i4i-Os.o

ifneq ($(CONFIG_CC_OPTIMIZE_FOR_SIZE),y) -udivsi3-$(CONFIG_CPU_SH3) := udivsi3_i4i.o udivsi3-$(CONFIG_CPU_SH4) := udivsi3_i4i.o endif udivsi3-y += udivsi3.o diff --git a/board/shmin/Kconfig b/board/shmin/Kconfig deleted file mode 100644 index 467580c..0000000 --- a/board/shmin/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_SHMIN - -config SYS_BOARD - default "shmin" - -config SYS_CONFIG_NAME - default "shmin" - -endif diff --git a/board/shmin/MAINTAINERS b/board/shmin/MAINTAINERS deleted file mode 100644 index 5dee37b..0000000 --- a/board/shmin/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -SHMIN BOARD -M: Nobuhiro Iwamatsu iwamatsu.nobuhiro@renesas.com -M: Nobuhiro Iwamatsu iwamatsu@nigauri.org -S: Maintained -F: board/shmin/ -F: include/configs/shmin.h -F: configs/shmin_defconfig diff --git a/board/shmin/Makefile b/board/shmin/Makefile deleted file mode 100644 index daf36de..0000000 --- a/board/shmin/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# Copyright (C) 2010 Nobuhiro Iwamatsu -# Copyright (C) 2008 Renesas Solutions Corp. -# -# u-boot/board/shmin/Makefile -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := shmin.o -obj-y += lowlevel_init.o diff --git a/board/shmin/lowlevel_init.S b/board/shmin/lowlevel_init.S deleted file mode 100644 index 53b3123..0000000 --- a/board/shmin/lowlevel_init.S +++ /dev/null @@ -1,22 +0,0 @@ -/* - * (C) Copyright 2008, 2010 Nobuhiro Iwamatsu iwamatsu@nigauri.org - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> - -#include <asm/processor.h> -#include <asm/macro.h> - - - .global lowlevel_init - - .text - .align 2 - -lowlevel_init: - /* Use setting of original bootloader */ - rts - nop - .align 2 diff --git a/board/shmin/shmin.c b/board/shmin/shmin.c deleted file mode 100644 index 74d1e39..0000000 --- a/board/shmin/shmin.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 2007 - 2010 - * Nobuhiro Iwamatsu iwamatsu@nigauri.org - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. - * - * board/shmin/shmin.c - * - * SPDX-License-Identifier: GPL-2.0+ - * - * Copy board_flash_get_legacy() from board/freescale/m54455evb/m54455evb.c - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/processor.h> -#include <netdev.h> - -int checkboard(void) -{ - puts("BOARD: T-SH7706LAN "); - if(readb(0xb0008006) == 0xab) - puts("v2\n"); - else - puts("v1\n"); - return 0; -} - -int board_init(void) -{ - writew(0x2980, BCR2); - return 0; -} - -int dram_init(void) -{ - DECLARE_GLOBAL_DATA_PTR; - - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; - printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); - return 0; -} - -int board_eth_init(bd_t *bis) -{ - return ne2k_register(); -} - -void led_set_state(unsigned short value) -{ - -} - -#if defined(CONFIG_FLASH_CFI_LEGACY) -#include <flash.h> -ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) -{ - int sect[] = CONFIG_SYS_ATMEL_SECT; - int sectsz[] = CONFIG_SYS_ATMEL_SECTSZ; - int i, j, k; - - if (base != CONFIG_SYS_ATMEL_BASE) - return 0; - - info->flash_id = 0x01000000; - info->portwidth = 1; - info->chipwidth = 1; - info->buffer_size = 1; - info->erase_blk_tout = 16384; - info->write_tout = 2; - info->buffer_write_tout = 5; - info->vendor = 0xFFF0; /* CFI_CMDSET_AMD_LEGACY */ - info->cmd_reset = 0x00F0; - info->interface = FLASH_CFI_X8; - info->legacy_unlock = 0; - info->manufacturer_id = (u16) ATM_MANUFACT; - info->device_id = ATM_ID_LV040; - info->device_id2 = 0; - info->ext_addr = 0; - info->cfi_version = 0x3133; - info->cfi_offset = 0x0000; - info->addr_unlock1 = 0x00000555; - info->addr_unlock2 = 0x000002AA; - info->name = "CFI conformant"; - info->size = 0; - info->sector_count = CONFIG_SYS_ATMEL_TOTALSECT; - info->start[0] = base; - - for (k = 0, i = 0; i < CONFIG_SYS_ATMEL_REGION; i++) { - info->size += sect[i] * sectsz[i]; - for (j = 0; j < sect[i]; j++, k++) { - info->start[k + 1] = info->start[k] + sectsz[i]; - info->protect[k] = 0; - } - } - - return 1; -} -#endif /* CONFIG_FLASH_CFI_LEGACY */ diff --git a/configs/shmin_defconfig b/configs/shmin_defconfig deleted file mode 100644 index 74c3550..0000000 --- a/configs/shmin_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_SH=y -CONFIG_TARGET_SHMIN=y diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 5f3473f..4c2f2e9 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -19,8 +19,7 @@ struct uart_port { #include <asm/regs267x.h> #endif

-#if defined(CONFIG_CPU_SH7706) || \ - defined(CONFIG_CPU_SH7707) || \ +#if defined(CONFIG_CPU_SH7707) || \ defined(CONFIG_CPU_SH7708) || \ defined(CONFIG_CPU_SH7709) # define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */ @@ -72,12 +71,6 @@ struct uart_port { # define SCSPTR2 0xfe620024 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* overrun error bit */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ -#elif defined(CONFIG_CPU_SH7710) || defined(CONFIG_CPU_SH7712) -# define SCSPTR0 0xA4400000 /* 16 bit SCIF */ -# define SCIF_ORER 0x0001 /* overrun error bit */ -# define PACR 0xa4050100 -# define PBCR 0xa4050102 -# define SCSCR_INIT(port) 0x3B #elif defined(CONFIG_CPU_SH7343) # define SCSPTR0 0xffe00010 /* 16 bit SCIF */ # define SCSPTR1 0xffe10010 /* 16 bit SCIF */ @@ -428,24 +421,12 @@ static inline void sci_##name##_out(struct uart_port *port,\ SCI_OUT(sci_size, sci_offset, value);\ }

-#if defined(CONFIG_CPU_SH3) || \ - defined(CONFIG_ARCH_SH7367) || \ +#if defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7377) || \ defined(CONFIG_ARCH_SH7372) || \ defined(CONFIG_SH73A0) || \ defined(CONFIG_R8A7740) -#if defined(CONFIG_CPU_SH7710) || defined(CONFIG_CPU_SH7712) -#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size,\ - sh4_sci_offset, sh4_sci_size, \ - sh3_scif_offset, sh3_scif_size, \ - sh4_scif_offset, sh4_scif_size, \ - h8_sci_offset, h8_sci_size) \ - CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size,\ - sh4_scif_offset, sh4_scif_size) -#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size,\ - sh4_scif_offset, sh4_scif_size) \ - CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) -#elif defined(CONFIG_CPU_SH7705) || \ +#if defined(CONFIG_CPU_SH7705) || \ defined(CONFIG_CPU_SH7721) || \ defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7377) || \ @@ -641,8 +622,7 @@ static const struct __attribute__((packed)) { }; #endif

-#if defined(CONFIG_CPU_SH7706) || \ - defined(CONFIG_CPU_SH7707) || \ +#if defined(CONFIG_CPU_SH7707) || \ defined(CONFIG_CPU_SH7708) || \ defined(CONFIG_CPU_SH7709) static inline int sci_rxd_in(struct uart_port *port) diff --git a/include/configs/shmin.h b/include/configs/shmin.h deleted file mode 100644 index 4d38f6c..0000000 --- a/include/configs/shmin.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR) - * - * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu iwamatsu@nigauri.org - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __SHMIN_H -#define __SHMIN_H - -#define CONFIG_CPU_SH7706 1 -/* T-SH7706LAN */ -#define CONFIG_SHMIN 1 -/* T-SH7706LSR*/ -/* #define CONFIG_T_SH7706LSR 1 */ - -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_SDRAM -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_NFS -#define CONFIG_CMD_ENV -#define CONFIG_CMD_SAVEENV - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS "console=ttySC0,115200" - -/* - * This board has original boot loader. If you write u-boot to 0x0, - * you should set undef. - */ -#define CONFIG_VERSION_VARIABLE -#undef CONFIG_SHOW_BOOT_PROGRESS - -/* system */ -#define SHMIN_SDRAM_BASE (0x8C000000) -#define SHMIN_FLASH_BASE_1 (0xA0000000) - -#define CONFIG_SYS_TEXT_BASE 0x8DFB0000 -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ -#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ -#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ -/* Buffer size for Boot Arguments passed to kernel */ -#define CONFIG_SYS_BARGSIZE 512 -/* List of legal baudrate settings for this board */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 } - -/* SCIF */ -#define CONFIG_SCIF_CONSOLE 1 -#define CONFIG_CONS_SCIF0 1 - -/* memory */ -#define CONFIG_SYS_SDRAM_BASE SHMIN_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) -#define CONFIG_SYS_MEMTEST_START SHMIN_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024)) - -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024) -#define CONFIG_SYS_MONITOR_BASE (SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE) -#define CONFIG_SYS_MONITOR_LEN (128 * 1024) -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) -#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) - -/* FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#undef CONFIG_SYS_FLASH_QUIET_TEST -#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_BASE SHMIN_FLASH_BASE_1 -#define CONFIG_SYS_MAX_FLASH_SECT 11 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 - -#define CONFIG_FLASH_CFI_LEGACY -#define CONFIG_SYS_ATMEL_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_ATMEL_TOTALSECT CONFIG_SYS_MAX_FLASH_SECT -#define CONFIG_SYS_ATMEL_REGION 4 -#define CONFIG_SYS_ATMEL_SECT {1, 2, 1, 7} -#define CONFIG_SYS_ATMEL_SECTSZ {0x4000, 0x2000, 0x8000, 0x10000} - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SECT_SIZE (64 * 1024) -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE - -#ifdef CONFIG_T_SH7706LSR -#define CONFIG_ENV_ADDR (SHMIN_FLASH_BASE_1 + 70000) -#else -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#endif - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 - -/* Board Clock */ -#ifdef CONFIG_T_SH7706LSR -#define CONFIG_SYS_CLK_FREQ 40000000 -#else -#define CONFIG_SYS_CLK_FREQ 33333333 -#endif /* CONFIG_T_SH7706LSR */ -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 - -/* Network device */ -#define CONFIG_DRIVER_NE2000 -#define CONFIG_DRIVER_NE2000_BASE (0xb0000300) - -#endif /* __SHMIN_H */ diff --git a/include/sh_tmu.h b/include/sh_tmu.h index 97d578d..f4e8c3e 100644 --- a/include/sh_tmu.h +++ b/include/sh_tmu.h @@ -25,28 +25,6 @@

#include <asm/types.h>

-#if defined(CONFIG_CPU_SH3) -struct tmu_regs { - u8 tocr; - u8 reserved0; - u8 tstr; - u8 reserved1; - u32 tcor0; - u32 tcnt0; - u16 tcr0; - u16 reserved2; - u32 tcor1; - u32 tcnt1; - u16 tcr1; - u16 reserved3; - u32 tcor2; - u32 tcnt2; - u16 tcr2; - u16 reserved4; - u32 tcpr2; -}; -#endif /* CONFIG_CPU_SH3 */ - #if defined(CONFIG_CPU_SH4) || defined(CONFIG_RMOBILE) struct tmu_regs { u32 reserved;