[U-Boot] [PATCH v2 0/2] arm, da85x: updates for the ipam390 board

enable the RBL/UBL ECC layout through CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC define
see for more info: http://processors.wiki.ti.com/index.php/DM365_Nand_ECC_layout
and use this on the ipam390 board. Also do some minor changes for this board:
- update default environment - change A2CR to correct value for UART boot mode - adapt cs3cfg timings for nand - change LED bootmode signalization
- changes for v2: - patch: nand, davinci: add special UBL ecc position - add comment from Scott Wood: - move if/else/end to a more readable place
Heiko Schocher (2): nand, davinci: add special UBL ecc position arm, da85x: update for the ipam390 board
board/Barix/ipam390/ipam390-ais-uart.cfg | 2 +- board/Barix/ipam390/ipam390.c | 29 ++++++++------------------ drivers/mtd/nand/davinci_nand.c | 12 +++++++++++ include/configs/ipam390.h | 35 ++++++++++++++++++++------------ 4 Dateien geändert, 44 Zeilen hinzugefügt(+), 34 Zeilen entfernt(-)
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Scott Wood scottwood@freescale.com

enable the RBL/UBL ECC layout through CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC define
see for more info: http://processors.wiki.ti.com/index.php/DM365_Nand_ECC_layout
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Scott Wood scottwood@freescale.com
--- - changes for v2: add comment from Scott Wood: - move if/else/end to a more readable place --- drivers/mtd/nand/davinci_nand.c | 12 ++++++++++++ 1 Datei geändert, 12 Zeilen hinzugefügt(+)
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index d8bb5d3..5b17d7b 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -266,6 +266,17 @@ static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, static struct nand_ecclayout nand_davinci_4bit_layout_oobfirst = { #if defined(CONFIG_SYS_NAND_PAGE_2K) .eccbytes = 40, +#ifdef CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC + .eccpos = { + 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, + 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, + 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, + 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, + }, + .oobfree = { + {2, 4}, {16, 6}, {32, 6}, {48, 6}, + }, +#else .eccpos = { 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, @@ -276,6 +287,7 @@ static struct nand_ecclayout nand_davinci_4bit_layout_oobfirst = { .oobfree = { {.offset = 2, .length = 22, }, }, +#endif /* #ifdef CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC */ #elif defined(CONFIG_SYS_NAND_PAGE_4K) .eccbytes = 80, .eccpos = {

On Fri, Sep 06, 2013 at 05:21:23AM +0200, Heiko Schocher wrote:
enable the RBL/UBL ECC layout through CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC define
see for more info: http://processors.wiki.ti.com/index.php/DM365_Nand_ECC_layout
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Scott Wood scottwood@freescale.com
Applied to u-boot-ti/master, thanks!

- switch to correct ecc layout used by the RBL enable CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC - update default environment - change A2CR to correct value for UART boot mode - adapt cs3cfg timings for nand - change LED bootmode signalization
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com --- - no changes for v2
board/Barix/ipam390/ipam390-ais-uart.cfg | 2 +- board/Barix/ipam390/ipam390.c | 29 ++++++++------------------ include/configs/ipam390.h | 35 ++++++++++++++++++++------------ 3 Dateien geändert, 32 Zeilen hinzugefügt(+), 34 Zeilen entfernt(-)
diff --git a/board/Barix/ipam390/ipam390-ais-uart.cfg b/board/Barix/ipam390/ipam390-ais-uart.cfg index e1a99f2..709cf23 100644 --- a/board/Barix/ipam390/ipam390-ais-uart.cfg +++ b/board/Barix/ipam390/ipam390-ais-uart.cfg @@ -109,7 +109,7 @@ CLK2XSRC = 0x00000000 ;NANDFCR = 0x00000000 [EMIF25ASYNC] A1CR = 0x00000000 -A2CR = 0x3FFFFFFE +A2CR = 0x04202110 A3CR = 0x00000000 A4CR = 0x00000000 NANDFCR = 0x00000012 diff --git a/board/Barix/ipam390/ipam390.c b/board/Barix/ipam390/ipam390.c index f3f276e..ae88b42 100644 --- a/board/Barix/ipam390/ipam390.c +++ b/board/Barix/ipam390/ipam390.c @@ -264,7 +264,7 @@ void show_boot_progress(int status) static int green;
if (red == 0) - red = init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_OFF); + red = init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON); if (red != CONFIG_IPAM390_GPIO_LED_RED) return; if (green == 0) @@ -277,10 +277,10 @@ void show_boot_progress(int status) case BOOTSTAGE_ID_RUN_OS: /* * set normal state - * LED Red : off + * LED Red : on * LED green: off */ - gpio_set_value(red, LED_OFF); + gpio_set_value(red, LED_ON); gpio_set_value(green, LED_OFF); break; case BOOTSTAGE_ID_MAIN_LOOP: @@ -326,23 +326,12 @@ int spl_start_uboot(void) if (!bootmode) if (ret == 0) bootmode = 1; - if (bootmode) { - /* - * Booting U-Boot - * LED Red : on - * LED green: off - */ - init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON); - init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", LED_OFF); - } else { - /* - * Booting Linux - * LED Red : off - * LED green: off - */ - init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_OFF); - init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", LED_OFF); - } + /* + * LED red : on + * LED green: off + */ + init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON); + init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", LED_OFF); return bootmode; } #endif diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index 82d4298..155663e 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -122,13 +122,13 @@ (3 << DV_DDR_SDCR_IBANK_SHIFT) | \ (2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
-#define CONFIG_SYS_DA850_CS3CFG (DAVINCI_ABCR_WSETUP(2) | \ +#define CONFIG_SYS_DA850_CS3CFG (DAVINCI_ABCR_WSETUP(1) | \ DAVINCI_ABCR_WSTROBE(2) | \ - DAVINCI_ABCR_WHOLD(1) | \ + DAVINCI_ABCR_WHOLD(0) | \ DAVINCI_ABCR_RSETUP(1) | \ - DAVINCI_ABCR_RSTROBE(4) | \ - DAVINCI_ABCR_RHOLD(0) | \ - DAVINCI_ABCR_TA(1) | \ + DAVINCI_ABCR_RSTROBE(2) | \ + DAVINCI_ABCR_RHOLD(1) | \ + DAVINCI_ABCR_TA(0) | \ DAVINCI_ABCR_ASIZE_8BIT)
@@ -161,6 +161,7 @@ #undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST +#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) @@ -173,11 +174,10 @@ CONFIG_SYS_MALLOC_LEN - \ GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_NAND_ECCPOS { \ - 24, 25, 26, 27, 28, \ - 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \ - 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \ - 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \ - 59, 60, 61, 62, 63 } + 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \ + 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \ + 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ + 54, 55, 56, 57, 58, 59, 60, 61, 62, 63} #define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCSIZE 512 @@ -230,15 +230,24 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_REVISION_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTARGS \ - "mem=128M console=ttyS0,115200n8 root=/dev/mtdblock0p4 rw noinitrd ip=dhcp" -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 2 #define CONFIG_EXTRA_ENV_SETTINGS \ + "defbootargs=setenv bootargs mem=128M console=ttyS0,115200n8 " \ + "root=/dev/mtdblock5 rw noinitrd " \ + "rootfstype=jffs2 noinitrd\0" \ "hwconfig=dsp:wake=yes\0" \ + "bootcmd=nboot kernel;run defbootargs addmtd;bootm 0xc0700000\0" \ + "bootfile=uImage\0" \ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "mtddevname=uboot-env\0" \ + "mtddevnum=0\0" \ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "u-boot=/tftpboot/ipam390/u-boot.ais\0" \ + "upd_uboot=tftp c0000000 ${u-boot};nand erase.part u-boot;" \ + "nand write c0000000 20000 ${filesize}\0" \ "setbootparms=nand read c0100000 200000 400000;" \ + "run defbootargs addmtd;" \ "spl export atags c0100000;" \ "nand erase.part bootparms;" \ "nand write c0000100 180000 20000\0" \

On Fri, Sep 06, 2013 at 05:21:24AM +0200, Heiko Schocher wrote:
- switch to correct ecc layout used by the RBL enable CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
- update default environment
- change A2CR to correct value for UART boot mode
- adapt cs3cfg timings for nand
- change LED bootmode signalization
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com
Applied to u-boot-ti/master, thanks!
participants (2)
-
Heiko Schocher
-
Tom Rini