[PATCH 2/4] pinephone_defconfig: reduce boot delay
From: Arnaud Ferraris arnaud.ferraris@collabora.com
On a cellular phone, the vast majority of users can be expected to have no serial console connected and prefer a short boot.
--- configs/pinephone_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 9967cddab9..9b51a7a100 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -10,4 +10,5 @@ CONFIG_PINEPHONE_DT_SELECTION=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_BOOTDELAY=0 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2"
From: Marius Gripsgard marius@ubports.com
--- arch/arm/mach-sunxi/Kconfig | 5 +++++ board/sunxi/board.c | 4 ++-- configs/pinephone_defconfig | 1 + 3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 8421f3b685..2bfdf7738b 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1,5 +1,10 @@ if ARCH_SUNXI
+config PINEPHONE_LEDS + bool "Notify boot status via LEDs on PinePhone" + ---help--- + LED boot notification. + config SPL_LDSCRIPT default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
diff --git a/board/sunxi/board.c b/board/sunxi/board.c index abd7e390b2..a117b89ba2 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -637,6 +638,12 @@ void sunxi_board_init(void) { int power_failed = 0;
+#ifdef CONFIG_PINEPHONE_LEDS + /* PD18:G PD19:R PD20:B */ + gpio_request(SUNXI_GPD(18), "led:green"); + gpio_direction_output(SUNXI_GPD(18), 1); +#endif + #ifdef CONFIG_SY8106A_POWER power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT); #endif diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index ff5da42ce0..9de6ab2316 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -1,6 +21,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL=y +CONFIG_PINEPHONE_LEDS=y CONFIG_MACH_SUN50I=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y CONFIG_DRAM_CLK=552
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
From: Marius Gripsgard marius@ubports.com
Hi,
This is not really Pinephone specific, actually not even sunxi specific. I see two better ways of solving this:
- We introduce some generic code to find "gpio-leds" subnodes in the DT, which have a default-state = "on" property. This could be either added to drivers/led/led_gpio.c, or in some higher level.
- We introduce a generic boot LED GPIO config symbol. Maybe there is already something, that sounds like a generally useful feature? That would have the advantage of being already enabled in the SPL (admittedly a sunxi specific problem).
Any opinions?
Cheers, Andre
arch/arm/mach-sunxi/Kconfig | 5 +++++ board/sunxi/board.c | 4 ++-- configs/pinephone_defconfig | 1 + 3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 8421f3b685..2bfdf7738b 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1,5 +1,10 @@ if ARCH_SUNXI
+config PINEPHONE_LEDS
- bool "Notify boot status via LEDs on PinePhone"
- ---help---
- LED boot notification.
config SPL_LDSCRIPT default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
diff --git a/board/sunxi/board.c b/board/sunxi/board.c index abd7e390b2..a117b89ba2 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -637,6 +638,12 @@ void sunxi_board_init(void) { int power_failed = 0;
+#ifdef CONFIG_PINEPHONE_LEDS
- /* PD18:G PD19:R PD20:B */
- gpio_request(SUNXI_GPD(18), "led:green");
- gpio_direction_output(SUNXI_GPD(18), 1);
+#endif
#ifdef CONFIG_SY8106A_POWER power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT); #endif diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index ff5da42ce0..9de6ab2316 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -1,6 +21,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL=y +CONFIG_PINEPHONE_LEDS=y CONFIG_MACH_SUN50I=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y CONFIG_DRAM_CLK=552
On Thu, Feb 25, 2021 at 3:17 PM André Przywara andre.przywara@arm.com wrote:
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
From: Marius Gripsgard marius@ubports.com
Hi,
This is not really Pinephone specific, actually not even sunxi specific. I see two better ways of solving this:
- We introduce some generic code to find "gpio-leds" subnodes in the DT,
which have a default-state = "on" property. This could be either added to drivers/led/led_gpio.c, or in some higher level.
- We introduce a generic boot LED GPIO config symbol. Maybe there is
already something, that sounds like a generally useful feature? That would have the advantage of being already enabled in the SPL (admittedly a sunxi specific problem).
Any opinions?
I believe there's already a way to use LEDs for status during the boot process using the CONFIG_LED_STATUS selection of config options. A grep of the defconfig already shows a number of boards using this. I wonder why the already existing infrastructure isn't useful.
Peter
Cheers, Andre
arch/arm/mach-sunxi/Kconfig | 5 +++++ board/sunxi/board.c | 4 ++-- configs/pinephone_defconfig | 1 + 3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 8421f3b685..2bfdf7738b 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1,5 +1,10 @@ if ARCH_SUNXI
+config PINEPHONE_LEDS
bool "Notify boot status via LEDs on PinePhone"---help---LED boot notification.config SPL_LDSCRIPT default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
diff --git a/board/sunxi/board.c b/board/sunxi/board.c index abd7e390b2..a117b89ba2 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -637,6 +638,12 @@ void sunxi_board_init(void) { int power_failed = 0;
+#ifdef CONFIG_PINEPHONE_LEDS
/* PD18:G PD19:R PD20:B */gpio_request(SUNXI_GPD(18), "led:green");gpio_direction_output(SUNXI_GPD(18), 1);+#endif
#ifdef CONFIG_SY8106A_POWER power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT); #endif diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index ff5da42ce0..9de6ab2316 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -1,6 +21,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL=y +CONFIG_PINEPHONE_LEDS=y CONFIG_MACH_SUN50I=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y CONFIG_DRAM_CLK=552
From: Icenowy Zheng icenowy@aosc.io
Previously we have known that R40 has a configuration register for its rank 1, which allows different configuration than rank 0. Reverse engineering of newest libdram of A64 from Allwinner shows that A64 has this register too. It's bit 0 (which enables dual rank in rank 0 configuration register) means a dedicated rank size setup is used for rank 1.
Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank DRAM support necessary.
Add this support. As we have gained knowledge of asymmetric dual rank, we can now allow R40 dual rank memory setup to work too.
Signed-off-by: Icenowy Zheng icenowy@aosc.io --- .../include/asm/arch-sunxi/dram_sunxi_dw.h | 11 +- arch/arm/mach-sunxi/dram_sunxi_dw.c | 100 +++++++++++++----- 2 files changed, 84 insertions(+), 27 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h index a5a7ebde44..e843c14202 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h @@ -215,12 +215,17 @@ struct sunxi_mctl_ctl_reg { #define NR_OF_BYTE_LANES (32 / BITS_PER_BYTE) /* The eight data lines (DQn) plus DM, DQS and DQSN */ #define LINES_PER_BYTE_LANE (BITS_PER_BYTE + 3) -struct dram_para { + +struct rank_para { u16 page_size; - u8 bus_full_width; - u8 dual_rank; u8 row_bits; u8 bank_bits; +}; + +struct dram_para { + u8 dual_rank; + u8 bus_full_width; + struct rank_para ranks[2]; const u8 dx_read_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; const u8 dx_write_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; const u8 ac_delays[31]; diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c index 85e7a1874e..b679f92e70 100644 --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c @@ -346,18 +346,24 @@ static void mctl_set_cr(uint16_t socid, struct dram_para *para) #else #error Unsupported DRAM type! #endif - (para->bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | + (para->ranks[0].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) | (para->dual_rank ? MCTL_CR_DUAL_RANK : MCTL_CR_SINGLE_RANK) | - MCTL_CR_PAGE_SIZE(para->page_size) | - MCTL_CR_ROW_BITS(para->row_bits), &mctl_com->cr); + MCTL_CR_PAGE_SIZE(para->ranks[0].page_size) | + MCTL_CR_ROW_BITS(para->ranks[0].row_bits), &mctl_com->cr);
- if (socid == SOCID_R40) { - if (para->dual_rank) - panic("Dual rank memory not supported\n"); + if (socid == SOCID_A64 || socid == SOCID_R40) { + writel((para->ranks[1].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | + MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) | + (para->dual_rank ? MCTL_CR_DUAL_RANK : MCTL_CR_SINGLE_RANK) | + MCTL_CR_PAGE_SIZE(para->ranks[1].page_size) | + MCTL_CR_ROW_BITS(para->ranks[1].row_bits), &mctl_com->cr_r1); + }
+ if (socid == SOCID_R40) { /* Mux pin to A15 address line for single rank memory. */ - setbits_le32(&mctl_com->cr_r1, MCTL_CR_R1_MUX_A15); + if (!para->dual_rank) + setbits_le32(&mctl_com->cr_r1, MCTL_CR_R1_MUX_A15); } }
@@ -581,35 +587,63 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para) return 0; }
-static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) +/* + * Test if memory at offset offset matches memory at a certain base + */ +static bool mctl_mem_matches_base(u32 offset, ulong base) +{ + /* Try to write different values to RAM at two addresses */ + writel(0, base); + writel(0xaa55aa55, base + offset); + dsb(); + /* Check if the same value is actually observed when reading back */ + return readl(base) == + readl(base + offset); +} + +static void mctl_auto_detect_dram_size_rank(uint16_t socid, struct dram_para *para, ulong base, struct rank_para *rank) { /* detect row address bits */ - para->page_size = 512; - para->row_bits = 16; - para->bank_bits = 2; + rank->page_size = 512; + rank->row_bits = 16; + rank->bank_bits = 2; mctl_set_cr(socid, para);
- for (para->row_bits = 11; para->row_bits < 16; para->row_bits++) - if (mctl_mem_matches((1 << (para->row_bits + para->bank_bits)) * para->page_size)) + for (rank->row_bits = 11; rank->row_bits < 16; rank->row_bits++) + if (mctl_mem_matches_base((1 << (rank->row_bits + rank->bank_bits)) * rank->page_size, base)) break;
/* detect bank address bits */ - para->bank_bits = 3; + rank->bank_bits = 3; mctl_set_cr(socid, para);
- for (para->bank_bits = 2; para->bank_bits < 3; para->bank_bits++) - if (mctl_mem_matches((1 << para->bank_bits) * para->page_size)) + for (rank->bank_bits = 2; rank->bank_bits < 3; rank->bank_bits++) + if (mctl_mem_matches_base((1 << rank->bank_bits) * rank->page_size, base)) break;
/* detect page size */ - para->page_size = 8192; + rank->page_size = 8192; mctl_set_cr(socid, para);
- for (para->page_size = 512; para->page_size < 8192; para->page_size *= 2) - if (mctl_mem_matches(para->page_size)) + for (rank->page_size = 512; rank->page_size < 8192; rank->page_size *= 2) + if (mctl_mem_matches_base(rank->page_size, base)) break; }
+static unsigned long mctl_calc_rank_size(struct rank_para *rank) +{ + return (1UL << (rank->row_bits + rank->bank_bits)) * rank->page_size; +} + +static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) +{ + mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE, ¶->ranks[0]); + + if ((socid == SOCID_A64 || socid == SOCID_R40) && para->dual_rank) { + mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE + mctl_calc_rank_size(¶->ranks[0]), ¶->ranks[1]); + } +} + /* * The actual values used here are taken from Allwinner provided boot0 * binaries, though they are probably board specific, so would likely benefit @@ -688,12 +722,23 @@ unsigned long sunxi_dram_init(void) struct sunxi_mctl_ctl_reg * const mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;
+ unsigned long size; + struct dram_para para = { .dual_rank = 1, .bus_full_width = 1, - .row_bits = 15, - .bank_bits = 3, - .page_size = 4096, + .ranks = { + { + .row_bits = 15, + .bank_bits = 3, + .page_size = 4096, + }, + { + .row_bits = 15, + .bank_bits = 3, + .page_size = 4096, + } + },
#if defined(CONFIG_MACH_SUN8I_H3) .dx_read_delays = SUN8I_H3_DX_READ_DELAYS, @@ -762,6 +807,13 @@ unsigned long sunxi_dram_init(void) mctl_auto_detect_dram_size(socid, ¶); mctl_set_cr(socid, ¶);
- return (1UL << (para.row_bits + para.bank_bits)) * para.page_size * - (para.dual_rank ? 2 : 1); + size = mctl_calc_rank_size(¶.ranks[0]); + if (socid == SOCID_A64 || socid == SOCID_R40) { + if (para.dual_rank) + size += mctl_calc_rank_size(¶.ranks[1]); + } else if (para.dual_rank) { + size *= 2; + } + + return size; }
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
Hi,
From: Icenowy Zheng icenowy@aosc.io
Previously we have known that R40 has a configuration register for its rank 1, which allows different configuration than rank 0. Reverse engineering of newest libdram of A64 from Allwinner shows that A64 has this register too. It's bit 0 (which enables dual rank in rank 0 configuration register) means a dedicated rank size setup is used for rank 1.
Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank DRAM support necessary.
Add this support. As we have gained knowledge of asymmetric dual rank, we can now allow R40 dual rank memory setup to work too.
Icenowy just sent a new version, together with another patch. I will review her version, so you can drop this one here.
Cheers, Andre
Signed-off-by: Icenowy Zheng icenowy@aosc.io
.../include/asm/arch-sunxi/dram_sunxi_dw.h | 11 +- arch/arm/mach-sunxi/dram_sunxi_dw.c | 100 +++++++++++++----- 2 files changed, 84 insertions(+), 27 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h index a5a7ebde44..e843c14202 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h @@ -215,12 +215,17 @@ struct sunxi_mctl_ctl_reg { #define NR_OF_BYTE_LANES (32 / BITS_PER_BYTE) /* The eight data lines (DQn) plus DM, DQS and DQSN */ #define LINES_PER_BYTE_LANE (BITS_PER_BYTE + 3) -struct dram_para {
+struct rank_para { u16 page_size;
- u8 bus_full_width;
- u8 dual_rank; u8 row_bits; u8 bank_bits;
+};
+struct dram_para {
- u8 dual_rank;
- u8 bus_full_width;
- struct rank_para ranks[2]; const u8 dx_read_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; const u8 dx_write_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; const u8 ac_delays[31];
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c index 85e7a1874e..b679f92e70 100644 --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c @@ -346,18 +346,24 @@ static void mctl_set_cr(uint16_t socid, struct dram_para *para) #else #error Unsupported DRAM type! #endif
(para->bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) |
(para->ranks[0].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) | (para->dual_rank ? MCTL_CR_DUAL_RANK : MCTL_CR_SINGLE_RANK) |
MCTL_CR_PAGE_SIZE(para->page_size) |MCTL_CR_ROW_BITS(para->row_bits), &mctl_com->cr);
MCTL_CR_PAGE_SIZE(para->ranks[0].page_size) |MCTL_CR_ROW_BITS(para->ranks[0].row_bits), &mctl_com->cr);
- if (socid == SOCID_R40) {
if (para->dual_rank)panic("Dual rank memory not supported\n");
if (socid == SOCID_A64 || socid == SOCID_R40) {
writel((para->ranks[1].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) |MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) |(para->dual_rank ? MCTL_CR_DUAL_RANK : MCTL_CR_SINGLE_RANK) |MCTL_CR_PAGE_SIZE(para->ranks[1].page_size) |MCTL_CR_ROW_BITS(para->ranks[1].row_bits), &mctl_com->cr_r1);}
if (socid == SOCID_R40) { /* Mux pin to A15 address line for single rank memory. */
setbits_le32(&mctl_com->cr_r1, MCTL_CR_R1_MUX_A15);
if (!para->dual_rank)setbits_le32(&mctl_com->cr_r1, MCTL_CR_R1_MUX_A15);}
@@ -581,35 +587,63 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para) return 0; }
-static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) +/*
- Test if memory at offset offset matches memory at a certain base
- */
+static bool mctl_mem_matches_base(u32 offset, ulong base) +{
- /* Try to write different values to RAM at two addresses */
- writel(0, base);
- writel(0xaa55aa55, base + offset);
- dsb();
- /* Check if the same value is actually observed when reading back */
- return readl(base) ==
readl(base + offset);+}
+static void mctl_auto_detect_dram_size_rank(uint16_t socid, struct dram_para *para, ulong base, struct rank_para *rank) { /* detect row address bits */
- para->page_size = 512;
- para->row_bits = 16;
- para->bank_bits = 2;
- rank->page_size = 512;
- rank->row_bits = 16;
- rank->bank_bits = 2; mctl_set_cr(socid, para);
- for (para->row_bits = 11; para->row_bits < 16; para->row_bits++)
if (mctl_mem_matches((1 << (para->row_bits + para->bank_bits)) * para->page_size))
for (rank->row_bits = 11; rank->row_bits < 16; rank->row_bits++)
if (mctl_mem_matches_base((1 << (rank->row_bits + rank->bank_bits)) * rank->page_size, base)) break;/* detect bank address bits */
- para->bank_bits = 3;
- rank->bank_bits = 3; mctl_set_cr(socid, para);
- for (para->bank_bits = 2; para->bank_bits < 3; para->bank_bits++)
if (mctl_mem_matches((1 << para->bank_bits) * para->page_size))
for (rank->bank_bits = 2; rank->bank_bits < 3; rank->bank_bits++)
if (mctl_mem_matches_base((1 << rank->bank_bits) * rank->page_size, base)) break;/* detect page size */
- para->page_size = 8192;
- rank->page_size = 8192; mctl_set_cr(socid, para);
- for (para->page_size = 512; para->page_size < 8192; para->page_size *= 2)
if (mctl_mem_matches(para->page_size))
- for (rank->page_size = 512; rank->page_size < 8192; rank->page_size *= 2)
if (mctl_mem_matches_base(rank->page_size, base)) break;}
+static unsigned long mctl_calc_rank_size(struct rank_para *rank) +{
- return (1UL << (rank->row_bits + rank->bank_bits)) * rank->page_size;
+}
+static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) +{
- mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE, ¶->ranks[0]);
- if ((socid == SOCID_A64 || socid == SOCID_R40) && para->dual_rank) {
mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE + mctl_calc_rank_size(¶->ranks[0]), ¶->ranks[1]);- }
+}
/*
- The actual values used here are taken from Allwinner provided boot0
- binaries, though they are probably board specific, so would likely benefit
@@ -688,12 +722,23 @@ unsigned long sunxi_dram_init(void) struct sunxi_mctl_ctl_reg * const mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;
- unsigned long size;
- struct dram_para para = { .dual_rank = 1, .bus_full_width = 1,
.row_bits = 15,.bank_bits = 3,.page_size = 4096,
.ranks = {{.row_bits = 15,.bank_bits = 3,.page_size = 4096,},{.row_bits = 15,.bank_bits = 3,.page_size = 4096,}},#if defined(CONFIG_MACH_SUN8I_H3) .dx_read_delays = SUN8I_H3_DX_READ_DELAYS, @@ -762,6 +807,13 @@ unsigned long sunxi_dram_init(void) mctl_auto_detect_dram_size(socid, ¶); mctl_set_cr(socid, ¶);
- return (1UL << (para.row_bits + para.bank_bits)) * para.page_size *
(para.dual_rank ? 2 : 1);
- size = mctl_calc_rank_size(¶.ranks[0]);
- if (socid == SOCID_A64 || socid == SOCID_R40) {
if (para.dual_rank)size += mctl_calc_rank_size(¶.ranks[1]);- } else if (para.dual_rank) {
size *= 2;- }
- return size;
}
From: Arnaud Ferraris arnaud.ferraris@gmail.com
--- include/configs/sunxi-common.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5b0bec0561..227284cd29 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -291,6 +291,8 @@ extern int soft_i2c_gpio_scl; */ #define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) +#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000)) +#define KERNEL_COMP_SIZE __stringify(0x4000000) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) @@ -332,6 +334,18 @@ extern int soft_i2c_gpio_scl; "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
+#ifdef CONFIG_ARM64 + +#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \ + "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \ + "kernel_comp_size=" KERNEL_COMP_SIZE "\0" + +#else + +#define MEM_LAYOUT_ENV_EXTRA_SETTINGS "" + +#endif + #define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ @@ -487,6 +501,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ + MEM_LAYOUT_ENV_EXTRA_SETTINGS \ DFU_ALT_INFO_RAM \ "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
Hi,
From: Arnaud Ferraris arnaud.ferraris@gmail.com
This looks OK on the first glance, but is missing a commit message and a Signed-off-by:
Cheers, Andre
include/configs/sunxi-common.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5b0bec0561..227284cd29 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -291,6 +291,8 @@ extern int soft_i2c_gpio_scl; */ #define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) +#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000)) +#define KERNEL_COMP_SIZE __stringify(0x4000000) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) @@ -332,6 +334,18 @@ extern int soft_i2c_gpio_scl; "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
+#ifdef CONFIG_ARM64
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
- "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
- "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
+#else
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
+#endif
#define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ @@ -487,6 +501,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \
- MEM_LAYOUT_ENV_EXTRA_SETTINGS \ DFU_ALT_INFO_RAM \ "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
Hi Arnaud,
From: Arnaud Ferraris arnaud.ferraris@gmail.com
as mentioned before, this looks useful, so can you re-send this with a commit message and your Signed-off-by:?
Also I was wondering if you could increase the COMP_SIZE? The 64MB look rather arbitrary and maybe unnecessarily limiting. I think we could go up till 0xfa00000, but maybe should stop at 0xf800000, to leave some space for further extensions?
Cheers, Andre
include/configs/sunxi-common.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5b0bec0561..227284cd29 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -291,6 +291,8 @@ extern int soft_i2c_gpio_scl; */ #define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) +#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000)) +#define KERNEL_COMP_SIZE __stringify(0x4000000) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) @@ -332,6 +334,18 @@ extern int soft_i2c_gpio_scl; "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
+#ifdef CONFIG_ARM64
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
- "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
- "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
+#else
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
+#endif
#define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ @@ -487,6 +501,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \
- MEM_LAYOUT_ENV_EXTRA_SETTINGS \ DFU_ALT_INFO_RAM \ "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \
Andre,
On 3/31/21 10:39 AM, Andre Przywara wrote:
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
Hi Arnaud,
From: Arnaud Ferraris arnaud.ferraris@gmail.com
as mentioned before, this looks useful, so can you re-send this with a commit message and your Signed-off-by:?
It looks like you picked up this patch regardless?
Also I was wondering if you could increase the COMP_SIZE? The 64MB look rather arbitrary and maybe unnecessarily limiting. I think we could go up till 0xfa00000, but maybe should stop at 0xf800000, to leave some space for further extensions?
And you changed KERNEL_COMP_SIZE to 0xb000000. How does that work when U-Boot itself is at 0x4a000000 (KERNEL_COMP_ADDR_R + 0x6000000)?
Samuel
Cheers, Andre
include/configs/sunxi-common.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5b0bec0561..227284cd29 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -291,6 +291,8 @@ extern int soft_i2c_gpio_scl; */ #define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) +#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000)) +#define KERNEL_COMP_SIZE __stringify(0x4000000) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) @@ -332,6 +334,18 @@ extern int soft_i2c_gpio_scl; "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
+#ifdef CONFIG_ARM64
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
- "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
- "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
+#else
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
This can be defined to nothing. No empty string is needed.
+#endif
#define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ @@ -487,6 +501,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \
- MEM_LAYOUT_ENV_EXTRA_SETTINGS \ DFU_ALT_INFO_RAM \ "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \
On Sat, 17 Apr 2021 12:47:23 -0500 Samuel Holland samuel@sholland.org wrote:
Hi Samuel,
On 3/31/21 10:39 AM, Andre Przywara wrote:
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
Hi Arnaud,
From: Arnaud Ferraris arnaud.ferraris@gmail.com
as mentioned before, this looks useful, so can you re-send this with a commit message and your Signed-off-by:?
It looks like you picked up this patch regardless?
Yes, I asked him twice, without any reply. At the end I figured that the danger of a copyright infringement is low given the nature of the change, and I didn't feel this should block this useful feature. The alternative would be to have sent it as a patch of mine, but I felt that I should preserve his authorship, so took the patch anyway. I got a reply from him on another patch, and it's not his first U-Boot patch, so I think it's just an oversight (from the sender of the patch?)
Chen-Yu asked about the feature lately, so if you think that approach is dodgy, we can revert it and take another version of the patch.
Also I was wondering if you could increase the COMP_SIZE? The 64MB look rather arbitrary and maybe unnecessarily limiting. I think we could go up till 0xfa00000, but maybe should stop at 0xf800000, to leave some space for further extensions?
And you changed KERNEL_COMP_SIZE to 0xb000000. How does that work when U-Boot itself is at 0x4a000000 (KERNEL_COMP_ADDR_R + 0x6000000)?
It's not anymore at this time, that's just the load address, and it relocates itself to the end of DRAM very early. So basically the whole memory except the very end is available. Btw, the reason we confine everything to below 0x50000000 is just that we need to concatenate the base (0x4....) with that offset, and cannot use arithmetic, because that doesn't work in the Makefiles.
Cheers, Andre
include/configs/sunxi-common.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5b0bec0561..227284cd29 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -291,6 +291,8 @@ extern int soft_i2c_gpio_scl; */ #define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) +#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000)) +#define KERNEL_COMP_SIZE __stringify(0x4000000) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) @@ -332,6 +334,18 @@ extern int soft_i2c_gpio_scl; "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
+#ifdef CONFIG_ARM64
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
- "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
- "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
+#else
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
This can be defined to nothing. No empty string is needed.
+#endif
#define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ @@ -487,6 +501,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \
- MEM_LAYOUT_ENV_EXTRA_SETTINGS \ DFU_ALT_INFO_RAM \ "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \
Andre,
On 4/17/21 1:23 PM, Andre Przywara wrote:
On Sat, 17 Apr 2021 12:47:23 -0500 Samuel Holland samuel@sholland.org wrote:
On 3/31/21 10:39 AM, Andre Przywara wrote:
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
Hi Arnaud,
From: Arnaud Ferraris arnaud.ferraris@gmail.com
as mentioned before, this looks useful, so can you re-send this with a commit message and your Signed-off-by:?
It looks like you picked up this patch regardless?
Yes, I asked him twice, without any reply. At the end I figured that the danger of a copyright infringement is low given the nature of the change, and I didn't feel this should block this useful feature. The alternative would be to have sent it as a patch of mine, but I felt that I should preserve his authorship, so took the patch anyway. I got a reply from him on another patch, and it's not his first U-Boot patch, so I think it's just an oversight (from the sender of the patch?)
Chen-Yu asked about the feature lately, so if you think that approach is dodgy, we can revert it and take another version of the patch.
Okay, I'll trust your judgement here.
Also I was wondering if you could increase the COMP_SIZE? The 64MB look rather arbitrary and maybe unnecessarily limiting. I think we could go up till 0xfa00000, but maybe should stop at 0xf800000, to leave some space for further extensions?
And you changed KERNEL_COMP_SIZE to 0xb000000. How does that work when U-Boot itself is at 0x4a000000 (KERNEL_COMP_ADDR_R + 0x6000000)?
It's not anymore at this time, that's just the load address, and it relocates itself to the end of DRAM very early. So basically the whole memory except the very end is available.
Btw, the reason we confine everything to below 0x50000000 is just that we need to concatenate the base (0x4....) with that offset, and cannot use arithmetic, because that doesn't work in the Makefiles.
Ah, that makes sense. So we're assuming that U-Boot relocates itself above 0x50000000, and so nothing important remains inside the address range used by sunxi-common.h.
Thanks for the explanation, Samuel
Cheers, Andre
include/configs/sunxi-common.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5b0bec0561..227284cd29 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -291,6 +291,8 @@ extern int soft_i2c_gpio_scl; */ #define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) +#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000)) +#define KERNEL_COMP_SIZE __stringify(0x4000000) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) @@ -332,6 +334,18 @@ extern int soft_i2c_gpio_scl; "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
+#ifdef CONFIG_ARM64
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
- "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
- "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
+#else
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
This can be defined to nothing. No empty string is needed.
+#endif
#define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ @@ -487,6 +501,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \
- MEM_LAYOUT_ENV_EXTRA_SETTINGS \ DFU_ALT_INFO_RAM \ "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \
Hi Andre,
Le 17/04/2021 à 20:23, Andre Przywara a écrit :
On Sat, 17 Apr 2021 12:47:23 -0500 Samuel Holland samuel@sholland.org wrote:
Hi Samuel,
On 3/31/21 10:39 AM, Andre Przywara wrote:
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
Hi Arnaud,
From: Arnaud Ferraris arnaud.ferraris@gmail.com
as mentioned before, this looks useful, so can you re-send this with a commit message and your Signed-off-by:?
It looks like you picked up this patch regardless?
Yes, I asked him twice, without any reply. At the end I figured that the danger of a copyright infringement is low given the nature of the change, and I didn't feel this should block this useful feature. The alternative would be to have sent it as a patch of mine, but I felt that I should preserve his authorship, so took the patch anyway. I got a reply from him on another patch, and it's not his first U-Boot patch, so I think it's just an oversight (from the sender of the patch?)
Thanks for picking up and reworking this patch, and my apologies for not replying earlier: I had personal stuff to deal with for a few months, and am only now able to fully process my emails backlog.
I should be more reactive from now on, and might have a few more patches for you in the near future.
All the best, Arnaud
Chen-Yu asked about the feature lately, so if you think that approach is dodgy, we can revert it and take another version of the patch.
Also I was wondering if you could increase the COMP_SIZE? The 64MB look rather arbitrary and maybe unnecessarily limiting. I think we could go up till 0xfa00000, but maybe should stop at 0xf800000, to leave some space for further extensions?
And you changed KERNEL_COMP_SIZE to 0xb000000. How does that work when U-Boot itself is at 0x4a000000 (KERNEL_COMP_ADDR_R + 0x6000000)?
It's not anymore at this time, that's just the load address, and it relocates itself to the end of DRAM very early. So basically the whole memory except the very end is available. Btw, the reason we confine everything to below 0x50000000 is just that we need to concatenate the base (0x4....) with that offset, and cannot use arithmetic, because that doesn't work in the Makefiles.
Cheers, Andre
include/configs/sunxi-common.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5b0bec0561..227284cd29 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -291,6 +291,8 @@ extern int soft_i2c_gpio_scl; */ #define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) +#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000)) +#define KERNEL_COMP_SIZE __stringify(0x4000000) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) @@ -332,6 +334,18 @@ extern int soft_i2c_gpio_scl; "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
+#ifdef CONFIG_ARM64
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
- "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
- "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
+#else
+#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
This can be defined to nothing. No empty string is needed.
+#endif
#define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ @@ -487,6 +501,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \
- MEM_LAYOUT_ENV_EXTRA_SETTINGS \ DFU_ALT_INFO_RAM \ "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \
From: Arnaud Ferraris arnaud.ferraris@collabora.com
The wi-fi mac-address was previously changing at every reboot.
--- arch/arm/dts/sun50i-a64-pinephone.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi b/arch/arm/dts/sun50i-a64-pinephone.dtsi index 25150aba74..86d55e38d8 100644 --- a/arch/arm/dts/sun50i-a64-pinephone.dtsi +++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi @@ -14,6 +14,7 @@ / { aliases { serial0 = &uart0; + ethernet0 = &rtl8723cs; };
backlight: backlight { @@ -49,6 +50,13 @@ }; };
+ reg_vbat_wifi: vbat-wifi { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vbat-wifi"; + }; + speaker_amp: audio-amplifier { compatible = "simple-audio-amplifier"; enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */ @@ -195,6 +203,20 @@ status = "okay"; };
+&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_vbat_wifi>; + vqmmc-supply = <®_dldo4>; + bus-width = <4>; + non-removable; + status = "okay"; + + rtl8723cs: wifi@1 { + reg = <1>; + }; +}; + &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>;
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
From: Arnaud Ferraris arnaud.ferraris@collabora.com
The wi-fi mac-address was previously changing at every reboot.
This is already part of the kernel .dtsi, which we will sync anyway (with the new merge window). So we can drop this specific patch.
Cheers, Andre
arch/arm/dts/sun50i-a64-pinephone.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi b/arch/arm/dts/sun50i-a64-pinephone.dtsi index 25150aba74..86d55e38d8 100644 --- a/arch/arm/dts/sun50i-a64-pinephone.dtsi +++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi @@ -14,6 +14,7 @@ / { aliases { serial0 = &uart0;
ethernet0 = &rtl8723cs;};
backlight: backlight {
@@ -49,6 +50,13 @@ }; };
- reg_vbat_wifi: vbat-wifi {
compatible = "regulator-fixed";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;regulator-name = "vbat-wifi";- };
- speaker_amp: audio-amplifier { compatible = "simple-audio-amplifier"; enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */
@@ -195,6 +203,20 @@ status = "okay"; };
+&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins>;
- vmmc-supply = <®_vbat_wifi>;
- vqmmc-supply = <®_dldo4>;
- bus-width = <4>;
- non-removable;
- status = "okay";
- rtl8723cs: wifi@1 {
reg = <1>;- };
+};
&mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>;
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
From: Arnaud Ferraris arnaud.ferraris@collabora.com
On a cellular phone, the vast majority of users can be expected to have no serial console connected and prefer a short boot.
It's a bit tricky to break in with a delay of 0, but indeed most users won't care, so looks fine to me.
But it's missing a Signed-off-by: line.
Cheers, Andre
configs/pinephone_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 9967cddab9..9b51a7a100 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -10,4 +10,5 @@ CONFIG_PINEPHONE_DT_SELECTION=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_BOOTDELAY=0 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2"
On Thu, Feb 25, 2021 at 05:02:40PM +0000, André Przywara wrote:
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
From: Arnaud Ferraris arnaud.ferraris@collabora.com
On a cellular phone, the vast majority of users can be expected to have no serial console connected and prefer a short boot.
It's a bit tricky to break in with a delay of 0, but indeed most users won't care, so looks fine to me.
But it's missing a Signed-off-by: line.
I'm not sure we should start accepting custom boards changes like it's done here, this will only lead to inconsistencies between boards in the long run.
And a defconfig is really easy to change anyway, even when it's integrated in build systems
Maxime
On Thu, 25 Feb 2021 21:58:38 +0100 Maxime Ripard maxime@cerno.tech wrote:
Hi,
On Thu, Feb 25, 2021 at 05:02:40PM +0000, André Przywara wrote:
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
From: Arnaud Ferraris arnaud.ferraris@collabora.com
On a cellular phone, the vast majority of users can be expected to have no serial console connected and prefer a short boot.
It's a bit tricky to break in with a delay of 0, but indeed most users won't care, so looks fine to me.
But it's missing a Signed-off-by: line.
I'm not sure we should start accepting custom boards changes like it's done here, this will only lead to inconsistencies between boards in the long run.
I am a bit undecided, I see merits in both arguments.
And a defconfig is really easy to change anyway, even when it's integrated in build systems
Nicolas, could you live with:
$ sed -i s/^CONFIG_BOOTDELAY=2/CONFIG_BOOTDELAY=0/ .config
in your build system? Or is the U-Boot build generic?
Cheers, Andre
Nicolas, could you live with: $ sed -i s/^CONFIG_BOOTDELAY=2/CONFIG_BOOTDELAY=0/ .config in your build system? Or is the U-Boot build generic?
No practical issue, the patch is already applied by Mobian. My concern was only to reduce divergence between redistributors.
Anyway, thanks for asking before taking the decision.
Hi Maxime,
Le 25/02/2021 à 21:58, Maxime Ripard a écrit :
On Thu, Feb 25, 2021 at 05:02:40PM +0000, André Przywara wrote:
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
From: Arnaud Ferraris arnaud.ferraris@collabora.com
On a cellular phone, the vast majority of users can be expected to have no serial console connected and prefer a short boot.
It's a bit tricky to break in with a delay of 0, but indeed most users won't care, so looks fine to me.
But it's missing a Signed-off-by: line.
I'm not sure we should start accepting custom boards changes like it's done here, this will only lead to inconsistencies between boards in the long run.
The original reasoning behind this was, the PinePhone (and PineTab) is both a dev board and a consumer device, which is why I assumed it could use some kind of "special treatment".
However, I don't have a strong opinion on that matter and can certainly live with the default boot delay.
Regards, Arnaud
And a defconfig is really easy to change anyway, even when it's integrated in build systems
Maxime
participants (7)
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Andre Przywara -
André Przywara
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Arnaud Ferraris -
Maxime Ripard -
Nicolas Boulenguez -
Peter Robinson -
Samuel Holland