Re: [PATCH] arm: dts: socfpga: l2c-310 full line of zeros error @kernel boot
Am 12.06.2020 um 22:27 schrieb Dinh Nguyen:
On 6/12/20 6:41 AM, Marek Vasut wrote:
On 6/12/20 1:04 PM, Nico Becker wrote:
Am 12.06.2020 um 07:51 schrieb Nico Becker:
Am 11.06.2020 um 03:51 schrieb Tan, Ley Foon:
-----Original Message----- From: Dinh Nguyen dinguyen@kernel.org Sent: Thursday, June 11, 2020 2:55 AM To: Marek Vasut marex@denx.de; Nico Becker <u-boot@ic- automation.de>; u-boot@lists.denx.de Cc: simon.k.r.goldschmidt@gmail.com; Tan, Ley Foon ley.foon.tan@intel.com Subject: Re: [PATCH] arm: dts: socfpga: l2c-310 full line of zeros error @kernel boot
On 6/10/20 8:23 AM, Marek Vasut wrote: > On 6/10/20 3:21 PM, Nico Becker wrote: >> Am 10.06.2020 um 15:19 schrieb Marek Vasut: >>> On 6/10/20 3:14 PM, Nico Becker wrote: >>>> if i remove the arm,shared-override option in the dts file, the >>>> kernel boot without an error. >>>> With the option the kernel boots with the following error: >>>> dmesg --level=err >>>> L2C-310: enabling full line of zeros but not enabled in Cortex-A9 >>>> >>>> i ve no idea why the parameter have an effect on that. i try >>>> several kernels, allays the same behavior. >>>> >>>> >>>> diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi >>>> index eda558f2fe..c2173416c7 100644 >>>> --- a/arch/arm/dts/socfpga.dtsi >>>> +++ b/arch/arm/dts/socfpga.dtsi >>>> @@ -719,7 +719,6 @@ >>>> arm,data-latency = <2 1 1>; >>>> prefetch-data = <1>; >>>> prefetch-instr = <1>; >>>> - arm,shared-override; >>>> arm,double-linefill = <1>; >>>> arm,double-linefill-incr = <0>; >>>> arm,double-linefill-wrap = <1>; >>>> >>> Do you use latest u-boot/master or some older version ? Which one? >> sorry, i forget it. >> >> i use v2020.01 > Should be OK I think. Hmmmmm, I suspect this is another fun with the > ACTLR/CPACR registers, like 937db7188e3a5ab8f802eff9b57854189379667a . > Ley, any ideas ? > I just tested with
2020.07-rc4-00022-gbe79009f3b along with linux v5.7,
and I no longer see the error.
Yes, I also just tested 2020.04 uboot and 5.4.23-lts kernel, also didn't see this error. What kernel version you are using?
Regards Ley Foon
hello, i use kernel 4.14.126-rt62-ltsi.
greetings
i try the u-boot version v2020.07-rc4 without the patch, and everything seems okay, no error at boot. i ve no idea why the error at boot time is gone with the 2020.07-rc4 version. does anyone have any idea why? thanks, greetings
You can try git bisect between the two versions to find out which patch caused this.
This is the patch that fixed it:
commit f62782fb2999dd8109a3ffe9ee0a51e54ab034ab Author: Ley Foon Tan ley.foon.tan@intel.com Date: Fri Apr 17 14:45:35 2020 +0800
cache: l2x0: Fix write to incorrect shared-override bit The existing code write bit-0 for shared attribute override enable bit. It should be bit-22 based on cache controller specification [1]. [1]http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246f/DDI0246F_l2c310_r3...
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>Dinh
hello, thanks a lot! i try the git bisect method, i was 13 builds away. next time i check first the changelog greetings
On 6/15/20 12:56 AM, Nico Becker wrote:
Am 12.06.2020 um 22:27 schrieb Dinh Nguyen:
On 6/12/20 6:41 AM, Marek Vasut wrote:
On 6/12/20 1:04 PM, Nico Becker wrote:
Am 12.06.2020 um 07:51 schrieb Nico Becker:
Am 11.06.2020 um 03:51 schrieb Tan, Ley Foon:
> -----Original Message----- > From: Dinh Nguyen dinguyen@kernel.org > Sent: Thursday, June 11, 2020 2:55 AM > To: Marek Vasut marex@denx.de; Nico Becker <u-boot@ic- > automation.de>; u-boot@lists.denx.de > Cc: simon.k.r.goldschmidt@gmail.com; Tan, Ley Foon > ley.foon.tan@intel.com > Subject: Re: [PATCH] arm: dts: socfpga: l2c-310 full line of zeros > error > @kernel boot > > > > On 6/10/20 8:23 AM, Marek Vasut wrote: >> On 6/10/20 3:21 PM, Nico Becker wrote: >>> Am 10.06.2020 um 15:19 schrieb Marek Vasut: >>>> On 6/10/20 3:14 PM, Nico Becker wrote: >>>>> if i remove the arm,shared-override option in the dts file, the >>>>> kernel boot without an error. >>>>> With the option the kernel boots with the following error: >>>>> dmesg --level=err >>>>> L2C-310: enabling full line of zeros but not enabled in >>>>> Cortex-A9 >>>>> >>>>> i ve no idea why the parameter have an effect on that. i try >>>>> several kernels, allays the same behavior. >>>>> >>>>> >>>>> diff --git a/arch/arm/dts/socfpga.dtsi >>>>> b/arch/arm/dts/socfpga.dtsi >>>>> index eda558f2fe..c2173416c7 100644 >>>>> --- a/arch/arm/dts/socfpga.dtsi >>>>> +++ b/arch/arm/dts/socfpga.dtsi >>>>> @@ -719,7 +719,6 @@ >>>>> arm,data-latency = <2 1 1>; >>>>> prefetch-data = <1>; >>>>> prefetch-instr = <1>; >>>>> - arm,shared-override; >>>>> arm,double-linefill = <1>; >>>>> arm,double-linefill-incr = <0>; >>>>> arm,double-linefill-wrap = <1>; >>>>> >>>> Do you use latest u-boot/master or some older version ? Which >>>> one? >>> sorry, i forget it. >>> >>> i use v2020.01 >> Should be OK I think. Hmmmmm, I suspect this is another fun with >> the >> ACTLR/CPACR registers, like > 937db7188e3a5ab8f802eff9b57854189379667a . >> Ley, any ideas ? >> > I just tested with > > 2020.07-rc4-00022-gbe79009f3b along with linux v5.7, > > and I no longer see the error. > Yes, I also just tested 2020.04 uboot and 5.4.23-lts kernel, also didn't see this error. What kernel version you are using?
Regards Ley Foon
hello, i use kernel 4.14.126-rt62-ltsi.
greetings
i try the u-boot version v2020.07-rc4 without the patch, and everything seems okay, no error at boot. i ve no idea why the error at boot time is gone with the 2020.07-rc4 version. does anyone have any idea why? thanks, greetings
You can try git bisect between the two versions to find out which patch caused this.
This is the patch that fixed it:
commit f62782fb2999dd8109a3ffe9ee0a51e54ab034ab Author: Ley Foon Tan ley.foon.tan@intel.com Date: Fri Apr 17 14:45:35 2020 +0800
cache: l2x0: Fix write to incorrect shared-override bit
The existing code write bit-0 for shared attribute override enable bit. It should be bit-22 based on cache controller specification [1].
[1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246f/DDI0246F_l2c310_r3...
Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
Dinh
hello, thanks a lot! i try the git bisect method, i was 13 builds away. next time i check first the changelog greetings
May want to check your usage of git bisect, it took me less than 10 builds.
Dinh
participants (2)
-
Dinh Nguyen -
Nico Becker