[PATCH] rockchip: rk3568-rock-3a: Fix pcie2x1 and pcie3x2 pinctrl override

The pcie pinctrl override added in the commit a76aa6ffa6cd ("rockchip: rk3568-rock-3a: Enable PCIe and NVMe support") is causing a pinmux issue on linux when using a EFI boot flow.
Remove the pinctrl override in u-boot.dtsi to fix this issue. PCIe/NVMe continues to work in both u-boot and linux after this change.
Also revert disable of sdmmc2 and uart1 to fix use of wifi in linux when using a EFI boot flow.
Fixes: a76aa6ffa6cd ("rockchip: rk3568-rock-3a: Enable PCIe and NVMe support") Fixes: 073d911ae64a ("rockchip: rk3568-rock-3a: Sync device tree from linux") Signed-off-by: Jonas Karlman jonas@kwiboo.se --- This may depend on the following series for a clean apply: - rockchip: rk3568: Device Tree updates v2 - rockchip: rk35xx: Fix SPI Flash alias v2 - rockchip: rk3568: Use dwc3-generic driver v4
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 24 ------------------------ 1 file changed, 24 deletions(-)
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi index a36a329f59c5..f26a6cb899f7 100644 --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi @@ -12,22 +12,6 @@ }; };
-&pcie2x1 { - pinctrl-0 = <&pcie20m1_pins &pcie_reset_h>; -}; - -&pcie3x2 { - pinctrl-0 = <&pcie30x2m1_pins &pcie3x2_reset_h>; -}; - -&pinctrl { - pcie { - pcie3x2_reset_h: pcie3x2-reset-h { - rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - &sdhci { cap-mmc-highspeed; mmc-ddr-1_8v; @@ -53,14 +37,6 @@ }; };
-&sdmmc2 { - status = "disabled"; -}; - -&uart1 { - status = "disabled"; -}; - &uart2 { clock-frequency = <24000000>; bootph-all;
participants (1)
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Jonas Karlman