The ti-board-config entry loads and validates a given YAML config file against a given schema, and generates the board config binary. K3 devices require these generated binaries to be packed into the final system firmware images.

Signed-off-by: Neha Malcom Francis n-francis@ti.com --- tools/binman/entries.rst | 50 ++++ tools/binman/etype/ti_board_config.py | 246 ++++++++++++++++++ tools/binman/ftest.py | 11 + tools/binman/test/277_ti_board_cfg.dts | 11 + .../binman/test/278_ti_board_cfg_combined.dts | 25 ++ tools/binman/test/yaml/config.yaml | 11 + tools/binman/test/yaml/schema.yaml | 26 ++ 7 files changed, 380 insertions(+) create mode 100644 tools/binman/etype/ti_board_config.py create mode 100644 tools/binman/test/277_ti_board_cfg.dts create mode 100644 tools/binman/test/278_ti_board_cfg_combined.dts create mode 100644 tools/binman/test/yaml/config.yaml create mode 100644 tools/binman/test/yaml/schema.yaml

diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index b71af801fd..7cfe61dd09 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -2423,3 +2423,53 @@ may be used instead.

+.. _etype_ti_board_config: + +Entry: ti-board-config: Texas Instruments board config binary +------------------------------------------------------------- + +Support for generation of TI schema validated board configuration +binary +This etype supports generation of two kinds of board configuration +binaries: singular board config binary as well as combined board config +binary. + +Properties / Entry arguments: + - config-file: File containing board configuration data in YAML + - schema-file: File containing board configuration YAML schema against + which the config file is validated + +These above parameters are used only when the generated binary is +intended to be a single board configuration binary. Example:: + +/* generate a my-ti-board-config.bin generated from a YAML configuration +file validated against the schema*/ +my-ti-board-config { + ti-board-config { + config = "board-config.yaml"; + schema = "schema.yaml"; + }; +}; + +To generate a combined board configuration binary, we pack the +needed individual binaries into a ti-board-config binary. In this case, +the available supported subnode names are board-cfg, pm-cfg, sec-cfg and +rm-cfg. For example:: + +/* generate a my-combined-ti-board-config.bin packed with a header +(containing details about the included board config binaries), along +with the YAML schema validated binaries themselves*/ +my-combined-ti-board-config { + ti-board-config { + board-cfg { + config = "board-cfg.yaml"; + schema = "schema.yaml"; + }; + sec-cfg { + config = "sec-cfg.yaml"; + schema = "schema.yaml"; + }; + }; +}; + + diff --git a/tools/binman/etype/ti_board_config.py b/tools/binman/etype/ti_board_config.py new file mode 100644 index 0000000000..0a9be44afc --- /dev/null +++ b/tools/binman/etype/ti_board_config.py @@ -0,0 +1,246 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (c) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# Written by Neha Malcom Francis n-francis@ti.com +# +# Entry-type module for generating schema validated TI board +# configuration binary +# + +import os +import struct +import tempfile +import yaml + +from collections import OrderedDict +from jsonschema import validate +from shutil import copyfileobj +from shutil import rmtree + +from binman.entry import Entry +from binman.etype.section import Entry_section +from binman.etype.blob_ext import Entry_blob_ext +from binman.etype.blob_ext_list import Entry_blob_ext_list +from dtoc import fdt_util +from u_boot_pylib import tools, tout + +BOARDCFG = 0xB +BOARDCFG_SEC = 0xD +BOARDCFG_PM = 0xE +BOARDCFG_RM = 0xC +BOARDCFG_NUM_ELEMS = 4 + +class Entry_ti_board_config(Entry_section): + """ + Support for generation of TI schema validated board configuration + binary + This etype supports generation of two kinds of board configuration + binaries: singular board config binary as well as combined board config + binary. + + Available parameters are: + + config-file + File containing board configuration data in YAML + + schema-file + File containing board configuration YAML schema against which the + config file is validated + + These above parameters are used only when the generated binary is + intended to be a single board configuration binary. Example:: + + /* generate a my-ti-board-config.bin generated from a YAML configuration + file validated against the schema*/ + my-ti-board-config { + ti-board-config { + config = "board-config.yaml"; + schema = "schema.yaml"; + }; + }; + + To generate a combined board configuration binary, we pack the + needed individual binaries into a ti-board-config binary. In this case, + the available supported subnode names are board-cfg, pm-cfg, sec-cfg and + rm-cfg. For example:: + + /* generate a my-combined-ti-board-config.bin packed with a header + (containing details about the included board config binaries), along + with the YAML schema validated binaries themselves*/ + my-combined-ti-board-config { + ti-board-config { + board-cfg { + config = "board-cfg.yaml"; + schema = "schema.yaml"; + }; + sec-cfg { + config = "sec-cfg.yaml"; + schema = "schema.yaml"; + }; + } + } + """ + def __init__(self, section, etype, node): + super().__init__(section, etype, node) + + self.config_file = None + self.schema_file = None + + self._entries = OrderedDict() + self._entries_data = OrderedDict() + self.num_elems = BOARDCFG_NUM_ELEMS + self.fmt = '<HHHBB' + self.index = 0 + self.binary_offset = 0 + self.sw_rev = 1 + self.devgrp = 0 + + def ReadNode(self): + super().ReadNode() + self.config_file = fdt_util.GetString(self._node, 'config') + self.schema_file = fdt_util.GetString(self._node, 'schema') + if self.config_file is None: + self.ReadEntries() + + def ReadEntries(self): + """Read the subnodes to find out what should go in this image""" + num_cfgs = 0 + for node in self._node.subnodes: + if 'type' not in node.props: + num_cfgs += 1 + etype = 'ti-board-config' + entry = Entry.Create(self, node, etype) + entry.ReadNode() + cfg_data = entry.BuildSectionData(True) + self._entries[entry.name] = entry + self._entries_data[entry.name] = cfg_data + self.num_elems = num_cfgs + + def _convert_to_byte_chunk(self, val, data_type): + """Convert value into byte array""" + size = 0 + if (data_type == "#/definitions/u8"): + size = 1 + elif (data_type == "#/definitions/u16"): + size = 2 + elif (data_type == "#/definitions/u32"): + size = 4 + else: + raise Exception("Data type not present in definitions") + if type(val) == int: + br = val.to_bytes(size, byteorder="little") + return br + + def _compile_yaml(self, schema_yaml, file_yaml): + """Convert YAML file into byte array based on YAML schema""" + br = bytearray() + for key in file_yaml.keys(): + node = file_yaml[key] + node_schema = schema_yaml['properties'][key] + node_type = node_schema.get('type') + if not 'type' in node_schema: + br += self._convert_to_byte_chunk(node, + node_schema.get('$ref')) + elif node_type == 'object': + br += self._compile_yaml(node_schema, node) + elif node_type == 'array': + for item in node: + if not isinstance(item, dict): + br += self._convert_to_byte_chunk( + item, schema_yaml['properties'][key]['items']["$ref"]) + else: + br += self._compile_yaml(node_schema.get('items'), item) + return br + + def _generate_binaries(self): + """Generate config binary artifacts from the loaded YAML configuration file""" + try: + cfg_binary = bytearray() + for key in self.file_yaml.keys(): + node = self.file_yaml[key] + node_schema = self.schema_yaml['properties'][key] + br = self._compile_yaml(node_schema, node) + cfg_binary += br + except Exception as e: + tout.warning("Combined board config binary was not generated properly") + cfg_binary = tools.get_bytes(0, 512) + return cfg_binary + + def _add_boardcfg(self, bcfgtype, bcfgdata): + size = len(bcfgdata) + desc = struct.pack(self.fmt, bcfgtype, + self.binary_offset, size, self.devgrp, 0) + with open(self.descfile, "ab+") as desc_fh: + desc_fh.write(desc) + with open(self.bcfgfile, "ab+") as bcfg_fh: + bcfg_fh.write(bcfgdata) + self.binary_offset += size + self.index += 1 + + def _finalize(self): + try: + with open(self.descfile, "rb") as desc_fh: + with open(self.bcfgfile, "rb") as bcfg_fh: + with open(self.fh_file, 'ab+') as fh: + desc_fh.seek(0) + bcfg_fh.seek(0) + copyfileobj(desc_fh, fh) + copyfileobj(bcfg_fh, fh) + data = tools.read_file(self.fh_file) + except Exception as e: + tout.warning("Combined board config binary was not generated properly") + data = tools.get_bytes(0, 512) + rmtree(self.tmpdir) + return data + + def BuildSectionData(self, required): + if self.config_file is None: + self.binary_offset = 0 + self.tmpdir = tempfile.mkdtemp() + self.fh_file = os.path.join(self.tmpdir, "fh") + self.descfile = os.path.join(self.tmpdir, "desc") + self.bcfgfile = os.path.join(self.tmpdir, "bcfg") + try: + with open(self.fh_file, 'wb') as f: + t_bytes = f.write(struct.pack( + '<BB', self.num_elems, self.sw_rev)) + self.binary_offset += t_bytes + self.binary_offset += self.num_elems * struct.calcsize(self.fmt) + except Exception as e: + tout.warning("Combined board config header was not generated properly") + + if 'board-cfg' in self._entries: + self._add_boardcfg(BOARDCFG, self._entries_data['board-cfg']) + + if 'sec-cfg' in self._entries: + self._add_boardcfg(BOARDCFG_SEC, self._entries_data['sec-cfg']) + + if 'pm-cfg' in self._entries: + self._add_boardcfg(BOARDCFG_PM, self._entries_data['pm-cfg']) + + if 'rm-cfg' in self._entries: + self._add_boardcfg(BOARDCFG_RM, self._entries_data['rm-cfg']) + + data = self._finalize() + return data + + else: + with open(self.config_file, 'r') as f: + self.file_yaml = yaml.safe_load(f) + with open(self.schema_file, 'r') as sch: + self.schema_yaml = yaml.safe_load(sch) + try: + validate(self.file_yaml, self.schema_yaml) + except Exception as e: + tout.error(f"Schema validation error: {e}") + + data = self._generate_binaries() + return data + + def SetImagePos(self, image_pos): + Entry.SetImagePos(self, image_pos) + + def SetCalculatedProperties(self): + Entry.SetCalculatedProperties(self) + + def CheckEntries(self): + Entry.CheckEntries(self) diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 43b4f850a6..28b5bd19d5 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -97,6 +97,7 @@ ENV_DATA = b'var1=1\nvar2="2"' PRE_LOAD_MAGIC = b'UBSH' PRE_LOAD_VERSION = 0x11223344.to_bytes(4, 'big') PRE_LOAD_HDR_SIZE = 0x00001000.to_bytes(4, 'big') +TI_BOARD_CONFIG_DATA = b'\x00\x01'

# Subdirectory of the input dir to use to put test FDTs TEST_FDT_SUBDIR = 'fdts' @@ -6676,6 +6677,16 @@ fdt fdtmap Extract the devicetree blob from the fdtmap ['fit']) self.assertIn("Node '/fit': Missing tool: 'mkimage'", str(e.exception))

+ def testTIBoardConfig(self): + """Test that a schema validated board config file can be generated""" + data = self._DoReadFile('277_ti_board_cfg.dts') + self.assertEqual(TI_BOARD_CONFIG_DATA, data) + + def testTIBoardConfig(self): + """Test that a schema validated combined board config file can be generated""" + data = self._DoReadFile('278_ti_board_cfg_combined.dts') + configlen_noheader = TI_BOARD_CONFIG_DATA*4 + self.assertGreater(data, configlen_noheader)

if __name__ == "__main__": unittest.main() diff --git a/tools/binman/test/277_ti_board_cfg.dts b/tools/binman/test/277_ti_board_cfg.dts new file mode 100644 index 0000000000..8b1b210d9d --- /dev/null +++ b/tools/binman/test/277_ti_board_cfg.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + binman { + ti-board-config { + config = "tools/binman/test/yaml/config.yaml"; + schema = "tools/binman/test/yaml/schema.yaml"; + }; + }; +}; diff --git a/tools/binman/test/278_ti_board_cfg_combined.dts b/tools/binman/test/278_ti_board_cfg_combined.dts new file mode 100644 index 0000000000..54cb383d90 --- /dev/null +++ b/tools/binman/test/278_ti_board_cfg_combined.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + binman { + ti-board-config { + board-cfg { + config = "tools/binman/test/yaml/config.yaml"; + schema = "tools/binman/test/yaml/schema.yaml"; + }; + sec-cfg { + config = "tools/binman/test/yaml/config.yaml"; + schema = "tools/binman/test/yaml/schema.yaml"; + }; + rm-cfg { + config = "tools/binman/test/yaml/config.yaml"; + schema = "tools/binman/test/yaml/schema.yaml"; + }; + pm-cfg { + config = "tools/binman/test/yaml/config.yaml"; + schema = "tools/binman/test/yaml/schema.yaml"; + }; + }; + }; +}; diff --git a/tools/binman/test/yaml/config.yaml b/tools/binman/test/yaml/config.yaml new file mode 100644 index 0000000000..5b17e78af9 --- /dev/null +++ b/tools/binman/test/yaml/config.yaml @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Test config +# +--- + +main-branch: + small-branch: + a: 0x0 + b: 0x1 diff --git a/tools/binman/test/yaml/schema.yaml b/tools/binman/test/yaml/schema.yaml new file mode 100644 index 0000000000..44f08bb6b0 --- /dev/null +++ b/tools/binman/test/yaml/schema.yaml @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Test schema +# +--- + +definitions: + u8: + type: integer + minimum: 0 + maximum: 0xff + +type: object +properties: + main-branch: + type: object + properties: + small-branch: + type: object + properties: + a: + $ref: "#/definitions/u8" + b: + $ref: "#/definitions/u8" +

The ti-secure entry contains certificate for binaries that will be loaded or booted by system firmware whereas the ti-secure-rom entry contains certificate for binaries that will be booted by ROM. Support for both these types of certificates is necessary for booting of K3 devices.

Signed-off-by: Neha Malcom Francis n-francis@ti.com --- board/ti/keys/custMpk.pem | 51 ++++ board/ti/keys/ti-degenerate-key.pem | 10 + tools/binman/btool/openssl.py | 244 ++++++++++++++++++ tools/binman/entries.rst | 25 ++ tools/binman/etype/ti_secure.py | 83 ++++++ tools/binman/etype/ti_secure_rom.py | 233 +++++++++++++++++ tools/binman/etype/x509_cert.py | 87 ++++++- tools/binman/ftest.py | 46 ++++ tools/binman/test/279_ti_secure.dts | 17 ++ tools/binman/test/280_ti_secure_rom.dts | 17 ++ .../test/281_ti_secure_rom_combined.dts | 25 ++ 11 files changed, 830 insertions(+), 8 deletions(-) create mode 100644 board/ti/keys/custMpk.pem create mode 100644 board/ti/keys/ti-degenerate-key.pem create mode 100644 tools/binman/etype/ti_secure.py create mode 100644 tools/binman/etype/ti_secure_rom.py create mode 100644 tools/binman/test/279_ti_secure.dts create mode 100644 tools/binman/test/280_ti_secure_rom.dts create mode 100644 tools/binman/test/281_ti_secure_rom_combined.dts

diff --git a/board/ti/keys/custMpk.pem b/board/ti/keys/custMpk.pem new file mode 100644 index 0000000000..adba378c80 --- /dev/null +++ b/board/ti/keys/custMpk.pem @@ -0,0 +1,51 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIJKQIBAAKCAgEAvxSuSdh/ctNrI83rSA5l3CJN8g5PgvbttfLd23yR+m5Z/9X3 +tt4EHYrM0pXZ0eDEwfhQv/9IDJEiUJpMe4vzlgooJrOk2eCpVUEa+z5bJ2y/ysBx +ry9yIu5GASVirT7HBPaxGLYswBJuD+KbPuWmoKgGRQNBF04WH6l01oRO1nmnELgR +qQ6SHyXdf7Hy0bnyaNgzWUuCfXfM0Zz6I7T7WIjyzerVFvIsdS36YsPBCW7gBnDg +tQcJmWLZ1uTnbG3IggdQk/fi2O3RX+PQns+TVNlf3V3ON2DxqxSKBHtlp7p/30VF +fEuhW65OxpQ9jE6H0pQ8pPOf2vzyNnznDa1aQjfxKoHQbqGnZwMeh+0Au3NKaCgx +ooKaowTB6If/RX6qwZ/UOwXHg/0hcf69fzjJFhlSDuYDM40dHsk2HM1OnYIpiM2b +Kr5sX3uysjp5AGp99a0anR7NWCrPXvROgKs7T9341N40osQg2VkZLYUCXh9osUyN +uREG6S12tViMUKg3bmZ4b4MwRk00n7QYSrm7+nvFrtYyEISEbD+agDM1/E281W5g +VFDPfm2AlwT6jwsg/b2YK6E3vVn9SuxFoQmLF8lyFDO3BV4SXeJaHc4hVPbh6tVV +qifrTQnfGUCCLmaJF2XZbrPWOE6NYRbWdNTeFl9RGdVCuIPSyN5LqWmXto0CAwEA +AQKCAgAzkAwcJ0z1GnId/lJQZno8NhGckRoJuEKbR8dwlCP8VUz6Ca5H7Y9kvXDa +Hs/hn+rYgP6hYOz7XyrIX2rmJ/T6dxEwqGeC1+o59FConcIRWHpE5zuGT6JYJL5F +TuZa48bm4v8VMQvQZOjIZpkIFwao8c6HTwKAnHTB5IN/48I2hCt+Cn3RhfoOZ7Rm +4gkpaSkt+7GXlhXHb82YfujNO+hbktEamhUYlQ9EK70Wa8aqmf3gHxO0JgsEFjW8 +lJaSnultlTW8SDcx3LMUUjCYumECk4oX/VlJfmKYjPlVjkr3QQ+Cm3nNucb4K4hc +c+JL+2ERhSj8RjXL7VgbNgdPnIjvQDJuTNqecTU8xWPYrkOLQpNibbLjnutLkhJz +fMyRtmDtrsey8WiCDuCHkPJ8/f8RjL2zWI9fzTDDIzdlEKouUFGOovaHVnbua6pn +hymcu9d9FV3p2rcbj0ivCs7e8j+vhSxFJEJoAbcQdXCTi/n2uR7pLtoMNiUzsejy +d46Uz+KEU920NTwE2z6JJq8I2vegnxjc7PDDrV3/5rK04B93aXiqvwWseCpxelrI +xaMkRHbXrIXRO6MXQ3N+zNq8Dg3hjGTTvaBKuwgvqLwlXY8+Aa3ooFzEOInIOSsI +XcWqXxt/tgZgsj9RwpC42t8kbA+BkbNk9EIUa+P5kEr2P/fO7QKCAQEA4EtArnOX +D6tQF8uTw8USOZC2P9s/ez1z4jRq3oKP0Kv4tJiuIObJ/dUvGVD7aM5v2xaCfhm8 +xpk09VPUgghfG5jR5qVvQr75kCNToJQudWi4ngk1HwKJzzTO11giFEdybvTUA+Pj +fmxCM0dYYqRWZoj0hLqXlUCwxE74BFIhJVjeYbf+nTQrqpllTLoW7MTZHzGx5SXx +4dNzyVAUH49Yt2D8mgXXCkf5sGLh762wj34b/rR10Kr4O5utGMZrfTRIbuQ1pNjU +m66baPzq+mC0BzqZEW70TgEb7lOr8rcVXLOi3r36omfd9/MHx7iZD6o3K1axSO15 +grD4ZrN7Ac3QJwKCAQEA2heCoBdpvy6YUk8AO2k8qDygTdmPQRuwjjT+Z2fMslBt +D7DkpKwZ6Bl9OclcpiiLHmH+hv65KqYg+tR0RRb7PcogB9El9x7yKkGTPZEYWGky +n8P84rJpKwjnwWQvPQktI1cs3YGvZA9DQTFBavRrwuzgd1oSJq5aPQ2tme0kMvWp +l1/B/cPK+PKCi/Wfisaze1TjijP9qIeUwkdNN6WLrLU3QgsGppcg2I7RQtAIikT6 +GkuiOQAvWMsrJVV6PNrVKz4fJDJ59Rz6jbDHZNi1MEYNxQoB/Pl7QIakbfjWpHLv +8Ey7cB2JKxjQy8tmyl8WNQVbXbE6daPXcMTUmaRAKwKCAQBv1lYMJmq+T2eCVen6 +BbvOpE+bi5EdvEiaFBTtmiBnpjg+pJq+oRU60h/H+c9CNR0lGxY6Fk9An4f+g6xE +ojP6KLsQzJCrsVny+wpp2TlJJcxYULMCIVvhy60PR0zG29E9biqBPhJjKUvhEcQK +e3LxcXyq6fdHXphFajLUxLbuTl+kTgBRFoBnclFGbsubh5PTsA3J+p+fQLZNPPar +veg4l82cZykQYU8pGkUaI3sUMYd3+zd7sqRP5JHs9pMGPRmY4YW2CsAIWIn5UZNB +ARMDP76vKKn8cyUgMuxb+9pU/OVLN2NPs4bEaZQJjAwV+YPEwldny7F47xEM9JVz +EtKlAoIBAQDUt62u3GdGE/p5/ZgqWoDRTyDEDfmN9aYFbmbdEP80xQE7FrxMaZhz +K7laja6SWmUm40nQ/c45bQQp4uLtKHcxU15egX7YRBTLZl5o5IasZR79ebnEm2O8 +l9kEZeU1USf3mmWmP4GExOZCRfqaiYA6BbUCdJXTqKdXeWnkAssV8UrS3JFoJHpq +yo7OWGqefyQ8nRW6jO9SW7uaqtUD+7H6aF5XSk3YWvusfdBZrHNH+fM/hpnZovaL +Us7ogTDS/laA8PyK37jYfMVdQhmZoU1Iomt3zkUWK3gt/aWPpfAlQf4Jka4YspZB +tNiijefaZ1hPqsPs5Joyd/YAhdsfaHc1AoIBAQCn/9j6RRjRaw0ip756oad4AXHz +XBwVB2CrY96qT6Hj9Sq7tGgdskqGkOQkAivBLBizUdcWv0t1yenOsSgasQeMlvlh +B8md9cLvpKXPB3HM3rTDH/xNXe0TpVKLf7SXC8HfDyIweHwMW3QgO2DWrvI4BV/T +ckBatRNQ90HxkqGFhC/Mp529lQlyg3ifxPxJsvZOyPMUnrflAvsKQk5c2ZiQg3nZ +h7I2pjSYgCl+Ib52l8p9bf1kcrVGgPM+auzm496i0RPobFeDBoBvSoznJktHJ7+3 +NnZH+jLiZCODiQPGtQUi+T6eIZUIJF0YASpsCCtUzXCxwW3lYIDNy7UlMivF +-----END RSA PRIVATE KEY----- diff --git a/board/ti/keys/ti-degenerate-key.pem b/board/ti/keys/ti-degenerate-key.pem new file mode 100644 index 0000000000..bd7d3745ad --- /dev/null +++ b/board/ti/keys/ti-degenerate-key.pem @@ -0,0 +1,10 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIBWwIBAAKBgQDRfrnXQaP0k6vRK/gZ+bDflSU6y1JagGeQ/b+QYuiDz14japog +8fRSu5WBsAxaSaySAUwS3L9Ppw+hGMecmyIJ494aMfZTtk1g49gU58joduiRnu7e +QSZHMnehhuNlfD7A2tAAKnxIYuabs8zHYM/SS9Ne7t3kIQMbKfUSzNy6qQIBAQIB +AQJBAOelUA376o6w3HkShXfN+shaOZYqFuTJ9exLMwsLp7DZKXB5F9I4JJ+Vkvho +k6QWs7vkhleLSYUZknXHYm26ZE0CQQDnhTtd4PTBoZPjPXOeYMJFtEdMNy0XP6ey +bcce389ugoY7BEkvASrd8PHgJQHziepgWOG4DGp33c64Hfq4zI3NAgEBAgEBAkA0 +RbK4uqoLciQluesTPU6lBy7Se3Dw0F9xBqlF5SR4KI6q+zQrHpBKyFOofMHZgizR +iCrL55cxEM146zMw3AnF +-----END RSA PRIVATE KEY----- diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py index 3a4dbdd6d7..aad3b61ae2 100644 --- a/tools/binman/btool/openssl.py +++ b/tools/binman/btool/openssl.py @@ -15,6 +15,13 @@ import hashlib from binman import bintool from u_boot_pylib import tools

+ +VALID_SHAS = [256, 384, 512, 224] +SHA_OIDS = {256:'2.16.840.1.101.3.4.2.1', + 384:'2.16.840.1.101.3.4.2.2', + 512:'2.16.840.1.101.3.4.2.3', + 224:'2.16.840.1.101.3.4.2.4'} + class Bintoolopenssl(bintool.Bintool): """openssl tool

@@ -74,6 +81,243 @@ imageSize = INTEGER:{len(indata)} '-sha512'] return self.run_cmd(*args)

+ def x509_cert_sysfw(self, cert_fname, input_fname, key_fname, sw_rev, + config_fname, req_dist_name_dict): + """Create a certificate to be booted by system firmware + + Args: + cert_fname (str): Filename of certificate to create + input_fname (str): Filename containing data to sign + key_fname (str): Filename of .pem file + sw_rev (int): Software revision + config_fname (str): Filename to write fconfig into + req_dist_name_dict (dict): Dictionary containing key-value pairs of + req_distinguished_name section extensions, must contain extensions for + C, ST, L, O, OU, CN and emailAddress + + Returns: + str: Tool output + """ + indata = tools.read_file(input_fname) + hashval = hashlib.sha512(indata).hexdigest() + with open(config_fname, 'w', encoding='utf-8') as outf: + print(f'''[ req ] +distinguished_name = req_distinguished_name +x509_extensions = v3_ca +prompt = no +dirstring_type = nobmp + +[ req_distinguished_name ] +C = {req_dist_name_dict['C']} +ST = {req_dist_name_dict['ST']} +L = {req_dist_name_dict['L']} +O = {req_dist_name_dict['O']} +OU = {req_dist_name_dict['OU']} +CN = {req_dist_name_dict['CN']} +emailAddress = {req_dist_name_dict['emailAddress']} + +[ v3_ca ] +basicConstraints = CA:true +1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv +1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity +1.3.6.1.4.1.294.1.35 = ASN1:SEQUENCE:sysfw_image_load + +[ swrv ] +swrv = INTEGER:{sw_rev} + +[ sysfw_image_integrity ] +shaType = OID:2.16.840.1.101.3.4.2.3 +shaValue = FORMAT:HEX,OCT:{hashval} +imageSize = INTEGER:{len(indata)} + +[ sysfw_image_load ] +destAddr = FORMAT:HEX,OCT:00000000 +authInPlace = INTEGER:2 +''', file=outf) + args = ['req', '-new', '-x509', '-key', key_fname, '-nodes', + '-outform', 'DER', '-out', cert_fname, '-config', config_fname, + '-sha512'] + return self.run_cmd(*args) + + def x509_cert_rom(self, cert_fname, input_fname, key_fname, sw_rev, + config_fname, req_dist_name_dict, cert_type, bootcore, + bootcore_opts, load_addr, sha): + """Create a certificate + + Args: + cert_fname (str): Filename of certificate to create + input_fname (str): Filename containing data to sign + key_fname (str): Filename of .pem file + sw_rev (int): Software revision + config_fname (str): Filename to write fconfig into + req_dist_name_dict (dict): Dictionary containing key-value pairs of + req_distinguished_name section extensions, must contain extensions for + C, ST, L, O, OU, CN and emailAddress + cert_type (int): Certification type + bootcore (int): Booting core + load_addr (int): Load address of image + sha (int): Hash function + + Returns: + str: Tool output + """ + indata = tools.read_file(input_fname) + hashval = hashlib.sha512(indata).hexdigest() + with open(config_fname, 'w', encoding='utf-8') as outf: + print(f''' +[ req ] + distinguished_name = req_distinguished_name + x509_extensions = v3_ca + prompt = no + dirstring_type = nobmp + + [ req_distinguished_name ] +C = {req_dist_name_dict['C']} +ST = {req_dist_name_dict['ST']} +L = {req_dist_name_dict['L']} +O = {req_dist_name_dict['O']} +OU = {req_dist_name_dict['OU']} +CN = {req_dist_name_dict['CN']} +emailAddress = {req_dist_name_dict['emailAddress']} + + [ v3_ca ] + basicConstraints = CA:true + 1.3.6.1.4.1.294.1.1 = ASN1:SEQUENCE:boot_seq + 1.3.6.1.4.1.294.1.2 = ASN1:SEQUENCE:image_integrity + 1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv +# 1.3.6.1.4.1.294.1.4 = ASN1:SEQUENCE:encryption + 1.3.6.1.4.1.294.1.8 = ASN1:SEQUENCE:debug + + [ boot_seq ] + certType = INTEGER:{cert_type} + bootCore = INTEGER:{bootcore} + bootCoreOpts = INTEGER:{bootcore_opts} + destAddr = FORMAT:HEX,OCT:{load_addr:08x} + imageSize = INTEGER:{len(indata)} + + [ image_integrity ] + shaType = OID:{SHA_OIDS[sha]} + shaValue = FORMAT:HEX,OCT:{hashval} + + [ swrv ] + swrv = INTEGER:{sw_rev} + +# [ encryption ] +# initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV +# randomString = FORMAT:HEX,OCT:TEST_IMAGE_ENC_RS +# iterationCnt = INTEGER:TEST_IMAGE_KEY_DERIVE_INDEX +# salt = FORMAT:HEX,OCT:TEST_IMAGE_KEY_DERIVE_SALT + + [ debug ] + debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000 + debugType = INTEGER:4 + coreDbgEn = INTEGER:0 + coreDbgSecEn = INTEGER:0 +''', file=outf) + args = ['req', '-new', '-x509', '-key', key_fname, '-nodes', + '-outform', 'DER', '-out', cert_fname, '-config', config_fname, + '-sha512'] + return self.run_cmd(*args) + + def x509_cert_rom_combined(self, cert_fname, input_fname, key_fname, sw_rev, + config_fname, req_dist_name_dict, load_addr, sha, total_size, num_comps, + sysfw_inner_cert_ext_boot_sequence_string, dm_data_ext_boot_sequence_string, + imagesize_sbl, hashval_sbl, load_addr_sysfw, imagesize_sysfw, + hashval_sysfw, load_addr_sysfw_data, imagesize_sysfw_data, + hashval_sysfw_data, sysfw_inner_cert_ext_boot_block, + dm_data_ext_boot_block): + """Create a certificate + + Args: + cert_fname (str): Filename of certificate to create + input_fname (str): Filename containing data to sign + key_fname (str): Filename of .pem file + sw_rev (int): Software revision + config_fname (str): Filename to write fconfig into + req_dist_name_dict (dict): Dictionary containing key-value pairs of + req_distinguished_name section extensions, must contain extensions for + C, ST, L, O, OU, CN and emailAddress + cert_type (int): Certification type + bootcore (int): Booting core + load_addr (int): Load address of image + sha (int): Hash function + + Returns: + str: Tool output + """ + indata = tools.read_file(input_fname) + hashval = hashlib.sha512(indata).hexdigest() + sha_type = SHA_OIDS[sha] + with open(config_fname, 'w', encoding='utf-8') as outf: + print(f''' +[ req ] +distinguished_name = req_distinguished_name +x509_extensions = v3_ca +prompt = no +dirstring_type = nobmp + +[ req_distinguished_name ] +C = {req_dist_name_dict['C']} +ST = {req_dist_name_dict['ST']} +L = {req_dist_name_dict['L']} +O = {req_dist_name_dict['O']} +OU = {req_dist_name_dict['OU']} +CN = {req_dist_name_dict['CN']} +emailAddress = {req_dist_name_dict['emailAddress']} + +[ v3_ca ] +basicConstraints = CA:true +1.3.6.1.4.1.294.1.3=ASN1:SEQUENCE:swrv +1.3.6.1.4.1.294.1.9=ASN1:SEQUENCE:ext_boot_info + +[swrv] +swrv=INTEGER:{sw_rev} + +[ext_boot_info] +extImgSize=INTEGER:{total_size} +numComp=INTEGER:{num_comps} +sbl=SEQUENCE:sbl +sysfw=SEQUENCE:sysfw +sysfw_data=SEQUENCE:sysfw_data +{sysfw_inner_cert_ext_boot_sequence_string} +{dm_data_ext_boot_sequence_string} + +[sbl] +compType = INTEGER:1 +bootCore = INTEGER:16 +compOpts = INTEGER:0 +destAddr = FORMAT:HEX,OCT:{load_addr:08x} +compSize = INTEGER:{imagesize_sbl} +shaType = OID:{sha_type} +shaValue = FORMAT:HEX,OCT:{hashval_sbl} + +[sysfw] +compType = INTEGER:2 +bootCore = INTEGER:0 +compOpts = INTEGER:0 +destAddr = FORMAT:HEX,OCT:{load_addr_sysfw:08x} +compSize = INTEGER:{imagesize_sysfw} +shaType = OID:{sha_type} +shaValue = FORMAT:HEX,OCT:{hashval_sysfw} + +[sysfw_data] +compType = INTEGER:18 +bootCore = INTEGER:0 +compOpts = INTEGER:0 +destAddr = FORMAT:HEX,OCT:{load_addr_sysfw_data:08x} +compSize = INTEGER:{imagesize_sysfw_data} +shaType = OID:{sha_type} +shaValue = FORMAT:HEX,OCT:{hashval_sysfw_data} + +{sysfw_inner_cert_ext_boot_block} + +{dm_data_ext_boot_block} + ''', file=outf) + args = ['req', '-new', '-x509', '-key', key_fname, '-nodes', + '-outform', 'DER', '-out', cert_fname, '-config', config_fname, + '-sha512'] + return self.run_cmd(*args) + def fetch(self, method): """Fetch handler for openssl

diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index 7cfe61dd09..e240d5ce62 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -2473,3 +2473,28 @@ my-combined-ti-board-config { };

+ +.. _etype_ti_secure: + +Entry: ti-secure: Texas Instruments secured binary +------------------------------------------------------------- + +Support for generation of TI secured binary blobs + +Properties / Entry arguments: + - content: List of phandles to entries to sign + - keyfile: Filename of file containing key to sign binary with + - sha: Hash function to be used for signing + +Output files: + - input.<unique_name> - input file passed to openssl + - config.<unique_name> - input file generated for openssl (which is + used as the config file) + - cert.<unique_name> - output file generated by openssl (which is + used as the entry contents) + +openssl signs the provided data, using the TI templated config file and +writes the signature in this entry. This allows verification that the +data is genuine. + + diff --git a/tools/binman/etype/ti_secure.py b/tools/binman/etype/ti_secure.py new file mode 100644 index 0000000000..bf58d359b8 --- /dev/null +++ b/tools/binman/etype/ti_secure.py @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 20 +# Written by Neha Malcom Francis n-francis@ti.com +# + +# Support for generation of TI secured binary blobs + +from collections import OrderedDict +import os + +from binman.entry import EntryArg +from binman.etype.x509_cert import Entry_x509_cert + +import hashlib + +from dtoc import fdt_util +from u_boot_pylib import tools + +class Entry_ti_secure(Entry_x509_cert): + """ + Support for generation of TI secured binary blobs + + Properties / Entry arguments: + - content: List of phandles to entries to sign + - keyfile: Filename of file containing key to sign binary with + - sha: Hash function to be used for signing + + Output files: + - input.<unique_name> - input file passed to openssl + - config.<unique_name> - input file generated for openssl (which is + used as the config file) + - cert.<unique_name> - output file generated by openssl (which is + used as the entry contents) + + openssl signs the provided data, using the TI templated config file and + writes the signature in this entry. This allows verification that the + data is genuine. + """ + def __init__(self, section, etype, node): + super().__init__(section, etype, node) + self.openssl = None + + def ReadNode(self): + super().ReadNode() + self.key_fname = self.GetEntryArgsOrProps([ + EntryArg('keyfile', str)], required=True)[0] + self.sha = fdt_util.GetInt(self._node, 'sha', 512) + self.req_dist_name = {'C': 'US', + 'ST': 'TX', + 'L': 'Dallas', + 'O': 'Texas Instruments Incorporated', + 'OU': 'Processors', + 'CN': 'TI Support', + 'emailAddress': 'support@ti.com'} + + def GetCertificate(self, required): + """Get the contents of this entry + + Args: + required: True if the data must be present, False if it is OK to + return None + + Returns: + bytes content of the entry, which is the signed vblock for the + provided data + """ + return super().GetCertificate(required=required, type='sysfw') + + def ObtainContents(self): + data = self.GetCertificate(False) + if data is None: + return False + self.SetContents(data) + return True + + def ProcessContents(self): + # The blob may have changed due to WriteSymbols() + data = self.GetCertificate(True) + return self.ProcessContentsUpdate(data) + + def AddBintools(self, btools): + super().AddBintools(btools) + self.openssl = self.AddBintool(btools, 'openssl') diff --git a/tools/binman/etype/ti_secure_rom.py b/tools/binman/etype/ti_secure_rom.py new file mode 100644 index 0000000000..1e7bb84aef --- /dev/null +++ b/tools/binman/etype/ti_secure_rom.py @@ -0,0 +1,233 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 20 +# Written by Neha Malcom Francis n-francis@ti.com +# + +# Support for generation of TI secured bootloaders booted by ROM + +from collections import OrderedDict +import os + +from binman.entry import EntryArg +from binman.etype.x509_cert import Entry_x509_cert + +import hashlib + +from dtoc import fdt_util +from u_boot_pylib import tools + +VALID_SHAS = [256, 384, 512, 224] +SHA_OIDS = {256:'2.16.840.1.101.3.4.2.1', + 384:'2.16.840.1.101.3.4.2.2', + 512:'2.16.840.1.101.3.4.2.3', + 224:'2.16.840.1.101.3.4.2.4'} + +class Entry_ti_secure_rom(Entry_x509_cert): + """ + Support for generation of TI secured bootloaders booted by ROM + + Properties / Entry arguments: + - keyfile: Filename of file containing key to sign binary with + - combined: boolean if device follows combined boot flow + - countersign: boolean if device contains countersigned system firmware + - load: load address of SPL + - sw-rev: software revision + - sha: Hash function to be used for signing + - core: core on which bootloader runs, valid cores are 'secure' and 'public' + In case of legacy bootflow: + - content: phandle of SPL + In case of combined bootflow: + - sysfw-inner-cert: boolean if binary contains sysfw inner certificate + - dm-data: boolean if binary contains dm-data binary + - content-sbl: phandle of SPL binary + - content-sysfw: phandle of sysfw binary + - content-sysfw-data: phandle of sysfw-data or tifs-data binary + - content-sysfw-inner-cert (optional): phandle of sysfw inner certificate binary + - content-dm-data (optional): phandle of dm-data binary + - load-sysfw: load address of sysfw binary + - load-sysfw-data: load address of sysfw-data or tifs-data binary + - load-sysfw-inner-cert (optional): load address of sysfw inner certificate binary + - load-dm-data (optional): load address of dm-data binary + + + Output files: + - input.<unique_name> - input file passed to openssl + - config.<unique_name> - input file generated for openssl (which is + used as the config file) + - cert.<unique_name> - output file generated by openssl (which is + used as the entry contents) + + openssl signs the provided data, using the TI templated config file and + writes the signature in this entry. This allows verification that the + data is genuine.""" + def __init__(self, section, etype, node): + super().__init__(section, etype, node) + self.openssl = None + + def ReadNode(self): + super().ReadNode() + self.combined = fdt_util.GetBool(self._node, 'combined', False) + self.countersign = fdt_util.GetBool(self._node, 'countersign', False) + self.load_addr = fdt_util.GetInt(self._node, 'load', 0x00000000) + self.sw_rev = fdt_util.GetInt(self._node, 'sw-rev', 1) + self.sha = fdt_util.GetInt(self._node, 'sha', 512) + self.core = fdt_util.GetString(self._node, 'core', 'secure') + self.key_fname = self.GetEntryArgsOrProps([ + EntryArg('keyfile', str)], required=True)[0] + if self.combined: + self.sysfw_inner_cert = fdt_util.GetBool(self._node, 'sysfw-inner-cert', False) + self.load_addr_sysfw = fdt_util.GetInt(self._node, 'load-sysfw', 0x00000000) + self.load_addr_sysfw_data = fdt_util.GetInt(self._node, 'load-sysfw-data', 0x00000000) + self.dm_data = fdt_util.GetBool(self._node, 'dm-data', False) + if self.dm_data: + self.load_addr_dm_data = fdt_util.GetInt(self._node, 'load-dm-data', 0x00000000) + self.req_dist_name = {'C': 'US', + 'ST': 'TX', + 'L': 'Dallas', + 'O': 'Texas Instruments Incorporated', + 'OU': 'Processors', + 'CN': 'TI Support', + 'emailAddress': 'support@ti.com'} + + def NonCombinedGetCertificate(self, required): + if self.core == 'secure': + if self.countersign: + self.cert_type = 2 + else: + self.cert_type = 3 + self.bootcore = 0 + self.bootcore_opts = 32 + else: + self.cert_type = 1 + self.bootcore = 16 + if self.combined: + self.bootcore_opts = 32 + else: + self.bootcore_opts = 0 + return super().GetCertificate(required=required, type='rom') + + def CombinedGetCertificate(self, required): + uniq = self.GetUniqueName() + + self.num_comps = 3 + self.sha_type = SHA_OIDS[self.sha] + + # sbl + self.content = fdt_util.GetPhandleList(self._node, 'content-sbl') + input_data_sbl = self.GetContents(required) + if input_data_sbl is None: + return None + + input_fname_sbl = tools.get_output_filename('input.%s' % uniq) + tools.write_file(input_fname_sbl, input_data_sbl) + + indata_sbl = tools.read_file(input_fname_sbl) + self.hashval_sbl = hashlib.sha512(indata_sbl).hexdigest() + self.imagesize_sbl = len(indata_sbl) + + # sysfw + self.content = fdt_util.GetPhandleList(self._node, 'content-sysfw') + input_data_sysfw = self.GetContents(required) + if input_data_sysfw is None: + return None + + input_fname_sysfw = tools.get_output_filename('input.%s' % uniq) + tools.write_file(input_fname_sysfw, input_data_sysfw) + + indata_sysfw = tools.read_file(input_fname_sysfw) + self.hashval_sysfw = hashlib.sha512(indata_sysfw).hexdigest() + self.imagesize_sysfw = len(indata_sysfw) + + # sysfw data + self.content = fdt_util.GetPhandleList(self._node, 'content-sysfw-data') + input_data_sysfw_data = self.GetContents(required) + if input_data_sysfw_data is None: + return None + + input_fname_sysfw_data = tools.get_output_filename('input.%s' % uniq) + tools.write_file(input_fname_sysfw_data, input_data_sysfw_data) + + indata_sysfw_data = tools.read_file(input_fname_sysfw_data) + self.hashval_sysfw_data = hashlib.sha512(indata_sysfw_data).hexdigest() + self.imagesize_sysfw_data = len(indata_sysfw_data) + + # sysfw inner cert + if self.sysfw_inner_cert: + self.content = fdt_util.GetPhandleList(self._node, 'content-sysfw-inner-cert') + input_data_sysfw_inner_cert = self.GetContents(required) + if input_data_sysfw_inner_cert is None: + return None + + input_fname_sysfw_inner_cert = tools.get_output_filename('input.%s' % uniq) + tools.write_file(input_fname_sysfw_inner_cert, input_data_sysfw_inner_cert) + + indata_sysfw_inner_cert = tools.read_file(input_fname_sysfw_inner_cert) + hashval_sysfw_inner_cert = hashlib.sha512(indata_sysfw_inner_cert).hexdigest() + imagesize_sysfw_inner_cert = len(indata_sysfw_inner_cert) + self.num_comps += 1 + self.sysfw_inner_cert_ext_boot_sequence_string = "sysfw_inner_cert=SEQUENCE:sysfw_inner_cert" + self.sysfw_inner_cert_ext_boot_block = f"""[sysfw_inner_cert] +compType = INTEGER:3 +bootCore = INTEGER:0 +compOpts = INTEGER:0 +destAddr = FORMAT:HEX,OCT:00000000 +compSize = INTEGER:{imagesize_sysfw_inner_cert} +shaType = OID:{self.sha_type} +shaValue = FORMAT:HEX,OCT:{hashval_sysfw_inner_cert}""" + else: + self.sysfw_inner_cert_ext_boot_block = "" + self.sysfw_inner_cert_ext_boot_sequence_string = "" + imagesize_sysfw_inner_cert = 0 + + # dm data + if self.dm_data: + self.content = fdt_util.GetPhandleList(self._node, 'content-dm-data') + input_data_dm_data = self.GetContents(required) + if input_data_dm_data is None: + return None + + input_fname_dm_data = tools.get_output_filename('input.%s' % uniq) + tools.write_file(input_fname_dm_data, input_data_dm_data) + + indata_dm_data = tools.read_file(input_fname_dm_data) + hashval_dm_data = hashlib.sha512(indata_dm_data).hexdigest() + imagesize_dm_data = len(indata_dm_data) + self.num_comps += 1 + self.dm_data_ext_boot_sequence_string = "dm_data=SEQUENCE:dm_data" + self.dm_data_ext_boot_block = f"""[dm_data] +compType = INTEGER:17 +bootCore = INTEGER:16 +compOpts = INTEGER:0 +destAddr = FORMAT:HEX,OCT:{self.load_addr_dm_data:08x} +compSize = INTEGER:{imagesize_dm_data} +shaType = OID:{self.sha_type} +shaValue = FORMAT:HEX,OCT:{hashval_dm_data}""" + else: + self.dm_data_ext_boot_sequence_string = "" + self.dm_data_ext_boot_block = "" + imagesize_dm_data = 0 + + self.total_size = self.imagesize_sbl + self.imagesize_sysfw + self.imagesize_sysfw_data + imagesize_sysfw_inner_cert + imagesize_dm_data + return super().GetCertificate(required=required, type='rom-combined') + + def GetCertificate(self, required): + if self.combined: + return self.CombinedGetCertificate(required) + else: + return self.NonCombinedGetCertificate(required) + + def ObtainContents(self): + data = self.GetCertificate(False) + if data is None: + return False + self.SetContents(data) + return True + + def ProcessContents(self): + # The blob may have changed due to WriteSymbols() + data = self.GetCertificate(True) + return self.ProcessContentsUpdate(data) + + def AddBintools(self, btools): + super().AddBintools(btools) + self.openssl = self.AddBintool(btools, 'openssl') diff --git a/tools/binman/etype/x509_cert.py b/tools/binman/etype/x509_cert.py index f80a6ec2d1..d028cfe38c 100644 --- a/tools/binman/etype/x509_cert.py +++ b/tools/binman/etype/x509_cert.py @@ -31,6 +31,26 @@ class Entry_x509_cert(Entry_collection): def __init__(self, section, etype, node): super().__init__(section, etype, node) self.openssl = None + self.req_dist_name = None + self.cert_type = None + self.bootcore = None + self.bootcore_opts = None + self.load_addr = None + self.sha = None + self.total_size = None + self.num_comps = None + self.sysfw_inner_cert_ext_boot_sequence_string = None + self.dm_data_ext_boot_sequence_string = None + self.imagesize_sbl = None + self.hashval_sbl = None + self.load_addr_sysfw = None + self.imagesize_sysfw = None + self.hashval_sysfw = None + self.load_addr_sysfw_data = None + self.imagesize_sysfw_data = None + self.hashval_sysfw_data = None + self.sysfw_inner_cert_ext_boot_block = None + self.dm_data_ext_boot_block = None

def ReadNode(self): super().ReadNode() @@ -38,13 +58,16 @@ class Entry_x509_cert(Entry_collection): self._cert_rev = fdt_util.GetInt(self._node, 'cert-revision-int', 0) self.key_fname = self.GetEntryArgsOrProps([ EntryArg('keyfile', str)], required=True)[0] + self.sw_rev = fdt_util.GetInt(self._node, 'sw-rev', 1)

- def GetCertificate(self, required): + def GetCertificate(self, required, type='generic'): """Get the contents of this entry

Args: required: True if the data must be present, False if it is OK to return None + type: Type of x509 certificate to generate, current supported ones are + 'generic', 'sysfw', 'rom'

Returns: bytes content of the entry, which is the signed vblock for the @@ -60,13 +83,61 @@ class Entry_x509_cert(Entry_collection): input_fname = tools.get_output_filename('input.%s' % uniq) config_fname = tools.get_output_filename('config.%s' % uniq) tools.write_file(input_fname, input_data) - stdout = self.openssl.x509_cert( - cert_fname=output_fname, - input_fname=input_fname, - key_fname=self.key_fname, - cn=self._cert_ca, - revision=self._cert_rev, - config_fname=config_fname) + if type == 'generic': + stdout = self.openssl.x509_cert( + cert_fname=output_fname, + input_fname=input_fname, + key_fname=self.key_fname, + cn=self._cert_ca, + revision=self._cert_rev, + config_fname=config_fname) + elif type == 'sysfw': + stdout = self.openssl.x509_cert_sysfw( + cert_fname=output_fname, + input_fname=input_fname, + key_fname=self.key_fname, + config_fname=config_fname, + sw_rev=self.sw_rev, + req_dist_name_dict=self.req_dist_name) + elif type == 'rom': + stdout = self.openssl.x509_cert_rom( + cert_fname=output_fname, + input_fname=input_fname, + key_fname=self.key_fname, + config_fname=config_fname, + sw_rev=self.sw_rev, + req_dist_name_dict=self.req_dist_name, + cert_type=self.cert_type, + bootcore=self.bootcore, + bootcore_opts=self.bootcore_opts, + load_addr=self.load_addr, + sha=self.sha + ) + elif type == 'rom-combined': + stdout = self.openssl.x509_cert_rom_combined( + cert_fname=output_fname, + input_fname=input_fname, + key_fname=self.key_fname, + config_fname=config_fname, + sw_rev=self.sw_rev, + req_dist_name_dict=self.req_dist_name, + load_addr=self.load_addr, + sha=self.sha, + total_size=self.total_size, + num_comps=self.num_comps, + sysfw_inner_cert_ext_boot_sequence_string=self.sysfw_inner_cert_ext_boot_sequence_string, + dm_data_ext_boot_sequence_string=self.dm_data_ext_boot_sequence_string, + imagesize_sbl=self.imagesize_sbl, + hashval_sbl=self.hashval_sbl, + load_addr_sysfw=self.load_addr_sysfw, + imagesize_sysfw=self.imagesize_sysfw, + hashval_sysfw=self.hashval_sysfw, + load_addr_sysfw_data=self.load_addr_sysfw_data, + imagesize_sysfw_data=self.imagesize_sysfw_data, + hashval_sysfw_data=self.hashval_sysfw_data, + sysfw_inner_cert_ext_boot_block=self.sysfw_inner_cert_ext_boot_block, + dm_data_ext_boot_block=self.dm_data_ext_boot_block + ) if stdout is not None: data = tools.read_file(output_fname) else: diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 28b5bd19d5..61b71aa87e 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -98,6 +98,7 @@ PRE_LOAD_MAGIC = b'UBSH' PRE_LOAD_VERSION = 0x11223344.to_bytes(4, 'big') PRE_LOAD_HDR_SIZE = 0x00001000.to_bytes(4, 'big') TI_BOARD_CONFIG_DATA = b'\x00\x01' +TI_UNSECURE_DATA = b'unsecuredata'

# Subdirectory of the input dir to use to put test FDTs TEST_FDT_SUBDIR = 'fdts' @@ -208,6 +209,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA) TestFunctional._MakeInputFile('scp.bin', SCP_DATA) TestFunctional._MakeInputFile('rockchip-tpl.bin', ROCKCHIP_TPL_DATA) + TestFunctional._MakeInputFile('ti_unsecure.bin', TI_UNSECURE_DATA)

# Add a few .dtb files for testing TestFunctional._MakeInputFile('%s/test-fdt1.dtb' % TEST_FDT_SUBDIR, @@ -6688,5 +6690,49 @@ fdt fdtmap Extract the devicetree blob from the fdtmap configlen_noheader = TI_BOARD_CONFIG_DATA*4 self.assertGreater(data, configlen_noheader)

+ def testPackTiSecure(self): + """Test that an image with a TI secured binary can be created""" + keyfile = self.TestFile('key.key') + entry_args = { + 'keyfile': keyfile, + } + data = self._DoReadFileDtb('279_ti_secure.dts', + entry_args=entry_args)[0] + self.assertGreater(len(data), len(TI_UNSECURE_DATA)) + + def testPackTiSecureMissingTool(self): + """Test that an image with a TI secured binary (non-functional) can be created + when openssl is missing""" + keyfile = self.TestFile('key.key') + entry_args = { + 'keyfile': keyfile, + } + with test_util.capture_sys_output() as (_, stderr): + self._DoTestFile('279_ti_secure.dts', + force_missing_bintools='openssl', + entry_args=entry_args) + err = stderr.getvalue() + self.assertRegex(err, "Image 'image'.*missing bintools.*: openssl") + + def testPackTiSecureROM(self): + """Test that a ROM image with a TI secured binary can be created""" + keyfile = self.TestFile('key.key') + entry_args = { + 'keyfile': keyfile, + } + data = self._DoReadFileDtb('280_ti_secure_rom.dts', + entry_args=entry_args)[0] + self.assertGreater(len(data), len(TI_UNSECURE_DATA)) + + def testPackTiSecureROMCombined(self): + """Test that a ROM image with a TI secured binary can be created""" + keyfile = self.TestFile('key.key') + entry_args = { + 'keyfile': keyfile, + } + data = self._DoReadFileDtb('281_ti_secure_rom_combined.dts', + entry_args=entry_args)[0] + self.assertGreater(len(data), len(TI_UNSECURE_DATA)) + if __name__ == "__main__": unittest.main() diff --git a/tools/binman/test/279_ti_secure.dts b/tools/binman/test/279_ti_secure.dts new file mode 100644 index 0000000000..941d0ab4ca --- /dev/null +++ b/tools/binman/test/279_ti_secure.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + ti-secure { + content = <&unsecure_binary>; + }; + unsecure_binary: blob-ext { + filename = "ti_unsecure.bin"; + }; + }; +}; diff --git a/tools/binman/test/280_ti_secure_rom.dts b/tools/binman/test/280_ti_secure_rom.dts new file mode 100644 index 0000000000..d1313769f4 --- /dev/null +++ b/tools/binman/test/280_ti_secure_rom.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + ti-secure-rom { + content = <&unsecure_binary>; + }; + unsecure_binary: blob-ext { + filename = "ti_unsecure.bin"; + }; + }; +}; diff --git a/tools/binman/test/281_ti_secure_rom_combined.dts b/tools/binman/test/281_ti_secure_rom_combined.dts new file mode 100644 index 0000000000..bf872739bc --- /dev/null +++ b/tools/binman/test/281_ti_secure_rom_combined.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + ti-secure-rom { + content = <&unsecure_binary>; + content-sbl = <&unsecure_binary>; + content-sysfw = <&unsecure_binary>; + content-sysfw-data = <&unsecure_binary>; + content-sysfw-inner-cert = <&unsecure_binary>; + content-dm-data = <&unsecure_binary>; + combined; + sysfw-inner-cert; + dm-data; + }; + unsecure_binary: blob-ext { + filename = "ti_unsecure.bin"; + }; + }; +};

Schema file in YAML must be provided in board/ti/common for validating input config files and packaging system firmware. The schema includes entries for rm-cfg, board-cfg, pm-cfg and sec-cfg.

Board config file must be provided in board/ti/<devicename> in YAML. These can then be consumed for generation of binaries to package system firmware. Added YAML config for J721E in particular.

Signed-off-by: Tarun Sahu t-sahu@ti.com [n-francis@ti.com: prepared patch for upstreaming] Signed-off-by: Neha Malcom Francis n-francis@ti.com --- board/ti/common/schema.yaml | 355 +++++ board/ti/j721e/board-cfg.yaml | 37 + board/ti/j721e/pm-cfg.yaml | 13 + board/ti/j721e/rm-cfg.yaml | 2757 +++++++++++++++++++++++++++++++++ board/ti/j721e/sec-cfg.yaml | 379 +++++ 5 files changed, 3541 insertions(+) create mode 100644 board/ti/common/schema.yaml create mode 100644 board/ti/j721e/board-cfg.yaml create mode 100644 board/ti/j721e/pm-cfg.yaml create mode 100644 board/ti/j721e/rm-cfg.yaml create mode 100644 board/ti/j721e/sec-cfg.yaml

diff --git a/board/ti/common/schema.yaml b/board/ti/common/schema.yaml new file mode 100644 index 0000000000..070ff797e0 --- /dev/null +++ b/board/ti/common/schema.yaml @@ -0,0 +1,355 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Config schema for TI K3 devices +# + +--- + +definitions: + u8: + type: integer + minimum: 0 + maximum: 0xff + u16: + type: integer + minimum: 0 + maximum: 0xffff + u32: + type: integer + minimum: 0 + maximum: 0xffffffff + + + +type: object +properties: + pm-cfg: + type: object + properties: + rev: + type: object + properties: + boardcfg_abi_maj: + $ref: "#/definitions/u8" + boardcfg_abi_min: + $ref: "#/definitions/u8" + board-cfg: + type: object + properties: + rev: + type: object + properties: + boardcfg_abi_maj: + $ref: "#/definitions/u8" + boardcfg_abi_min: + $ref: "#/definitions/u8" + control: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + main_isolation_enable: + $ref: "#/definitions/u8" + main_isolation_hostid: + $ref: "#/definitions/u16" + + + secproxy: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + scaling_factor: + $ref: "#/definitions/u8" + scaling_profile: + $ref: "#/definitions/u8" + disable_main_nav_secure_proxy: + $ref: "#/definitions/u8" + + msmc: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + msmc_cache_size: + $ref: "#/definitions/u8" + debug_cfg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + trace_dst_enables: + $ref: "#/definitions/u16" + trace_src_enables: + $ref: "#/definitions/u16" + + sec-cfg: + type: object + properties: + rev: + type: object + properties: + boardcfg_abi_maj: + $ref: "#/definitions/u8" + boardcfg_abi_min: + $ref: "#/definitions/u8" + + processor_acl_list: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + proc_acl_entries: + type: array + minItems: 32 + maxItems: 32 + items: + type: object + properties: + processor_id: + $ref: "#/definitions/u8" + proc_access_master: + $ref: "#/definitions/u8" + proc_access_secondary: + type: array + minItems: 3 + maxItems: 3 + items: + $ref: "#/definitions/u8" + host_hierarchy: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + host_hierarchy_entries: + type: array + minItems: 32 + maxItems: 32 + items: + type: object + properties: + host_id: + $ref: "#/definitions/u8" + supervisor_host_id: + $ref: "#/definitions/u8" + + otp_config: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + otp_entry: + type: array + minItems: 32 + maxItems: 32 + items: + type: object + properties: + host_id: + $ref: "#/definitions/u8" + host_perms: + $ref: "#/definitions/u8" + write_host_id: + $ref: "#/definitions/u8" + + dkek_config: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + allowed_hosts: + type: array + minItems: 4 + maxItems: 4 + items: + $ref: "#/definitions/u8" + allow_dkek_export_tisci: + $ref: "#/definitions/u8" + rsvd: + type: array + minItems: 3 + maxItems: 3 + items: + $ref: "#/definitions/u8" + + sa2ul_cfg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + rsvd: + type: array + minItems: 4 + maxItems: 4 + items: + $ref: "#/definitions/u8" + sec_dbg_config: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + allow_jtag_unlock: + $ref: "#/definitions/u8" + allow_wildcard_unlock: + $ref: "#/definitions/u8" + allowed_debug_level_rsvd: + $ref: "#/definitions/u8" + rsvd: + $ref: "#/definitions/u8" + min_cert_rev: + $ref: "#/definitions/u32" + jtag_unlock_hosts: + type: array + minItems: 4 + maxItems: 4 + items: + $ref: "#/definitions/u8" + + + sec_handover_cfg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + handover_msg_sender: + $ref: "#/definitions/u8" + handover_to_host_id: + $ref: "#/definitions/u8" + rsvd: + type: array + minItems: 4 + maxItems: 4 + items: + $ref: "#/definitions/u8" + + rm-cfg: + type: object + properties: + rm_boardcfg: + type: object + properties: + rev: + type: object + properties: + boardcfg_abi_maj: + $ref: "#/definitions/u8" + boardcfg_abi_min: + $ref: "#/definitions/u8" + + host_cfg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + host_cfg_entries: + type: array + minItems: 0 + maxItems: 32 + items: + type: object + properties: + host_id: + $ref: "#/definitions/u8" + allowed_atype: + $ref: "#/definitions/u8" + allowed_qos: + $ref: "#/definitions/u16" + allowed_orderid: + $ref: "#/definitions/u32" + allowed_priority: + $ref: "#/definitions/u16" + allowed_sched_priority: + $ref: "#/definitions/u8" + resasg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + resasg_entries_size: + $ref: "#/definitions/u16" + reserved: + $ref: "#/definitions/u16" + + resasg_entries: + type: array + minItems: 0 + maxItems: 418 + items: + type: object + properties: + start_resource: + $ref: "#/definitions/u16" + num_resource: + $ref: "#/definitions/u16" + type: + $ref: "#/definitions/u16" + host_id: + $ref: "#/definitions/u8" + reserved: + $ref: "#/definitions/u8" diff --git a/board/ti/j721e/board-cfg.yaml b/board/ti/j721e/board-cfg.yaml new file mode 100644 index 0000000000..9f5e00b3dc --- /dev/null +++ b/board/ti/j721e/board-cfg.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for J721E +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable: 0x5A + main_isolation_hostid: 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor: 0x1 + scaling_profile: 0x1 + disable_main_nav_secure_proxy: 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size: 0x0 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables: 0x00 + trace_src_enables: 0x00 + diff --git a/board/ti/j721e/pm-cfg.yaml b/board/ti/j721e/pm-cfg.yaml new file mode 100644 index 0000000000..40a8dfb7af --- /dev/null +++ b/board/ti/j721e/pm-cfg.yaml @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for J721E +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + diff --git a/board/ti/j721e/rm-cfg.yaml b/board/ti/j721e/rm-cfg.yaml new file mode 100644 index 0000000000..2fc41f5e87 --- /dev/null +++ b/board/ti/j721e/rm-cfg.yaml @@ -0,0 +1,2757 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J721E +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - #1 + host_id: 3 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #2 + host_id: 5 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #3 + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #4 + host_id: 13 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #5 + host_id: 21 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #6 + host_id: 26 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #7 + host_id: 28 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #8 + host_id: 35 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #9 + host_id: 37 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #10 + host_id: 40 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #11 + host_id: 42 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #12 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #13 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #14 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #15 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #16 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #17 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #18 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #19 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #20 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #21 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #22 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #23 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #24 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #25 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #26 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #27 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #28 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #29 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #30 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #31 + host_id: 0 + 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+ host_id: 3 + reserved: 0 + - + start_resource: 12 + num_resource: 20 + type: 15168 + host_id: 3 + reserved: 0 + - + start_resource: 36 + num_resource: 28 + type: 15168 + host_id: 5 + reserved: 0 diff --git a/board/ti/j721e/sec-cfg.yaml b/board/ti/j721e/sec-cfg.yaml new file mode 100644 index 0000000000..0f62e51e9f --- /dev/null +++ b/board/ti/j721e/sec-cfg.yaml @@ -0,0 +1,379 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Security configuration for J721E +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - #1 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - #1 + host_id: 0 + supervisor_host_id: 0 + - #2 + host_id: 0 + supervisor_host_id: 0 + - #3 + host_id: 0 + supervisor_host_id: 0 + - #4 + host_id: 0 + supervisor_host_id: 0 + - #5 + host_id: 0 + supervisor_host_id: 0 + - #6 + host_id: 0 + supervisor_host_id: 0 + - #7 + host_id: 0 + supervisor_host_id: 0 + - #8 + host_id: 0 + supervisor_host_id: 0 + - #9 + host_id: 0 + supervisor_host_id: 0 + - #10 + host_id: 0 + supervisor_host_id: 0 + - #11 + host_id: 0 + supervisor_host_id: 0 + - #12 + host_id: 0 + supervisor_host_id: 0 + - #13 + host_id: 0 + supervisor_host_id: 0 + - #14 + host_id: 0 + supervisor_host_id: 0 + - #15 + host_id: 0 + supervisor_host_id: 0 + - #16 + host_id: 0 + supervisor_host_id: 0 + - #17 + host_id: 0 + supervisor_host_id: 0 + - #18 + host_id: 0 + supervisor_host_id: 0 + - #19 + host_id: 0 + supervisor_host_id: 0 + - #20 + host_id: 0 + supervisor_host_id: 0 + - #21 + host_id: 0 + supervisor_host_id: 0 + - #22 + host_id: 0 + supervisor_host_id: 0 + - #23 + host_id: 0 + supervisor_host_id: 0 + - #24 + host_id: 0 + supervisor_host_id: 0 + - #25 + host_id: 0 + supervisor_host_id: 0 + - #26 + host_id: 0 + supervisor_host_id: 0 + - #27 + host_id: 0 + supervisor_host_id: 0 + - #28 + host_id: 0 + supervisor_host_id: 0 + - #29 + host_id: 0 + supervisor_host_id: 0 + - #30 + host_id: 0 + supervisor_host_id: 0 + - #31 + host_id: 0 + supervisor_host_id: 0 + - #32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + otp_entry: + - #1 + host_id: 0 + host_perms: 0 + - #2 + host_id: 0 + host_perms: 0 + - #3 + host_id: 0 + host_perms: 0 + - #4 + host_id: 0 + host_perms: 0 + - #5 + host_id: 0 + host_perms: 0 + - #6 + host_id: 0 + host_perms: 0 + - #7 + host_id: 0 + host_perms: 0 + - #8 + host_id: 0 + host_perms: 0 + - #9 + host_id: 0 + host_perms: 0 + - #10 + host_id: 0 + host_perms: 0 + - #11 + host_id: 0 + host_perms: 0 + - #12 + host_id: 0 + host_perms: 0 + - #13 + host_id: 0 + host_perms: 0 + - #14 + host_id: 0 + host_perms: 0 + - #15 + host_id: 0 + host_perms: 0 + - #16 + host_id: 0 + host_perms: 0 + - #17 + host_id: 0 + host_perms: 0 + - #18 + host_id: 0 + host_perms: 0 + - #19 + host_id: 0 + host_perms: 0 + - #20 + host_id: 0 + host_perms: 0 + - #21 + host_id: 0 + host_perms: 0 + - #22 + host_id: 0 + host_perms: 0 + - #23 + host_id: 0 + host_perms: 0 + - #24 + host_id: 0 + host_perms: 0 + - #25 + host_id: 0 + host_perms: 0 + - #26 + host_id: 0 + host_perms: 0 + - #27 + host_id: 0 + host_perms: 0 + - #28 + host_id: 0 + host_perms: 0 + - #29 + host_id: 0 + host_perms: 0 + - #30 + host_id: 0 + host_perms: 0 + - #31 + host_id: 0 + host_perms: 0 + - #32 + host_id: 0 + host_perms: 0 + write_host_id: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci: 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size: 0 + rsvd: [0, 0, 0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock: 0x5A + allow_wildcard_unlock: 0x5A + allowed_debug_level_rsvd: 0 + rsvd: 0 + min_cert_rev: 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender: 0 + handover_to_host_id: 0 + rsvd: [0, 0, 0, 0] +

Added YAML config for J7200

Signed-off-by: Neha Malcom Francis n-francis@ti.com --- board/ti/j721e/board-cfg_j7200.yaml | 36 + board/ti/j721e/pm-cfg_j7200.yaml | 12 + board/ti/j721e/rm-cfg_j7200.yaml | 2065 +++++++++++++++++++++++++++ board/ti/j721e/sec-cfg_j7200.yaml | 378 +++++ 4 files changed, 2491 insertions(+) create mode 100644 board/ti/j721e/board-cfg_j7200.yaml create mode 100644 board/ti/j721e/pm-cfg_j7200.yaml create mode 100644 board/ti/j721e/rm-cfg_j7200.yaml create mode 100644 board/ti/j721e/sec-cfg_j7200.yaml

diff --git a/board/ti/j721e/board-cfg_j7200.yaml b/board/ti/j721e/board-cfg_j7200.yaml new file mode 100644 index 0000000000..1453317ecb --- /dev/null +++ b/board/ti/j721e/board-cfg_j7200.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for J7200 +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable : 0x5A + main_isolation_hostid : 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor : 0x1 + scaling_profile : 0x1 + disable_main_nav_secure_proxy : 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size : 0x10 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables : 0x00 + trace_src_enables : 0x00 diff --git a/board/ti/j721e/pm-cfg_j7200.yaml b/board/ti/j721e/pm-cfg_j7200.yaml new file mode 100644 index 0000000000..588a1d530d --- /dev/null +++ b/board/ti/j721e/pm-cfg_j7200.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for J7200 +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 diff --git a/board/ti/j721e/rm-cfg_j7200.yaml b/board/ti/j721e/rm-cfg_j7200.yaml new file mode 100644 index 0000000000..66b589f370 --- /dev/null +++ b/board/ti/j721e/rm-cfg_j7200.yaml @@ -0,0 +1,2065 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J7200 +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size : 356 + host_cfg_entries: + - #1 + host_id: 3 + allowed_atype : 0b101010 + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #2 + host_id: 5 + allowed_atype : 0b101010 + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #3 + host_id: 12 + allowed_atype : 0b101010 + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #4 + host_id: 13 + allowed_atype : 0b101010 + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #5 + host_id: 35 + allowed_atype : 0b101010 + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #6 + host_id: 37 + allowed_atype : 0b101010 + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #7 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #8 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #9 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - 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+ start_resource: 44 + num_resource: 2 + type: 15043 + host_id: 128 + reserved: 0 + + - + start_resource: 48 + num_resource: 0 + type: 15045 + host_id: 3 + reserved: 0 + + - + start_resource: 48 + num_resource: 0 + type: 15045 + host_id: 12 + reserved: 0 + + - + start_resource: 48 + num_resource: 1 + type: 15045 + host_id: 12 + reserved: 0 + + - + start_resource: 49 + num_resource: 1 + type: 15045 + host_id: 3 + reserved: 0 + + - + start_resource: 0 + num_resource: 0 + type: 15047 + host_id: 3 + reserved: 0 + + - + start_resource: 0 + num_resource: 0 + type: 15047 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 15047 + host_id: 12 + reserved: 0 + + - + start_resource: 1 + num_resource: 1 + type: 15047 + host_id: 3 + reserved: 0 + + - + start_resource: 2 + num_resource: 1 + type: 15050 + host_id: 12 + reserved: 0 + + - + start_resource: 3 + num_resource: 1 + type: 15050 + host_id: 13 + reserved: 0 + + - + start_resource: 0 + num_resource: 3 + type: 15051 + host_id: 12 + reserved: 0 + + - + start_resource: 3 + num_resource: 2 + type: 15051 + host_id: 13 + reserved: 0 + + - + start_resource: 5 + num_resource: 6 + type: 15051 + host_id: 3 + reserved: 0 + + - + start_resource: 11 + num_resource: 6 + type: 15051 + host_id: 5 + reserved: 0 + + - + start_resource: 17 + num_resource: 5 + type: 15051 + host_id: 35 + reserved: 0 + + - + start_resource: 22 + num_resource: 5 + type: 15051 + host_id: 37 + reserved: 0 + + - + start_resource: 27 + num_resource: 5 + type: 15051 + host_id: 128 + reserved: 0 + + - + start_resource: 48 + num_resource: 8 + type: 15104 + host_id: 12 + reserved: 0 + + - + start_resource: 56 + num_resource: 4 + type: 15104 + host_id: 13 + reserved: 0 + + - + start_resource: 60 + num_resource: 8 + type: 15104 + host_id: 3 + reserved: 0 + + - + start_resource: 68 + num_resource: 4 + type: 15104 + host_id: 5 + reserved: 0 + + - + start_resource: 72 + num_resource: 8 + type: 15104 + host_id: 35 + reserved: 0 + + - + start_resource: 80 + num_resource: 4 + type: 15104 + host_id: 37 + reserved: 0 + + - + start_resource: 84 + num_resource: 12 + type: 15104 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 15105 + host_id: 128 + reserved: 0 + + - + start_resource: 56320 + num_resource: 256 + type: 15106 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 15107 + host_id: 128 + reserved: 0 + + - + start_resource: 2 + num_resource: 3 + type: 15114 + host_id: 12 + reserved: 0 + + - + start_resource: 5 + num_resource: 2 + type: 15114 + host_id: 13 + reserved: 0 + + - + start_resource: 7 + num_resource: 2 + type: 15114 + host_id: 3 + reserved: 0 + + - + start_resource: 9 + num_resource: 2 + type: 15114 + host_id: 5 + reserved: 0 + + - + start_resource: 11 + num_resource: 2 + type: 15114 + host_id: 35 + reserved: 0 + + - + start_resource: 13 + num_resource: 2 + type: 15114 + host_id: 37 + reserved: 0 + + - + start_resource: 15 + num_resource: 9 + type: 15114 + host_id: 12 + reserved: 0 + + - + start_resource: 24 + num_resource: 4 + type: 15114 + host_id: 13 + reserved: 0 + + - + start_resource: 28 + num_resource: 4 + type: 15114 + host_id: 3 + reserved: 0 + + - + start_resource: 32 + num_resource: 4 + type: 15114 + host_id: 5 + reserved: 0 + + - + start_resource: 36 + num_resource: 4 + type: 15114 + host_id: 35 + reserved: 0 + + - + start_resource: 40 + num_resource: 4 + type: 15114 + host_id: 37 + reserved: 0 + + - + start_resource: 44 + num_resource: 1 + type: 15114 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 0 + type: 15115 + host_id: 3 + reserved: 0 + + - + start_resource: 0 + num_resource: 0 + type: 15115 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 15115 + host_id: 12 + reserved: 0 + + - + start_resource: 1 + num_resource: 1 + type: 15115 + host_id: 3 + reserved: 0 + + - + start_resource: 2 + num_resource: 3 + type: 15117 + host_id: 12 + reserved: 0 + + - + start_resource: 5 + num_resource: 2 + type: 15117 + host_id: 13 + reserved: 0 + + - + start_resource: 7 + num_resource: 2 + type: 15117 + host_id: 3 + reserved: 0 + + - + start_resource: 9 + num_resource: 2 + type: 15117 + host_id: 5 + reserved: 0 + + - + start_resource: 11 + num_resource: 2 + type: 15117 + host_id: 35 + reserved: 0 + + - + start_resource: 13 + num_resource: 2 + type: 15117 + host_id: 37 + reserved: 0 + + - + start_resource: 15 + num_resource: 9 + type: 15117 + host_id: 12 + reserved: 0 + + - + start_resource: 24 + num_resource: 4 + type: 15117 + host_id: 13 + reserved: 0 + + - + start_resource: 28 + num_resource: 4 + type: 15117 + host_id: 3 + reserved: 0 + + - + start_resource: 32 + num_resource: 4 + type: 15117 + host_id: 5 + reserved: 0 + + - + start_resource: 36 + num_resource: 4 + type: 15117 + host_id: 35 + reserved: 0 + + - + start_resource: 40 + num_resource: 4 + type: 15117 + host_id: 37 + reserved: 0 + + - + start_resource: 44 + num_resource: 2 + type: 15117 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 0 + type: 15119 + host_id: 3 + reserved: 0 + + - + start_resource: 0 + num_resource: 0 + type: 15119 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 15119 + host_id: 12 + reserved: 0 + + - + start_resource: 1 + num_resource: 1 + type: 15119 + host_id: 3 + reserved: 0 + + - + start_resource: 11 + num_resource: 20 + type: 15168 + host_id: 3 + reserved: 0 + + - + start_resource: 36 + num_resource: 28 + type: 15168 + host_id: 5 + reserved: 0 diff --git a/board/ti/j721e/sec-cfg_j7200.yaml b/board/ti/j721e/sec-cfg_j7200.yaml new file mode 100644 index 0000000000..fecf74a352 --- /dev/null +++ b/board/ti/j721e/sec-cfg_j7200.yaml @@ -0,0 +1,378 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Security management configuration for J7200 +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - #1 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - #1 + host_id: 0 + supervisor_host_id: 0 + - #2 + host_id: 0 + supervisor_host_id: 0 + - #3 + host_id: 0 + supervisor_host_id: 0 + - #4 + host_id: 0 + supervisor_host_id: 0 + - #5 + host_id: 0 + supervisor_host_id: 0 + - #6 + host_id: 0 + supervisor_host_id: 0 + - #7 + host_id: 0 + supervisor_host_id: 0 + - #8 + host_id: 0 + supervisor_host_id: 0 + - #9 + host_id: 0 + supervisor_host_id: 0 + - #10 + host_id: 0 + supervisor_host_id: 0 + - #11 + host_id: 0 + supervisor_host_id: 0 + - #12 + host_id: 0 + supervisor_host_id: 0 + - #13 + host_id: 0 + supervisor_host_id: 0 + - #14 + host_id: 0 + supervisor_host_id: 0 + - #15 + host_id: 0 + supervisor_host_id: 0 + - #16 + host_id: 0 + supervisor_host_id: 0 + - #17 + host_id: 0 + supervisor_host_id: 0 + - #18 + host_id: 0 + supervisor_host_id: 0 + - #19 + host_id: 0 + supervisor_host_id: 0 + - #20 + host_id: 0 + supervisor_host_id: 0 + - #21 + host_id: 0 + supervisor_host_id: 0 + - #22 + host_id: 0 + supervisor_host_id: 0 + - #23 + host_id: 0 + supervisor_host_id: 0 + - #24 + host_id: 0 + supervisor_host_id: 0 + - #25 + host_id: 0 + supervisor_host_id: 0 + - #26 + host_id: 0 + supervisor_host_id: 0 + - #27 + host_id: 0 + supervisor_host_id: 0 + - #28 + host_id: 0 + supervisor_host_id: 0 + - #29 + host_id: 0 + supervisor_host_id: 0 + - #30 + host_id: 0 + supervisor_host_id: 0 + - #31 + host_id: 0 + supervisor_host_id: 0 + - #32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id : 0 + otp_entry: + - #1 + host_id: 0 + host_perms: 0 + - #2 + host_id: 0 + host_perms: 0 + - #3 + host_id: 0 + host_perms: 0 + - #4 + host_id: 0 + host_perms: 0 + - #5 + host_id: 0 + host_perms: 0 + - #6 + host_id: 0 + host_perms: 0 + - #7 + host_id: 0 + host_perms: 0 + - #8 + host_id: 0 + host_perms: 0 + - #9 + host_id: 0 + host_perms: 0 + - #10 + host_id: 0 + host_perms: 0 + - #11 + host_id: 0 + host_perms: 0 + - #12 + host_id: 0 + host_perms: 0 + - #13 + host_id: 0 + host_perms: 0 + - #14 + host_id: 0 + host_perms: 0 + - #15 + host_id: 0 + host_perms: 0 + - #16 + host_id: 0 + host_perms: 0 + - #17 + host_id: 0 + host_perms: 0 + - #18 + host_id: 0 + host_perms: 0 + - #19 + host_id: 0 + host_perms: 0 + - #20 + host_id: 0 + host_perms: 0 + - #21 + host_id: 0 + host_perms: 0 + - #22 + host_id: 0 + host_perms: 0 + - #23 + host_id: 0 + host_perms: 0 + - #24 + host_id: 0 + host_perms: 0 + - #25 + host_id: 0 + host_perms: 0 + - #26 + host_id: 0 + host_perms: 0 + - #27 + host_id: 0 + host_perms: 0 + - #28 + host_id: 0 + host_perms: 0 + - #29 + host_id: 0 + host_perms: 0 + - #30 + host_id: 0 + host_perms: 0 + - #31 + host_id: 0 + host_perms: 0 + - #32 + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci : 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size : 0 + rsvd: [0, 0, 0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock : 0x5A + allow_wildcard_unlock : 0x5A + allowed_debug_level_rsvd : 0 + rsvd : 0 + min_cert_rev : 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender : 0 + handover_to_host_id : 0 + rsvd: [0, 0, 0, 0]

Added YAML config for AM65x

Signed-off-by: Neha Malcom Francis n-francis@ti.com --- board/ti/am65x/board-cfg.yaml | 36 + board/ti/am65x/pm-cfg.yaml | 12 + board/ti/am65x/rm-cfg.yaml | 2068 +++++++++++++++++++++++++++++++++ board/ti/am65x/sec-cfg.yaml | 375 ++++++ 4 files changed, 2491 insertions(+) create mode 100644 board/ti/am65x/board-cfg.yaml create mode 100644 board/ti/am65x/pm-cfg.yaml create mode 100644 board/ti/am65x/rm-cfg.yaml create mode 100644 board/ti/am65x/sec-cfg.yaml

diff --git a/board/ti/am65x/board-cfg.yaml b/board/ti/am65x/board-cfg.yaml new file mode 100644 index 0000000000..133720ec3e --- /dev/null +++ b/board/ti/am65x/board-cfg.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for AM65x +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable : 0x5A + main_isolation_hostid : 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor : 0x1 + scaling_profile : 0x1 + disable_main_nav_secure_proxy : 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size : 0x10 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables : 0x00 + trace_src_enables : 0x00 diff --git a/board/ti/am65x/pm-cfg.yaml b/board/ti/am65x/pm-cfg.yaml new file mode 100644 index 0000000000..4b1ce475cd --- /dev/null +++ b/board/ti/am65x/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for AM65x +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 diff --git a/board/ti/am65x/rm-cfg.yaml b/board/ti/am65x/rm-cfg.yaml new file mode 100644 index 0000000000..501cc464c4 --- /dev/null +++ b/board/ti/am65x/rm-cfg.yaml @@ -0,0 +1,2068 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for AM65x +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size : 356 + host_cfg_entries: + - #1 + host_id: 3 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #2 + host_id: 5 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #3 + host_id: 12 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #4 + host_id: 13 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #5 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #6 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #7 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #8 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #9 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #10 + host_id: 3 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #11 + host_id: 3 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - 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+ start_resource: 52 + num_resource: 0 + type: 25922 + host_id: 13 + reserved: 0 + + - + start_resource: 56 + num_resource: 2 + type: 25922 + host_id: 5 + reserved: 0 + + - + start_resource: 58 + num_resource: 12 + type: 25922 + host_id: 12 + reserved: 0 + + - + start_resource: 70 + num_resource: 4 + type: 25922 + host_id: 13 + reserved: 0 + + - + start_resource: 74 + num_resource: 10 + type: 25922 + host_id: 3 + reserved: 0 + + - + start_resource: 74 + num_resource: 10 + type: 25922 + host_id: 4 + reserved: 0 + + - + start_resource: 84 + num_resource: 12 + type: 25922 + host_id: 5 + reserved: 0 + + - + start_resource: 2 + num_resource: 2 + type: 25923 + host_id: 12 + reserved: 0 + + - + start_resource: 4 + num_resource: 4 + type: 25923 + host_id: 3 + reserved: 0 + + - + start_resource: 4 + num_resource: 4 + type: 25923 + host_id: 4 + reserved: 0 + + - + start_resource: 4 + num_resource: 0 + type: 25923 + host_id: 13 + reserved: 0 + + - + start_resource: 8 + num_resource: 2 + type: 25923 + host_id: 5 + reserved: 0 + + - + start_resource: 10 + num_resource: 12 + type: 25923 + host_id: 12 + reserved: 0 + + - + start_resource: 22 + num_resource: 4 + type: 25923 + host_id: 13 + reserved: 0 + + - + start_resource: 26 + num_resource: 10 + type: 25923 + host_id: 3 + reserved: 0 + + - + start_resource: 26 + num_resource: 10 + type: 25923 + host_id: 4 + reserved: 0 + + - + start_resource: 36 + num_resource: 12 + type: 25923 + host_id: 5 + reserved: 0 + + - + start_resource: 48 + num_resource: 0 + type: 25925 + host_id: 3 + reserved: 0 + + - + start_resource: 48 + num_resource: 2 + type: 25925 + host_id: 3 + reserved: 0 + + - + start_resource: 48 + num_resource: 0 + type: 25925 + host_id: 4 + reserved: 0 + + - + start_resource: 48 + num_resource: 2 + type: 25925 + host_id: 4 + reserved: 0 + + - + start_resource: 0 + num_resource: 0 + type: 25927 + host_id: 3 + reserved: 0 + + - + start_resource: 0 + num_resource: 2 + type: 25927 + host_id: 3 + reserved: 0 + + - + start_resource: 0 + num_resource: 0 + type: 25927 + host_id: 4 + reserved: 0 + + - + start_resource: 0 + num_resource: 2 + type: 25927 + host_id: 4 + reserved: 0 + + - + start_resource: 2 + num_resource: 1 + type: 25930 + host_id: 12 + reserved: 0 + + - + start_resource: 3 + num_resource: 1 + type: 25930 + host_id: 13 + reserved: 0 + + - + start_resource: 0 + num_resource: 8 + type: 25931 + host_id: 12 + reserved: 0 + + - + start_resource: 8 + num_resource: 8 + type: 25931 + host_id: 3 + reserved: 0 + + - + start_resource: 8 + num_resource: 8 + type: 25931 + host_id: 4 + reserved: 0 + + - + start_resource: 16 + num_resource: 8 + type: 25931 + host_id: 5 + reserved: 0 + + - + start_resource: 24 + num_resource: 8 + type: 25931 + host_id: 128 + reserved: 0 diff --git a/board/ti/am65x/sec-cfg.yaml b/board/ti/am65x/sec-cfg.yaml new file mode 100644 index 0000000000..72478b4fb5 --- /dev/null +++ b/board/ti/am65x/sec-cfg.yaml @@ -0,0 +1,375 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Security management configuration for AM65x +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - #1 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - #1 + host_id: 0 + supervisor_host_id: 0 + - #2 + host_id: 0 + supervisor_host_id: 0 + - #3 + host_id: 0 + supervisor_host_id: 0 + - #4 + host_id: 0 + supervisor_host_id: 0 + - #5 + host_id: 0 + supervisor_host_id: 0 + - #6 + host_id: 0 + supervisor_host_id: 0 + - #7 + host_id: 0 + supervisor_host_id: 0 + - #8 + host_id: 0 + supervisor_host_id: 0 + - #9 + host_id: 0 + supervisor_host_id: 0 + - #10 + host_id: 0 + supervisor_host_id: 0 + - #11 + host_id: 0 + supervisor_host_id: 0 + - #12 + host_id: 0 + supervisor_host_id: 0 + - #13 + host_id: 0 + supervisor_host_id: 0 + - #14 + host_id: 0 + supervisor_host_id: 0 + - #15 + host_id: 0 + supervisor_host_id: 0 + - #16 + host_id: 0 + supervisor_host_id: 0 + - #17 + host_id: 0 + supervisor_host_id: 0 + - #18 + host_id: 0 + supervisor_host_id: 0 + - #19 + host_id: 0 + supervisor_host_id: 0 + - #20 + host_id: 0 + supervisor_host_id: 0 + - #21 + host_id: 0 + supervisor_host_id: 0 + - #22 + host_id: 0 + supervisor_host_id: 0 + - #23 + host_id: 0 + supervisor_host_id: 0 + - #24 + host_id: 0 + supervisor_host_id: 0 + - #25 + host_id: 0 + supervisor_host_id: 0 + - #26 + host_id: 0 + supervisor_host_id: 0 + - #27 + host_id: 0 + supervisor_host_id: 0 + - #28 + host_id: 0 + supervisor_host_id: 0 + - #29 + host_id: 0 + supervisor_host_id: 0 + - #30 + host_id: 0 + supervisor_host_id: 0 + - #31 + host_id: 0 + supervisor_host_id: 0 + - #32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id : 0 + otp_entry: + - #1 + host_id: 0 + host_perms: 0 + - #2 + host_id: 0 + host_perms: 0 + - #3 + host_id: 0 + host_perms: 0 + - #4 + host_id: 0 + host_perms: 0 + - #5 + host_id: 0 + host_perms: 0 + - #6 + host_id: 0 + host_perms: 0 + - #7 + host_id: 0 + host_perms: 0 + - #8 + host_id: 0 + host_perms: 0 + - #9 + host_id: 0 + host_perms: 0 + - #10 + host_id: 0 + host_perms: 0 + - #11 + host_id: 0 + host_perms: 0 + - #12 + host_id: 0 + host_perms: 0 + - #13 + host_id: 0 + host_perms: 0 + - #14 + host_id: 0 + host_perms: 0 + - #15 + host_id: 0 + host_perms: 0 + - #16 + host_id: 0 + host_perms: 0 + - #17 + host_id: 0 + host_perms: 0 + - #18 + host_id: 0 + host_perms: 0 + - #19 + host_id: 0 + host_perms: 0 + - #20 + host_id: 0 + host_perms: 0 + - #21 + host_id: 0 + host_perms: 0 + - #22 + host_id: 0 + host_perms: 0 + - #23 + host_id: 0 + host_perms: 0 + - #24 + host_id: 0 + host_perms: 0 + - #25 + host_id: 0 + host_perms: 0 + - #26 + host_id: 0 + host_perms: 0 + - #27 + host_id: 0 + host_perms: 0 + - #28 + host_id: 0 + host_perms: 0 + - #29 + host_id: 0 + host_perms: 0 + - #30 + host_id: 0 + host_perms: 0 + - #31 + host_id: 0 + host_perms: 0 + - #32 + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci : 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size : 0 + rsvd: [0, 0, 0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock : 0x5A + allow_wildcard_unlock : 0x5A + min_cert_rev : 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender : 0 + handover_to_host_id : 0 + rsvd: [0, 0, 0, 0]

Added YAML config for AM64xx

Signed-off-by: Neha Malcom Francis n-francis@ti.com --- board/ti/am64x/board-cfg.yaml | 37 + board/ti/am64x/pm-cfg.yaml | 12 + board/ti/am64x/rm-cfg.yaml | 1400 +++++++++++++++++++++++++++++++++ board/ti/am64x/sec-cfg.yaml | 378 +++++++++ 4 files changed, 1827 insertions(+) create mode 100644 board/ti/am64x/board-cfg.yaml create mode 100644 board/ti/am64x/pm-cfg.yaml create mode 100644 board/ti/am64x/rm-cfg.yaml create mode 100644 board/ti/am64x/sec-cfg.yaml

diff --git a/board/ti/am64x/board-cfg.yaml b/board/ti/am64x/board-cfg.yaml new file mode 100644 index 0000000000..f1f7c68d50 --- /dev/null +++ b/board/ti/am64x/board-cfg.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for AM64x +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable : 0x5A + main_isolation_hostid : 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor : 0x1 + scaling_profile : 0x1 + disable_main_nav_secure_proxy : 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size : 0x0 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables : 0x00 + trace_src_enables : 0x00 + diff --git a/board/ti/am64x/pm-cfg.yaml b/board/ti/am64x/pm-cfg.yaml new file mode 100644 index 0000000000..c97495f482 --- /dev/null +++ b/board/ti/am64x/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for AM64x +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 diff --git a/board/ti/am64x/rm-cfg.yaml b/board/ti/am64x/rm-cfg.yaml new file mode 100644 index 0000000000..6488c8a9c5 --- /dev/null +++ b/board/ti/am64x/rm-cfg.yaml @@ -0,0 +1,1400 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for AM64x +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size : 356 + host_cfg_entries: + - #1 + host_id: 12 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #2 + host_id: 30 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #3 + host_id: 36 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #4 + host_id: 38 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #5 + host_id: 41 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #6 + host_id: 43 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #7 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #8 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #9 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #10 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #11 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #12 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #13 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #14 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #15 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #16 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #17 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #18 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #19 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #20 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #21 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #22 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #23 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #24 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #25 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #26 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #27 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #28 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #29 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #30 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #31 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + + - #32 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + resasg: + subhdr: + magic: 0x7B25 + size : 8 + resasg_entries_size: 1288 + reserved : 0 + resasg_entries: + - + start_resource: 0 + num_resource: 16 + type: 64 + host_id: 12 + reserved: 0 + + - + start_resource: 16 + num_resource: 4 + type: 64 + host_id: 35 + reserved: 0 + + - + start_resource: 16 + num_resource: 4 + type: 64 + host_id: 36 + reserved: 0 + + - + start_resource: 20 + num_resource: 4 + type: 64 + host_id: 38 + reserved: 0 + + - + start_resource: 24 + num_resource: 4 + type: 64 + host_id: 41 + reserved: 0 + + - + start_resource: 28 + num_resource: 4 + type: 64 + host_id: 43 + reserved: 0 + + - + start_resource: 32 + num_resource: 8 + type: 64 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 12 + type: 192 + host_id: 12 + reserved: 0 + + - + start_resource: 12 + num_resource: 2 + type: 192 + host_id: 41 + reserved: 0 + + - + start_resource: 14 + num_resource: 2 + type: 192 + host_id: 43 + reserved: 0 + + - + start_resource: 0 + num_resource: 4 + type: 320 + host_id: 12 + reserved: 0 + + - + start_resource: 4 + num_resource: 4 + type: 320 + host_id: 30 + reserved: 0 + + - + start_resource: 0 + num_resource: 41 + type: 384 + host_id: 128 + reserved: 0 + + - + start_resource: 50176 + num_resource: 136 + type: 1666 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 1667 + host_id: 128 + reserved: 0 + + - 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+ start_resource: 20 + num_resource: 1 + type: 1971 + host_id: 12 + reserved: 0 + + - + start_resource: 40 + num_resource: 8 + type: 1972 + host_id: 12 + reserved: 0 + + - + start_resource: 21 + num_resource: 4 + type: 1973 + host_id: 12 + reserved: 0 + + - + start_resource: 48 + num_resource: 64 + type: 1974 + host_id: 12 + reserved: 0 + + - + start_resource: 25 + num_resource: 4 + type: 1975 + host_id: 12 + reserved: 0 + + - + start_resource: 112 + num_resource: 64 + type: 1976 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 2112 + host_id: 128 + reserved: 0 + + - + start_resource: 2 + num_resource: 2 + type: 2122 + host_id: 12 + reserved: 0 + + - + start_resource: 20 + num_resource: 2 + type: 2124 + host_id: 35 + reserved: 0 + + - + start_resource: 20 + num_resource: 2 + type: 2124 + host_id: 36 + reserved: 0 + + - + start_resource: 22 + num_resource: 2 + type: 2124 + host_id: 38 + reserved: 0 + + - + start_resource: 24 + num_resource: 2 + type: 2124 + host_id: 41 + reserved: 0 + + - + start_resource: 26 + num_resource: 2 + type: 2124 + host_id: 43 + reserved: 0 + + - + start_resource: 28 + num_resource: 4 + type: 2124 + host_id: 128 + reserved: 0 diff --git a/board/ti/am64x/sec-cfg.yaml b/board/ti/am64x/sec-cfg.yaml new file mode 100644 index 0000000000..f93e9515b2 --- /dev/null +++ b/board/ti/am64x/sec-cfg.yaml @@ -0,0 +1,378 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Security configuration for AM64x +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - #1 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - #1 + host_id: 0 + supervisor_host_id: 0 + - #2 + host_id: 0 + supervisor_host_id: 0 + - #3 + host_id: 0 + supervisor_host_id: 0 + - #4 + host_id: 0 + supervisor_host_id: 0 + - #5 + host_id: 0 + supervisor_host_id: 0 + - #6 + host_id: 0 + supervisor_host_id: 0 + - #7 + host_id: 0 + supervisor_host_id: 0 + - #8 + host_id: 0 + supervisor_host_id: 0 + - #9 + host_id: 0 + supervisor_host_id: 0 + - #10 + host_id: 0 + supervisor_host_id: 0 + - #11 + host_id: 0 + supervisor_host_id: 0 + - #12 + host_id: 0 + supervisor_host_id: 0 + - #13 + host_id: 0 + supervisor_host_id: 0 + - #14 + host_id: 0 + supervisor_host_id: 0 + - #15 + host_id: 0 + supervisor_host_id: 0 + - #16 + host_id: 0 + supervisor_host_id: 0 + - #17 + host_id: 0 + supervisor_host_id: 0 + - #18 + host_id: 0 + supervisor_host_id: 0 + - #19 + host_id: 0 + supervisor_host_id: 0 + - #20 + host_id: 0 + supervisor_host_id: 0 + - #21 + host_id: 0 + supervisor_host_id: 0 + - #22 + host_id: 0 + supervisor_host_id: 0 + - #23 + host_id: 0 + supervisor_host_id: 0 + - #24 + host_id: 0 + supervisor_host_id: 0 + - #25 + host_id: 0 + supervisor_host_id: 0 + - #26 + host_id: 0 + supervisor_host_id: 0 + - #27 + host_id: 0 + supervisor_host_id: 0 + - #28 + host_id: 0 + supervisor_host_id: 0 + - #29 + host_id: 0 + supervisor_host_id: 0 + - #30 + host_id: 0 + supervisor_host_id: 0 + - #31 + host_id: 0 + supervisor_host_id: 0 + - #32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id : 0 + otp_entry: + - #1 + host_id: 0 + host_perms: 0 + - #2 + host_id: 0 + host_perms: 0 + - #3 + host_id: 0 + host_perms: 0 + - #4 + host_id: 0 + host_perms: 0 + - #5 + host_id: 0 + host_perms: 0 + - #6 + host_id: 0 + host_perms: 0 + - #7 + host_id: 0 + host_perms: 0 + - #8 + host_id: 0 + host_perms: 0 + - #9 + host_id: 0 + host_perms: 0 + - #10 + host_id: 0 + host_perms: 0 + - #11 + host_id: 0 + host_perms: 0 + - #12 + host_id: 0 + host_perms: 0 + - #13 + host_id: 0 + host_perms: 0 + - #14 + host_id: 0 + host_perms: 0 + - #15 + host_id: 0 + host_perms: 0 + - #16 + host_id: 0 + host_perms: 0 + - #17 + host_id: 0 + host_perms: 0 + - #18 + host_id: 0 + host_perms: 0 + - #19 + host_id: 0 + host_perms: 0 + - #20 + host_id: 0 + host_perms: 0 + - #21 + host_id: 0 + host_perms: 0 + - #22 + host_id: 0 + host_perms: 0 + - #23 + host_id: 0 + host_perms: 0 + - #24 + host_id: 0 + host_perms: 0 + - #25 + host_id: 0 + host_perms: 0 + - #26 + host_id: 0 + host_perms: 0 + - #27 + host_id: 0 + host_perms: 0 + - #28 + host_id: 0 + host_perms: 0 + - #29 + host_id: 0 + host_perms: 0 + - #30 + host_id: 0 + host_perms: 0 + - #31 + host_id: 0 + host_perms: 0 + - #32 + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci : 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size : 0 + rsvd: [0, 0, 0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock : 0x5A + allow_wildcard_unlock : 0x5A + allowed_debug_level_rsvd : 0 + rsvd : 0 + min_cert_rev : 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender : 0 + handover_to_host_id : 0 + rsvd: [0, 0, 0, 0]

Added YAML config for J721S2

Signed-off-by: Neha Malcom Francis n-francis@ti.com --- board/ti/j721s2/board-cfg.yaml | 37 + board/ti/j721s2/pm-cfg.yaml | 12 + board/ti/j721s2/rm-cfg.yaml | 2901 ++++++++++++++++++++++++++++++++ board/ti/j721s2/sec-cfg.yaml | 375 +++++ 4 files changed, 3325 insertions(+) create mode 100644 board/ti/j721s2/board-cfg.yaml create mode 100644 board/ti/j721s2/pm-cfg.yaml create mode 100644 board/ti/j721s2/rm-cfg.yaml create mode 100644 board/ti/j721s2/sec-cfg.yaml

diff --git a/board/ti/j721s2/board-cfg.yaml b/board/ti/j721s2/board-cfg.yaml new file mode 100644 index 0000000000..d80f308ca6 --- /dev/null +++ b/board/ti/j721s2/board-cfg.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for J721S2 +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable : 0x5A + main_isolation_hostid : 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor : 0x1 + scaling_profile : 0x1 + disable_main_nav_secure_proxy : 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size : 0x0 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables : 0x00 + trace_src_enables : 0x00 + diff --git a/board/ti/j721s2/pm-cfg.yaml b/board/ti/j721s2/pm-cfg.yaml new file mode 100644 index 0000000000..45994e23cc --- /dev/null +++ b/board/ti/j721s2/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for J721S2 +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 diff --git a/board/ti/j721s2/rm-cfg.yaml b/board/ti/j721s2/rm-cfg.yaml new file mode 100644 index 0000000000..d18288ae08 --- /dev/null +++ b/board/ti/j721s2/rm-cfg.yaml @@ -0,0 +1,2901 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J721S2 +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size : 356 + host_cfg_entries: + - #1 + host_id: 3 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #2 + host_id: 5 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #3 + host_id: 12 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - 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#2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - #1 + host_id: 0 + supervisor_host_id: 0 + - #2 + host_id: 0 + supervisor_host_id: 0 + - #3 + host_id: 0 + supervisor_host_id: 0 + - #4 + host_id: 0 + supervisor_host_id: 0 + - #5 + host_id: 0 + supervisor_host_id: 0 + - #6 + host_id: 0 + supervisor_host_id: 0 + - #7 + host_id: 0 + supervisor_host_id: 0 + - #8 + host_id: 0 + supervisor_host_id: 0 + - #9 + host_id: 0 + supervisor_host_id: 0 + - #10 + host_id: 0 + supervisor_host_id: 0 + - #11 + host_id: 0 + supervisor_host_id: 0 + - #12 + host_id: 0 + supervisor_host_id: 0 + - #13 + host_id: 0 + supervisor_host_id: 0 + - #14 + host_id: 0 + supervisor_host_id: 0 + - #15 + host_id: 0 + supervisor_host_id: 0 + - #16 + host_id: 0 + supervisor_host_id: 0 + - #17 + host_id: 0 + supervisor_host_id: 0 + - #18 + host_id: 0 + supervisor_host_id: 0 + - #19 + host_id: 0 + supervisor_host_id: 0 + - #20 + host_id: 0 + supervisor_host_id: 0 + - #21 + host_id: 0 + supervisor_host_id: 0 + - #22 + host_id: 0 + supervisor_host_id: 0 + - #23 + host_id: 0 + supervisor_host_id: 0 + - #24 + host_id: 0 + supervisor_host_id: 0 + - #25 + host_id: 0 + supervisor_host_id: 0 + - #26 + host_id: 0 + supervisor_host_id: 0 + - #27 + host_id: 0 + supervisor_host_id: 0 + - #28 + host_id: 0 + supervisor_host_id: 0 + - #29 + host_id: 0 + supervisor_host_id: 0 + - #30 + host_id: 0 + supervisor_host_id: 0 + - #31 + host_id: 0 + supervisor_host_id: 0 + - #32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id : 0 + otp_entry: + - #1 + host_id: 0 + host_perms: 0 + - #2 + host_id: 0 + host_perms: 0 + - #3 + host_id: 0 + host_perms: 0 + - #4 + host_id: 0 + host_perms: 0 + - #5 + host_id: 0 + host_perms: 0 + - #6 + host_id: 0 + host_perms: 0 + - #7 + host_id: 0 + host_perms: 0 + - #8 + host_id: 0 + host_perms: 0 + - #9 + host_id: 0 + host_perms: 0 + - #10 + host_id: 0 + host_perms: 0 + - #11 + host_id: 0 + host_perms: 0 + - #12 + host_id: 0 + host_perms: 0 + - #13 + host_id: 0 + host_perms: 0 + - #14 + host_id: 0 + host_perms: 0 + - #15 + host_id: 0 + host_perms: 0 + - #16 + host_id: 0 + host_perms: 0 + - #17 + host_id: 0 + host_perms: 0 + - #18 + host_id: 0 + host_perms: 0 + - #19 + host_id: 0 + host_perms: 0 + - #20 + host_id: 0 + host_perms: 0 + - #21 + host_id: 0 + host_perms: 0 + - #22 + host_id: 0 + host_perms: 0 + - #23 + host_id: 0 + host_perms: 0 + - #24 + host_id: 0 + host_perms: 0 + - #25 + host_id: 0 + host_perms: 0 + - #26 + host_id: 0 + host_perms: 0 + - #27 + host_id: 0 + host_perms: 0 + - #28 + host_id: 0 + host_perms: 0 + - #29 + host_id: 0 + host_perms: 0 + - #30 + host_id: 0 + host_perms: 0 + - #31 + host_id: 0 + host_perms: 0 + - #32 + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci : 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size : 0 + rsvd: [0, 0, 0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock : 0x0 + allow_wildcard_unlock : 0x0 + min_cert_rev : 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender : 0 + handover_to_host_id : 0 + rsvd: [0, 0, 0, 0]

Added YAML config for AM62

Signed-off-by: Neha Malcom Francis n-francis@ti.com --- board/ti/am62x/board-cfg.yaml | 36 ++ board/ti/am62x/pm-cfg.yaml | 12 + board/ti/am62x/rm-cfg.yaml | 1088 +++++++++++++++++++++++++++++++++ board/ti/am62x/sec-cfg.yaml | 375 ++++++++++++ board/ti/am65x/rm-cfg.yaml | 144 ++--- 5 files changed, 1583 insertions(+), 72 deletions(-) create mode 100644 board/ti/am62x/board-cfg.yaml create mode 100644 board/ti/am62x/pm-cfg.yaml create mode 100644 board/ti/am62x/rm-cfg.yaml create mode 100644 board/ti/am62x/sec-cfg.yaml

diff --git a/board/ti/am62x/board-cfg.yaml b/board/ti/am62x/board-cfg.yaml new file mode 100644 index 0000000000..a26ef55bd4 --- /dev/null +++ b/board/ti/am62x/board-cfg.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for AM62 +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable : 0x5A + main_isolation_hostid : 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor : 0x1 + scaling_profile : 0x1 + disable_main_nav_secure_proxy : 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size : 0x0 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables : 0x00 + trace_src_enables : 0x00 diff --git a/board/ti/am62x/pm-cfg.yaml b/board/ti/am62x/pm-cfg.yaml new file mode 100644 index 0000000000..aa94097e97 --- /dev/null +++ b/board/ti/am62x/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for AM62 +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 diff --git a/board/ti/am62x/rm-cfg.yaml b/board/ti/am62x/rm-cfg.yaml new file mode 100644 index 0000000000..ba82146551 --- /dev/null +++ b/board/ti/am62x/rm-cfg.yaml @@ -0,0 +1,1088 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for AM62 +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size : 356 + host_cfg_entries: + - #1 + host_id: 12 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #2 + host_id: 30 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #3 + host_id: 36 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #4 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #5 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #6 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #7 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #8 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #9 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #10 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #11 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #12 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #13 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #14 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #15 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #16 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #17 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #18 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #19 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #20 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #21 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #22 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #23 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #24 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #25 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #26 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #27 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #28 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #29 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #30 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #31 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #32 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + resasg: + subhdr: + magic: 0x7B25 + size : 8 + resasg_entries_size: 960 + reserved : 0 + resasg_entries: + - + start_resource: 0 + num_resource: 16 + type: 64 + host_id: 12 + reserved: 0 + + - + start_resource: 16 + num_resource: 4 + type: 64 + host_id: 35 + reserved: 0 + + - + start_resource: 16 + num_resource: 4 + type: 64 + host_id: 36 + reserved: 0 + + - + start_resource: 20 + num_resource: 22 + type: 64 + host_id: 30 + reserved: 0 + + - + start_resource: 0 + num_resource: 16 + type: 192 + host_id: 12 + reserved: 0 + + - + start_resource: 34 + num_resource: 2 + type: 192 + host_id: 30 + reserved: 0 + + - + start_resource: 0 + num_resource: 4 + type: 320 + host_id: 12 + reserved: 0 + + - + start_resource: 4 + num_resource: 4 + type: 320 + host_id: 30 + reserved: 0 + + - + start_resource: 0 + num_resource: 26 + type: 384 + host_id: 128 + reserved: 0 + + - + start_resource: 50176 + num_resource: 164 + type: 2434 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 2435 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 18 + type: 2445 + host_id: 12 + reserved: 0 + + - + start_resource: 18 + num_resource: 6 + type: 2445 + host_id: 35 + reserved: 0 + + - + start_resource: 18 + num_resource: 6 + type: 2445 + host_id: 36 + reserved: 0 + + - + start_resource: 24 + num_resource: 2 + type: 2445 + host_id: 30 + reserved: 0 + + - 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+ start_resource: 35 + num_resource: 8 + type: 3118 + host_id: 12 + reserved: 0 + + - + start_resource: 21 + num_resource: 1 + type: 3119 + host_id: 12 + reserved: 0 + + - + start_resource: 35 + num_resource: 8 + type: 3120 + host_id: 12 + reserved: 0 + + - + start_resource: 22 + num_resource: 1 + type: 3121 + host_id: 12 + reserved: 0 + + - + start_resource: 43 + num_resource: 8 + type: 3122 + host_id: 12 + reserved: 0 + + - + start_resource: 23 + num_resource: 1 + type: 3123 + host_id: 12 + reserved: 0 + + - + start_resource: 43 + num_resource: 8 + type: 3124 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 3264 + host_id: 128 + reserved: 0 + + - + start_resource: 2 + num_resource: 2 + type: 3274 + host_id: 12 + reserved: 0 diff --git a/board/ti/am62x/sec-cfg.yaml b/board/ti/am62x/sec-cfg.yaml new file mode 100644 index 0000000000..bb7302dc7e --- /dev/null +++ b/board/ti/am62x/sec-cfg.yaml @@ -0,0 +1,375 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Security management configuration for AM62 +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - #1 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - #1 + host_id: 0 + supervisor_host_id: 0 + - #2 + host_id: 0 + supervisor_host_id: 0 + - #3 + host_id: 0 + supervisor_host_id: 0 + - #4 + host_id: 0 + supervisor_host_id: 0 + - #5 + host_id: 0 + supervisor_host_id: 0 + - #6 + host_id: 0 + supervisor_host_id: 0 + - #7 + host_id: 0 + supervisor_host_id: 0 + - #8 + host_id: 0 + supervisor_host_id: 0 + - #9 + host_id: 0 + supervisor_host_id: 0 + - #10 + host_id: 0 + supervisor_host_id: 0 + - #11 + host_id: 0 + supervisor_host_id: 0 + - #12 + host_id: 0 + supervisor_host_id: 0 + - #13 + host_id: 0 + supervisor_host_id: 0 + - #14 + host_id: 0 + supervisor_host_id: 0 + - #15 + host_id: 0 + supervisor_host_id: 0 + - #16 + host_id: 0 + supervisor_host_id: 0 + - #17 + host_id: 0 + supervisor_host_id: 0 + - #18 + host_id: 0 + supervisor_host_id: 0 + - #19 + host_id: 0 + supervisor_host_id: 0 + - #20 + host_id: 0 + supervisor_host_id: 0 + - #21 + host_id: 0 + supervisor_host_id: 0 + - #22 + host_id: 0 + supervisor_host_id: 0 + - #23 + host_id: 0 + supervisor_host_id: 0 + - #24 + host_id: 0 + supervisor_host_id: 0 + - #25 + host_id: 0 + supervisor_host_id: 0 + - #26 + host_id: 0 + supervisor_host_id: 0 + - #27 + host_id: 0 + supervisor_host_id: 0 + - #28 + host_id: 0 + supervisor_host_id: 0 + - #29 + host_id: 0 + supervisor_host_id: 0 + - #30 + host_id: 0 + supervisor_host_id: 0 + - #31 + host_id: 0 + supervisor_host_id: 0 + - #32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id : 0 + otp_entry: + - #1 + host_id: 0 + host_perms: 0 + - #2 + host_id: 0 + host_perms: 0 + - #3 + host_id: 0 + host_perms: 0 + - #4 + host_id: 0 + host_perms: 0 + - #5 + host_id: 0 + host_perms: 0 + - #6 + host_id: 0 + host_perms: 0 + - #7 + host_id: 0 + host_perms: 0 + - #8 + host_id: 0 + host_perms: 0 + - #9 + host_id: 0 + host_perms: 0 + - #10 + host_id: 0 + host_perms: 0 + - #11 + host_id: 0 + host_perms: 0 + - #12 + host_id: 0 + host_perms: 0 + - #13 + host_id: 0 + host_perms: 0 + - #14 + host_id: 0 + host_perms: 0 + - #15 + host_id: 0 + host_perms: 0 + - #16 + host_id: 0 + host_perms: 0 + - #17 + host_id: 0 + host_perms: 0 + - #18 + host_id: 0 + host_perms: 0 + - #19 + host_id: 0 + host_perms: 0 + - #20 + host_id: 0 + host_perms: 0 + - #21 + host_id: 0 + host_perms: 0 + - #22 + host_id: 0 + host_perms: 0 + - #23 + host_id: 0 + host_perms: 0 + - #24 + host_id: 0 + host_perms: 0 + - #25 + host_id: 0 + host_perms: 0 + - #26 + host_id: 0 + host_perms: 0 + - #27 + host_id: 0 + host_perms: 0 + - #28 + host_id: 0 + host_perms: 0 + - #29 + host_id: 0 + host_perms: 0 + - #30 + host_id: 0 + host_perms: 0 + - #31 + host_id: 0 + host_perms: 0 + - #32 + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci : 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size : 0 + rsvd: [0, 0, 0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock : 0x5A + allow_wildcard_unlock : 0x5A + min_cert_rev : 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender : 0 + handover_to_host_id : 0 + rsvd: [0, 0, 0, 0] diff --git a/board/ti/am65x/rm-cfg.yaml b/board/ti/am65x/rm-cfg.yaml index 501cc464c4..84ec04e1e1 100644 --- a/board/ti/am65x/rm-cfg.yaml +++ b/board/ti/am65x/rm-cfg.yaml @@ -80,40 +80,40 @@ rm-cfg: allowed_priority : 0 allowed_sched_priority : 0 - #10 - host_id: 3 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #11 - host_id: 3 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #12 - host_id: 5 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #13 - host_id: 12 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #14 - host_id: 13 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #15 host_id: 0 allowed_atype : 0 @@ -157,33 +157,33 @@ rm-cfg: allowed_priority : 0 allowed_sched_priority : 0 - #21 - host_id: 3 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #22 - host_id: 5 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #23 - host_id: 12 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #24 - host_id: 13 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #25 host_id: 0 allowed_atype : 0 @@ -220,26 +220,26 @@ rm-cfg: allowed_priority : 0 allowed_sched_priority : 0 - #30 - host_id: 3 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #31 - host_id: 3 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 - #32 - host_id: 5 - allowed_atype : 0x2A - allowed_qos : 0xAAAA - allowed_orderid : 0xAAAAAAAA - allowed_priority : 0xAAAA - allowed_sched_priority : 0xAA + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 resasg: subhdr: magic: 0x7B25

Added YAML config for AM62ax

Signed-off-by: Neha Malcom Francis n-francis@ti.com --- board/ti/am62ax/board-cfg.yaml | 36 + board/ti/am62ax/pm-cfg.yaml | 12 + board/ti/am62ax/rm-cfg.yaml | 1151 ++++++++++++++++++++++++++++++++ board/ti/am62ax/sec-cfg.yaml | 375 +++++++++++ 4 files changed, 1574 insertions(+) create mode 100644 board/ti/am62ax/board-cfg.yaml create mode 100644 board/ti/am62ax/pm-cfg.yaml create mode 100644 board/ti/am62ax/rm-cfg.yaml create mode 100644 board/ti/am62ax/sec-cfg.yaml

diff --git a/board/ti/am62ax/board-cfg.yaml b/board/ti/am62ax/board-cfg.yaml new file mode 100644 index 0000000000..6e45b494e0 --- /dev/null +++ b/board/ti/am62ax/board-cfg.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for AM62ax +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable : 0x5A + main_isolation_hostid : 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor : 0x1 + scaling_profile : 0x1 + disable_main_nav_secure_proxy : 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size : 0x10 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables : 0x00 + trace_src_enables : 0x00 diff --git a/board/ti/am62ax/pm-cfg.yaml b/board/ti/am62ax/pm-cfg.yaml new file mode 100644 index 0000000000..a491f11260 --- /dev/null +++ b/board/ti/am62ax/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for AM62ax +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml new file mode 100644 index 0000000000..f7315dd2b0 --- /dev/null +++ b/board/ti/am62ax/rm-cfg.yaml @@ -0,0 +1,1151 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for AM62ax +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size : 356 + host_cfg_entries: + - #1 + host_id: 12 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #2 + host_id: 30 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #3 + host_id: 36 + allowed_atype : 0x2A + allowed_qos : 0xAAAA + allowed_orderid : 0xAAAAAAAA + allowed_priority : 0xAAAA + allowed_sched_priority : 0xAA + - #4 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #5 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #6 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #7 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #8 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #9 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #10 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #11 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #12 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #13 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #14 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #15 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #16 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #17 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #18 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #19 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #20 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #21 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #22 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #23 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #24 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #25 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #26 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #27 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #28 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #29 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #30 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #31 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + - #32 + host_id: 0 + allowed_atype : 0 + allowed_qos : 0 + allowed_orderid : 0 + allowed_priority : 0 + allowed_sched_priority : 0 + resasg: + subhdr: + magic: 0x7B25 + size : 8 + resasg_entries_size: 1032 + reserved : 0 + resasg_entries: + - + start_resource: 0 + num_resource: 16 + type: 64 + host_id: 12 + reserved: 0 + + - + start_resource: 16 + num_resource: 4 + type: 64 + host_id: 35 + reserved: 0 + + - + start_resource: 16 + num_resource: 4 + type: 64 + host_id: 36 + reserved: 0 + + - + start_resource: 20 + num_resource: 22 + type: 64 + host_id: 30 + reserved: 0 + + - + start_resource: 0 + num_resource: 16 + type: 192 + host_id: 12 + reserved: 0 + + - + start_resource: 34 + num_resource: 2 + type: 192 + host_id: 30 + reserved: 0 + + - + start_resource: 0 + num_resource: 4 + type: 320 + host_id: 12 + reserved: 0 + + - + start_resource: 4 + num_resource: 4 + type: 320 + host_id: 30 + reserved: 0 + + - + start_resource: 0 + num_resource: 26 + type: 384 + host_id: 128 + reserved: 0 + + - + start_resource: 50176 + num_resource: 164 + type: 2434 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 2435 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 18 + type: 2445 + host_id: 12 + reserved: 0 + + - + start_resource: 18 + num_resource: 6 + type: 2445 + host_id: 35 + reserved: 0 + + - + start_resource: 18 + num_resource: 6 + type: 2445 + host_id: 36 + reserved: 0 + + - + start_resource: 24 + num_resource: 2 + type: 2445 + host_id: 30 + reserved: 0 + + - + start_resource: 26 + num_resource: 6 + type: 2445 + host_id: 128 + reserved: 0 + + - + start_resource: 54 + num_resource: 18 + type: 2446 + host_id: 12 + reserved: 0 + + - + start_resource: 72 + num_resource: 6 + type: 2446 + host_id: 35 + reserved: 0 + + - + start_resource: 72 + num_resource: 6 + type: 2446 + host_id: 36 + reserved: 0 + + - + start_resource: 78 + num_resource: 2 + type: 2446 + host_id: 30 + reserved: 0 + + - + start_resource: 80 + num_resource: 2 + type: 2446 + host_id: 128 + reserved: 0 + + - + start_resource: 32 + num_resource: 12 + type: 2447 + host_id: 12 + reserved: 0 + + - + start_resource: 44 + num_resource: 6 + type: 2447 + host_id: 35 + reserved: 0 + + - + start_resource: 44 + num_resource: 6 + type: 2447 + host_id: 36 + reserved: 0 + + - + start_resource: 50 + num_resource: 2 + type: 2447 + host_id: 30 + reserved: 0 + + - + start_resource: 52 + num_resource: 2 + type: 2447 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 18 + type: 2464 + host_id: 12 + reserved: 0 + + - + start_resource: 18 + num_resource: 6 + type: 2464 + host_id: 35 + reserved: 0 + + - + start_resource: 18 + num_resource: 6 + type: 2464 + host_id: 36 + reserved: 0 + + - + start_resource: 24 + num_resource: 2 + type: 2464 + host_id: 30 + reserved: 0 + + - + start_resource: 26 + num_resource: 6 + type: 2464 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 18 + type: 2465 + host_id: 12 + reserved: 0 + + - + start_resource: 18 + num_resource: 6 + type: 2465 + host_id: 35 + reserved: 0 + + - + start_resource: 18 + num_resource: 6 + type: 2465 + host_id: 36 + reserved: 0 + + - + start_resource: 24 + num_resource: 2 + type: 2465 + host_id: 30 + reserved: 0 + + - + start_resource: 26 + num_resource: 2 + type: 2465 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 12 + type: 2466 + host_id: 12 + reserved: 0 + + - + start_resource: 12 + num_resource: 6 + type: 2466 + host_id: 35 + reserved: 0 + + - + start_resource: 12 + num_resource: 6 + type: 2466 + host_id: 36 + reserved: 0 + + - + start_resource: 18 + num_resource: 2 + type: 2466 + host_id: 30 + reserved: 0 + + - + start_resource: 20 + num_resource: 2 + type: 2466 + host_id: 128 + reserved: 0 + + - + start_resource: 6 + num_resource: 34 + type: 2570 + host_id: 12 + reserved: 0 + + - + start_resource: 44 + num_resource: 36 + type: 2570 + host_id: 35 + reserved: 0 + + - + start_resource: 44 + num_resource: 36 + type: 2570 + host_id: 36 + reserved: 0 + + - + start_resource: 168 + num_resource: 8 + type: 2570 + host_id: 30 + reserved: 0 + + - + start_resource: 14 + num_resource: 512 + type: 2573 + host_id: 12 + reserved: 0 + + - + start_resource: 526 + num_resource: 256 + type: 2573 + host_id: 35 + reserved: 0 + + - + start_resource: 526 + num_resource: 256 + type: 2573 + host_id: 36 + reserved: 0 + + - + start_resource: 782 + num_resource: 128 + type: 2573 + host_id: 30 + reserved: 0 + + - + start_resource: 910 + num_resource: 626 + type: 2573 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 1024 + type: 2575 + host_id: 128 + reserved: 0 + + - + start_resource: 4096 + num_resource: 29 + type: 2576 + host_id: 128 + reserved: 0 + + - + start_resource: 4608 + num_resource: 99 + type: 2577 + host_id: 128 + reserved: 0 + + - + start_resource: 5120 + num_resource: 24 + type: 2578 + host_id: 128 + reserved: 0 + + - + start_resource: 5632 + num_resource: 51 + type: 2579 + host_id: 128 + reserved: 0 + + - + start_resource: 6144 + num_resource: 51 + type: 2580 + host_id: 128 + reserved: 0 + + - + start_resource: 6656 + num_resource: 51 + type: 2581 + host_id: 128 + reserved: 0 + + - + start_resource: 8192 + num_resource: 32 + type: 2582 + host_id: 128 + reserved: 0 + + - + start_resource: 8704 + num_resource: 32 + type: 2583 + host_id: 128 + reserved: 0 + + - + start_resource: 9216 + num_resource: 32 + type: 2584 + host_id: 128 + reserved: 0 + + - + start_resource: 9728 + num_resource: 22 + type: 2585 + host_id: 128 + reserved: 0 + + - + start_resource: 10240 + num_resource: 22 + type: 2586 + host_id: 128 + reserved: 0 + + - + start_resource: 10752 + num_resource: 22 + type: 2587 + host_id: 128 + reserved: 0 + + - + start_resource: 11264 + num_resource: 28 + type: 2588 + host_id: 128 + reserved: 0 + + - + start_resource: 11776 + num_resource: 28 + type: 2589 + host_id: 128 + reserved: 0 + + - + start_resource: 12288 + num_resource: 28 + type: 2590 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 3075 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 10 + type: 3088 + host_id: 12 + reserved: 0 + + - + start_resource: 10 + num_resource: 3 + type: 3088 + host_id: 35 + reserved: 0 + + - + start_resource: 10 + num_resource: 3 + type: 3088 + host_id: 36 + reserved: 0 + + - + start_resource: 13 + num_resource: 3 + type: 3088 + host_id: 30 + reserved: 0 + + - + start_resource: 16 + num_resource: 3 + type: 3088 + host_id: 128 + reserved: 0 + + - + start_resource: 19 + num_resource: 64 + type: 3089 + host_id: 12 + reserved: 0 + + - + start_resource: 19 + num_resource: 64 + type: 3089 + host_id: 30 + reserved: 0 + + - + start_resource: 83 + num_resource: 8 + type: 3090 + host_id: 12 + reserved: 0 + + - + start_resource: 91 + num_resource: 8 + type: 3091 + host_id: 12 + reserved: 0 + + - + start_resource: 99 + num_resource: 10 + type: 3094 + host_id: 12 + reserved: 0 + + - + start_resource: 109 + num_resource: 3 + type: 3094 + host_id: 35 + reserved: 0 + + - + start_resource: 109 + num_resource: 3 + type: 3094 + host_id: 36 + reserved: 0 + + - + start_resource: 112 + num_resource: 3 + type: 3094 + host_id: 30 + reserved: 0 + + - + start_resource: 115 + num_resource: 3 + type: 3094 + host_id: 128 + reserved: 0 + + - + start_resource: 118 + num_resource: 16 + type: 3095 + host_id: 12 + reserved: 0 + + - + start_resource: 118 + num_resource: 16 + type: 3095 + host_id: 30 + reserved: 0 + + - + start_resource: 134 + num_resource: 8 + type: 3096 + host_id: 12 + reserved: 0 + + - + start_resource: 134 + num_resource: 8 + type: 3097 + host_id: 12 + reserved: 0 + + - + start_resource: 142 + num_resource: 8 + type: 3098 + host_id: 12 + reserved: 0 + + - + start_resource: 142 + num_resource: 8 + type: 3099 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 10 + type: 3107 + host_id: 12 + reserved: 0 + + - + start_resource: 10 + num_resource: 3 + type: 3107 + host_id: 35 + reserved: 0 + + - + start_resource: 10 + num_resource: 3 + type: 3107 + host_id: 36 + reserved: 0 + + - + start_resource: 13 + num_resource: 3 + type: 3107 + host_id: 30 + reserved: 0 + + - + start_resource: 16 + num_resource: 3 + type: 3107 + host_id: 128 + reserved: 0 + + - + start_resource: 19 + num_resource: 8 + type: 3108 + host_id: 12 + reserved: 0 + + - + start_resource: 19 + num_resource: 8 + type: 3108 + host_id: 30 + reserved: 0 + + - + start_resource: 27 + num_resource: 1 + type: 3109 + host_id: 12 + reserved: 0 + + - + start_resource: 28 + num_resource: 1 + type: 3110 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 10 + type: 3113 + host_id: 12 + reserved: 0 + + - + start_resource: 10 + num_resource: 3 + type: 3113 + host_id: 35 + reserved: 0 + + - + start_resource: 10 + num_resource: 3 + type: 3113 + host_id: 36 + reserved: 0 + + - + start_resource: 13 + num_resource: 3 + type: 3113 + host_id: 30 + reserved: 0 + + - + start_resource: 16 + num_resource: 3 + type: 3113 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 10 + type: 3114 + host_id: 12 + reserved: 0 + + - + start_resource: 10 + num_resource: 3 + type: 3114 + host_id: 35 + reserved: 0 + + - + start_resource: 10 + num_resource: 3 + type: 3114 + host_id: 36 + reserved: 0 + + - + start_resource: 13 + num_resource: 3 + type: 3114 + host_id: 30 + reserved: 0 + + - + start_resource: 16 + num_resource: 3 + type: 3114 + host_id: 128 + reserved: 0 + + - + start_resource: 19 + num_resource: 1 + type: 3115 + host_id: 12 + reserved: 0 + + - + start_resource: 19 + num_resource: 1 + type: 3115 + host_id: 30 + reserved: 0 + + - + start_resource: 19 + num_resource: 16 + type: 3116 + host_id: 12 + reserved: 0 + + - + start_resource: 19 + num_resource: 16 + type: 3116 + host_id: 30 + reserved: 0 + + - + start_resource: 20 + num_resource: 1 + type: 3117 + host_id: 12 + reserved: 0 + + - + start_resource: 35 + num_resource: 8 + type: 3118 + host_id: 12 + reserved: 0 + + - + start_resource: 21 + num_resource: 1 + type: 3119 + host_id: 12 + reserved: 0 + + - + start_resource: 35 + num_resource: 8 + type: 3120 + host_id: 12 + reserved: 0 + + - + start_resource: 22 + num_resource: 1 + type: 3121 + host_id: 12 + reserved: 0 + + - + start_resource: 43 + num_resource: 8 + type: 3122 + host_id: 12 + reserved: 0 + + - + start_resource: 23 + num_resource: 1 + type: 3123 + host_id: 12 + reserved: 0 + + - + start_resource: 43 + num_resource: 8 + type: 3124 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 3264 + host_id: 128 + reserved: 0 + + - + start_resource: 2 + num_resource: 2 + type: 3274 + host_id: 12 + reserved: 0 + + - + start_resource: 51200 + num_resource: 12 + type: 26178 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 1 + type: 26179 + host_id: 128 + reserved: 0 + + - + start_resource: 0 + num_resource: 6 + type: 26190 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 6 + type: 26209 + host_id: 12 + reserved: 0 + + - + start_resource: 0 + num_resource: 8 + type: 32778 + host_id: 12 + reserved: 0 + + - + start_resource: 12288 + num_resource: 128 + type: 32781 + host_id: 12 + reserved: 0 + + - + start_resource: 3072 + num_resource: 6 + type: 32796 + host_id: 128 + reserved: 0 + + - + start_resource: 3584 + num_resource: 6 + type: 32797 + host_id: 128 + reserved: 0 + + - + start_resource: 4096 + num_resource: 6 + type: 32798 + host_id: 128 + reserved: 0 diff --git a/board/ti/am62ax/sec-cfg.yaml b/board/ti/am62ax/sec-cfg.yaml new file mode 100644 index 0000000000..95602f2671 --- /dev/null +++ b/board/ti/am62ax/sec-cfg.yaml @@ -0,0 +1,375 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Security configuration for AM62ax +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - #1 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - #1 + host_id: 0 + supervisor_host_id: 0 + - #2 + host_id: 0 + supervisor_host_id: 0 + - #3 + host_id: 0 + supervisor_host_id: 0 + - #4 + host_id: 0 + supervisor_host_id: 0 + - #5 + host_id: 0 + supervisor_host_id: 0 + - #6 + host_id: 0 + supervisor_host_id: 0 + - #7 + host_id: 0 + supervisor_host_id: 0 + - #8 + host_id: 0 + supervisor_host_id: 0 + - #9 + host_id: 0 + supervisor_host_id: 0 + - #10 + host_id: 0 + supervisor_host_id: 0 + - #11 + host_id: 0 + supervisor_host_id: 0 + - #12 + host_id: 0 + supervisor_host_id: 0 + - #13 + host_id: 0 + supervisor_host_id: 0 + - #14 + host_id: 0 + supervisor_host_id: 0 + - #15 + host_id: 0 + supervisor_host_id: 0 + - #16 + host_id: 0 + supervisor_host_id: 0 + - #17 + host_id: 0 + supervisor_host_id: 0 + - #18 + host_id: 0 + supervisor_host_id: 0 + - #19 + host_id: 0 + supervisor_host_id: 0 + - #20 + host_id: 0 + supervisor_host_id: 0 + - #21 + host_id: 0 + supervisor_host_id: 0 + - #22 + host_id: 0 + supervisor_host_id: 0 + - #23 + host_id: 0 + supervisor_host_id: 0 + - #24 + host_id: 0 + supervisor_host_id: 0 + - #25 + host_id: 0 + supervisor_host_id: 0 + - #26 + host_id: 0 + supervisor_host_id: 0 + - #27 + host_id: 0 + supervisor_host_id: 0 + - #28 + host_id: 0 + supervisor_host_id: 0 + - #29 + host_id: 0 + supervisor_host_id: 0 + - #30 + host_id: 0 + supervisor_host_id: 0 + - #31 + host_id: 0 + supervisor_host_id: 0 + - #32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id : 0 + otp_entry: + - #1 + host_id: 0 + host_perms: 0 + - #2 + host_id: 0 + host_perms: 0 + - #3 + host_id: 0 + host_perms: 0 + - #4 + host_id: 0 + host_perms: 0 + - #5 + host_id: 0 + host_perms: 0 + - #6 + host_id: 0 + host_perms: 0 + - #7 + host_id: 0 + host_perms: 0 + - #8 + host_id: 0 + host_perms: 0 + - #9 + host_id: 0 + host_perms: 0 + - #10 + host_id: 0 + host_perms: 0 + - #11 + host_id: 0 + host_perms: 0 + - #12 + host_id: 0 + host_perms: 0 + - #13 + host_id: 0 + host_perms: 0 + - #14 + host_id: 0 + host_perms: 0 + - #15 + host_id: 0 + host_perms: 0 + - #16 + host_id: 0 + host_perms: 0 + - #17 + host_id: 0 + host_perms: 0 + - #18 + host_id: 0 + host_perms: 0 + - #19 + host_id: 0 + host_perms: 0 + - #20 + host_id: 0 + host_perms: 0 + - #21 + host_id: 0 + host_perms: 0 + - #22 + host_id: 0 + host_perms: 0 + - #23 + host_id: 0 + host_perms: 0 + - #24 + host_id: 0 + host_perms: 0 + - #25 + host_id: 0 + host_perms: 0 + - #26 + host_id: 0 + host_perms: 0 + - #27 + host_id: 0 + host_perms: 0 + - #28 + host_id: 0 + host_perms: 0 + - #29 + host_id: 0 + host_perms: 0 + - #30 + host_id: 0 + host_perms: 0 + - #31 + host_id: 0 + host_perms: 0 + - #32 + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci : 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size : 0 + rsvd: [0, 0, 0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock : 0x5A + allow_wildcard_unlock : 0x5A + min_cert_rev : 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender : 0 + handover_to_host_id : 0 + rsvd: [0, 0, 0, 0]

Since binman is used to package bootloader images for all K3 devices, we do not have to rely on the earlier methods to package them.

config.mk has been edited to only have binman required make commands.

Scripts that were used to generate x509 certificate for tiboot3.bin and generate tispl.bin have also been removed.

Signed-off-by: Neha Malcom Francis n-francis@ti.com --- arch/arm/mach-k3/config.mk | 92 ------------- tools/k3_fit_atf.sh | 123 ----------------- tools/k3_gen_x509_cert.sh | 262 ------------------------------------- 3 files changed, 477 deletions(-) delete mode 100755 tools/k3_fit_atf.sh delete mode 100755 tools/k3_gen_x509_cert.sh

diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index b342a56538..39767196a7 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -11,34 +11,6 @@ ifeq ($(shell which openssl),) $(error "No openssl in $(PATH), consider installing openssl") endif

-IMAGE_SIZE= $(shell cat $(obj)/u-boot-spl.bin | wc -c) -MAX_SIZE= $(shell printf "%d" $(CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE)) - -ifeq ($(CONFIG_SYS_K3_KEY), "") -KEY="" -# On HS use real key or warn if not available -ifeq ($(CONFIG_TI_SECURE_DEVICE),y) -ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/keys/custMpk.pem),) -KEY=$(TI_SECURE_DEV_PKG)/keys/custMpk.pem -else -$(warning "WARNING: signing key not found. Random key will NOT work on HS hardware!") -endif -endif -else -KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY)) -endif - -# X509 SWRV default -SWRV = $(CONFIG_K3_X509_SWRV) -# On HS use SECDEV provided software revision or warn if not available -ifeq ($(CONFIG_TI_SECURE_DEVICE),y) -ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/keys/swrv.txt),) -SWRV= $(shell cat $(TI_SECURE_DEV_PKG)/keys/swrv.txt) -else -$(warning "WARNING: Software revision file not found. Default may not work on HS hardware.") -endif -endif - O ?= .

# Board config binary artifacts necessary for packaging of tiboot3.bin @@ -88,68 +60,4 @@ INPUTS-y += schema.yaml INPUTS-y += custMpk.pem INPUTS-y += ti-degenerate-key.pem endif - -# tiboot3.bin is mandated by ROM and ROM only supports R5 boot. -# So restrict tiboot3.bin creation for CPU_V7R. -ifndef CONFIG_BINMAN -ifdef CONFIG_CPU_V7R -image_check: $(obj)/u-boot-spl.bin FORCE - @if [ $(IMAGE_SIZE) -gt $(MAX_SIZE) ]; then \ - echo "===============================================" >&2; \ - echo "ERROR: Final Image too big. " >&2; \ - echo "$< size = $(IMAGE_SIZE), max size = $(MAX_SIZE)" >&2; \ - echo "===============================================" >&2; \ - exit 1; \ - fi - -tiboot3.bin: image_check FORCE - $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $(obj)/u-boot-spl.bin \ - -o $@ -l $(CONFIG_SPL_TEXT_BASE) -r $(SWRV) -k $(KEY) - -INPUTS-y += tiboot3.bin -endif -endif - -ifdef CONFIG_ARM64 - -ifeq ($(CONFIG_SOC_K3_J721E),) -export DM := /dev/null endif - -ifndef CONFIG_BINMAN -ifeq ($(CONFIG_TI_SECURE_DEVICE),y) -SPL_ITS := u-boot-spl-k3_HS.its -$(SPL_ITS): export IS_HS=1 -INPUTS-y += tispl.bin_HS -else -SPL_ITS := u-boot-spl-k3.its -INPUTS-y += tispl.bin -endif -endif - -ifeq ($(CONFIG_SPL_OF_LIST),) -LIST_OF_DTB := $(CONFIG_DEFAULT_DEVICE_TREE) -else -LIST_OF_DTB := $(CONFIG_SPL_OF_LIST) -endif - -quiet_cmd_k3_mkits = MKITS $@ -cmd_k3_mkits = \ - $(srctree)/tools/k3_fit_atf.sh \ - $(CONFIG_K3_ATF_LOAD_ADDR) \ - $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(LIST_OF_DTB))) > $@ - -$(SPL_ITS): FORCE - $(call cmd,k3_mkits) -endif - -else - -ifeq ($(CONFIG_TI_SECURE_DEVICE),y) -INPUTS-y += u-boot.img_HS -else -INPUTS-y += u-boot.img -endif -endif - -include $(srctree)/arch/arm/mach-k3/config_secure.mk diff --git a/tools/k3_fit_atf.sh b/tools/k3_fit_atf.sh deleted file mode 100755 index 7bc07ad074..0000000000 --- a/tools/k3_fit_atf.sh +++ /dev/null @@ -1,123 +0,0 @@ -#!/bin/sh -# SPDX-License-Identifier: GPL-2.0+ -# -# script to generate FIT image source for K3 Family boards with -# ATF, OPTEE, SPL and multiple device trees (given on the command line). -# Inspired from board/sunxi/mksunxi_fit_atf.sh -# -# usage: $0 <atf_load_addr> <dt_name> [<dt_name> [<dt_name] ...] - -[ -z "$ATF" ] && ATF="bl31.bin" - -if [ ! -f $ATF ]; then - echo "WARNING ATF file $ATF NOT found, resulting binary is non-functional" >&2 - ATF=/dev/null -fi - -[ -z "$TEE" ] && TEE="bl32.bin" - -if [ ! -f $TEE ]; then - echo "WARNING OPTEE file $TEE NOT found, resulting might be non-functional" >&2 - TEE=/dev/null -fi - -[ -z "$DM" ] && DM="dm.bin" - -if [ ! -e $DM ]; then - echo "WARNING DM file $DM NOT found, resulting might be non-functional" >&2 - DM=/dev/null -fi - -if [ ! -z "$IS_HS" ]; then - HS_APPEND=_HS -fi - -cat << __HEADER_EOF -/dts-v1/; - -/ { - description = "Configuration to load ATF and SPL"; - #address-cells = <1>; - - images { - atf { - description = "ARM Trusted Firmware"; - data = /incbin/("$ATF"); - type = "firmware"; - arch = "arm64"; - compression = "none"; - os = "arm-trusted-firmware"; - load = <$1>; - entry = <$1>; - }; - tee { - description = "OPTEE"; - data = /incbin/("$TEE"); - type = "tee"; - arch = "arm64"; - compression = "none"; - os = "tee"; - load = <0x9e800000>; - entry = <0x9e800000>; - }; - dm { - description = "DM binary"; - data = /incbin/("$DM"); - type = "firmware"; - arch = "arm32"; - compression = "none"; - os = "DM"; - load = <0x89000000>; - entry = <0x89000000>; - }; - spl { - description = "SPL (64-bit)"; - data = /incbin/("spl/u-boot-spl-nodtb.bin$HS_APPEND"); - type = "standalone"; - os = "U-Boot"; - arch = "arm64"; - compression = "none"; - load = <0x80080000>; - entry = <0x80080000>; - }; -__HEADER_EOF - -# shift through ATF load address in the command line arguments -shift - -for dtname in $* -do - cat << __FDT_IMAGE_EOF - $(basename $dtname) { - description = "$(basename $dtname .dtb)"; - data = /incbin/("$dtname$HS_APPEND"); - type = "flat_dt"; - arch = "arm"; - compression = "none"; - }; -__FDT_IMAGE_EOF -done - -cat << __CONF_HEADER_EOF - }; - configurations { - default = "$(basename $1)"; - -__CONF_HEADER_EOF - -for dtname in $* -do - cat << __CONF_SECTION_EOF - $(basename $dtname) { - description = "$(basename $dtname .dtb)"; - firmware = "atf"; - loadables = "tee", "dm", "spl"; - fdt = "$(basename $dtname)"; - }; -__CONF_SECTION_EOF -done - -cat << __ITS_EOF - }; -}; -__ITS_EOF diff --git a/tools/k3_gen_x509_cert.sh b/tools/k3_gen_x509_cert.sh deleted file mode 100755 index d9cde07417..0000000000 --- a/tools/k3_gen_x509_cert.sh +++ /dev/null @@ -1,262 +0,0 @@ -#!/bin/bash -# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -# -# Script to add K3 specific x509 cetificate to a binary. -# - -# Variables -OUTPUT=tiboot3.bin -TEMP_X509=x509-temp.cert -CERT=certificate.bin -RAND_KEY=eckey.pem -LOADADDR=0x41c00000 -BOOTCORE_OPTS=0 -BOOTCORE=16 -DEBUG_TYPE=0 -SWRV=1 - -gen_degen_template() { -cat << 'EOF' > degen-template.txt - -asn1=SEQUENCE:rsa_key - -[rsa_key] -version=INTEGER:0 -modulus=INTEGER:0xDEGEN_MODULUS -pubExp=INTEGER:1 -privExp=INTEGER:1 -p=INTEGER:0xDEGEN_P -q=INTEGER:0xDEGEN_Q -e1=INTEGER:1 -e2=INTEGER:1 -coeff=INTEGER:0xDEGEN_COEFF -EOF -} - -# Generate x509 Template -gen_template() { -cat << 'EOF' > x509-template.txt - [ req ] - distinguished_name = req_distinguished_name - x509_extensions = v3_ca - prompt = no - dirstring_type = nobmp - - [ req_distinguished_name ] - C = US - ST = TX - L = Dallas - O = Texas Instruments Incorporated - OU = Processors - CN = TI support - emailAddress = support@ti.com - - [ v3_ca ] - basicConstraints = CA:true - 1.3.6.1.4.1.294.1.1 = ASN1:SEQUENCE:boot_seq - 1.3.6.1.4.1.294.1.2 = ASN1:SEQUENCE:image_integrity - 1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv -# 1.3.6.1.4.1.294.1.4 = ASN1:SEQUENCE:encryption - 1.3.6.1.4.1.294.1.8 = ASN1:SEQUENCE:debug - - [ boot_seq ] - certType = INTEGER:TEST_CERT_TYPE - bootCore = INTEGER:TEST_BOOT_CORE - bootCoreOpts = INTEGER:TEST_BOOT_CORE_OPTS - destAddr = FORMAT:HEX,OCT:TEST_BOOT_ADDR - imageSize = INTEGER:TEST_IMAGE_LENGTH - - [ image_integrity ] - shaType = OID:2.16.840.1.101.3.4.2.3 - shaValue = FORMAT:HEX,OCT:TEST_IMAGE_SHA_VAL - - [ swrv ] - swrv = INTEGER:TEST_SWRV - -# [ encryption ] -# initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV -# randomString = FORMAT:HEX,OCT:TEST_IMAGE_ENC_RS -# iterationCnt = INTEGER:TEST_IMAGE_KEY_DERIVE_INDEX -# salt = FORMAT:HEX,OCT:TEST_IMAGE_KEY_DERIVE_SALT - - [ debug ] - debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000 - debugType = INTEGER:TEST_DEBUG_TYPE - coreDbgEn = INTEGER:0 - coreDbgSecEn = INTEGER:0 -EOF -} - -parse_key() { - sed '/ /s/://g' key.txt | \ - awk '!/ / {printf("\n%s\n", $0)}; / / {printf("%s", $0)}' | \ - sed 's/ //g' | \ - awk "/$1:/{getline; print}" -} - -gen_degen_key() { -# Generate a 4096 bit RSA Key - openssl genrsa -out key.pem 1024 >>/dev/null 2>&1 - openssl rsa -in key.pem -text -out key.txt >>/dev/null 2>&1 - DEGEN_MODULUS=$( parse_key 'modulus' ) - DEGEN_P=$( parse_key 'prime1' ) - DEGEN_Q=$( parse_key 'prime2' ) - DEGEN_COEFF=$( parse_key 'coefficient' ) - gen_degen_template - - sed -e "s/DEGEN_MODULUS/$DEGEN_MODULUS/"\ - -e "s/DEGEN_P/$DEGEN_P/" \ - -e "s/DEGEN_Q/$DEGEN_Q/" \ - -e "s/DEGEN_COEFF/$DEGEN_COEFF/" \ - degen-template.txt > degenerateKey.txt - - openssl asn1parse -genconf degenerateKey.txt -out degenerateKey.der >>/dev/null 2>&1 - openssl rsa -in degenerateKey.der -inform DER -outform PEM -out $RAND_KEY >>/dev/null 2>&1 - KEY=$RAND_KEY - rm key.pem key.txt degen-template.txt degenerateKey.txt degenerateKey.der -} - -declare -A options_help -usage() { - if [ -n "$*" ]; then - echo "ERROR: $*" - fi - echo -n "Usage: $0 " - for option in "${!options_help[@]}" - do - arg=`echo ${options_help[$option]}|cut -d ':' -f1` - if [ -n "$arg" ]; then - arg=" $arg" - fi - echo -n "[-$option$arg] " - done - echo - echo -e "\nWhere:" - for option in "${!options_help[@]}" - do - arg=`echo ${options_help[$option]}|cut -d ':' -f1` - txt=`echo ${options_help[$option]}|cut -d ':' -f2` - tb="\t\t\t" - if [ -n "$arg" ]; then - arg=" $arg" - tb="\t" - fi - echo -e " -$option$arg:$tb$txt" - done - echo - echo "Examples of usage:-" - echo "# Example of signing the SYSFW binary with rsa degenerate key" - echo " $0 -c 0 -b ti-sci-firmware-am6x.bin -o sysfw.bin -l 0x40000" - echo "# Example of signing the SPL binary with rsa degenerate key" - echo " $0 -c 16 -b spl/u-boot-spl.bin -o tiboot3.bin -l 0x41c00000" -} - -options_help[b]="bin_file:Bin file that needs to be signed" -options_help[k]="key_file:file with key inside it. If not provided script generates a rsa degenerate key." -options_help[o]="output_file:Name of the final output file. default to $OUTPUT" -options_help[c]="core_id:target core id on which the image would be running. Default to $BOOTCORE" -options_help[l]="loadaddr: Target load address of the binary in hex. Default to $LOADADDR" -options_help[d]="debug_type: Debug type, set to 4 to enable early JTAG. Default to $DEBUG_TYPE" -options_help[r]="SWRV: Software Rev for X509 certificate" - -while getopts "b:k:o:c:l:d:h:r:" opt -do - case $opt in - b) - BIN=$OPTARG - ;; - k) - KEY=$OPTARG - ;; - o) - OUTPUT=$OPTARG - ;; - l) - LOADADDR=$OPTARG - ;; - c) - BOOTCORE=$OPTARG - ;; - d) - DEBUG_TYPE=$OPTARG - ;; - r) - SWRV=$OPTARG - ;; - h) - usage - exit 0 - ;; - ?) - usage "Invalid Option '-$OPTARG'" - exit 1 - ;; - :) - usage "Option '-$OPTARG' Needs an argument." - exit 1 - ;; - esac -done - -if [ "$#" -eq 0 ]; then - usage "Arguments missing" - exit 1 -fi - -if [ -z "$BIN" ]; then - usage "Bin file missing in arguments" - exit 1 -fi - -# Generate rsa degenerate key if user doesn't provide a key -if [ -z "$KEY" ]; then - gen_degen_key -fi - -if [ $BOOTCORE == 0 ]; then # BOOTCORE M3, loaded by ROM - CERTTYPE=2 -elif [ $BOOTCORE == 16 ]; then # BOOTCORE R5, loaded by ROM - CERTTYPE=1 -else # Non BOOTCORE, loaded by SYSFW - BOOTCORE_OPTS_VER=$(printf "%01x" 1) - # Add input args option for SET and CLR flags. - BOOTCORE_OPTS_SETFLAG=$(printf "%08x" 0) - BOOTCORE_OPTS_CLRFLAG=$(printf "%08x" 0x100) # Clear FLAG_ARMV8_AARCH32 - BOOTCORE_OPTS="0x$BOOTCORE_OPTS_VER$BOOTCORE_OPTS_SETFLAG$BOOTCORE_OPTS_CLRFLAG" - # Set the cert type to zero. - # We are not using public/private key store now - CERTTYPE=$(printf "0x%08x" 0) -fi - -SHA_VAL=`openssl dgst -sha512 -hex $BIN | sed -e "s/^.*= //g"` -BIN_SIZE=`cat $BIN | wc -c` -ADDR=`printf "%08x" $LOADADDR` - -gen_cert() { - #echo "Certificate being generated :" - #echo " LOADADDR = 0x$ADDR" - #echo " IMAGE_SIZE = $BIN_SIZE" - #echo " CERT_TYPE = $CERTTYPE" - #echo " DEBUG_TYPE = $DEBUG_TYPE" - #echo " SWRV = $SWRV" - sed -e "s/TEST_IMAGE_LENGTH/$BIN_SIZE/" \ - -e "s/TEST_IMAGE_SHA_VAL/$SHA_VAL/" \ - -e "s/TEST_CERT_TYPE/$CERTTYPE/" \ - -e "s/TEST_BOOT_CORE_OPTS/$BOOTCORE_OPTS/" \ - -e "s/TEST_BOOT_CORE/$BOOTCORE/" \ - -e "s/TEST_BOOT_ADDR/$ADDR/" \ - -e "s/TEST_DEBUG_TYPE/$DEBUG_TYPE/" \ - -e "s/TEST_SWRV/$SWRV/" \ - x509-template.txt > $TEMP_X509 - openssl req -new -x509 -key $KEY -nodes -outform DER -out $CERT -config $TEMP_X509 -sha512 -} - -gen_template -gen_cert -cat $CERT $BIN > $OUTPUT - -# Remove all intermediate files -rm $TEMP_X509 $CERT x509-template.txt -if [ "$KEY" == "$RAND_KEY" ]; then - rm $RAND_KEY -fi