On 28.01.2022 18:31, Eugen Hristev - M18282 wrote:

On 1/28/22 1:10 PM, Codrin Ciubotariu wrote:

...

Non GMAC's MDIO pins should have slew rate disabled for R(G)MII modes. Set them accordingly in DT.

Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com

Tested-by: Eugen Hristev eugen.hristev@microchip.com

Reviewed-by: Claudiu Beznea claudiu.beznea@microchip.com

...

arch/arm/dts/sama7g5ek.dts | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 6adb044258..ac6f23f64e 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -125,7 +125,9 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default";

• pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txc_default>;

• pinctrl-0 = <&pinctrl_gmac0_default

•      &pinctrl_gmac0_mdio_default
  

•      &pinctrl_gmac0_txc_default>;
  

  phy-mode = "rgmii-id"; status = "okay";

@@ -138,7 +140,7 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default";

• pinctrl-0 = <&pinctrl_gmac1_default>;

• pinctrl-0 = <&pinctrl_gmac1_default &pinctrl_gmac1_mdio_default>; phy-mode = "rmii"; status = "okay";

@@ -235,14 +237,20 @@ <PIN_PA15__G0_TXEN>, <PIN_PA30__G0_RXCK>, <PIN_PA18__G0_RXDV>,

• 	 <PIN_PA22__G0_MDC>,
  

• 	 <PIN_PA23__G0_MDIO>,
   <PIN_PA25__G0_125CK>;
  

• slew-rate = <0>;
  

• bias-disable;
  

• };

• pinctrl_gmac0_mdio_default: gmac0_mdio_default {

• pinmux = <PIN_PA22__G0_MDC>,
  

• 	 <PIN_PA23__G0_MDIO>;
  

  bias-disable; };

  pinctrl_gmac0_txc_default: gmac0_txc_default { pinmux = <PIN_PA24__G0_TXCK>;

• slew-rate = <0>;
  

  bias-pull-up; };

@@ -254,8 +262,13 @@ <PIN_PD25__G1_RX0>, <PIN_PD26__G1_RX1>, <PIN_PD27__G1_RXER>,

• 	 <PIN_PD24__G1_RXDV>,
  

• 	 <PIN_PD28__G1_MDC>,
  

• 	 <PIN_PD24__G1_RXDV>;
  

• slew-rate = <0>;
  

• bias-disable;
  

• };
• pinctrl_gmac1_mdio_default: gmac1_mdio_default {

• pinmux = <PIN_PD28__G1_MDC>,
   <PIN_PD29__G1_MDIO>;
  

  bias-disable; };