[U-Boot] [PATCH 00/10] ARM: uniphier: driver updates for ARMv8 SoCs support
Masahiro Yamada (10): serial: uniphier: use devm_get_addr() to get base address clk: uniphier: use devm_get_addr() to get base address i2c: uniphier: use devm_get_addr() to get base address gpio: uniphier: use devm_get_addr() to get base address mmc: uniphier: use devm_get_addr() to get base address pinctrl: uniphier: use devm_get_addr() to get base address pinctrl: uniphier: introduce quirks flags pinctrl: uniphier: support per-pin input enable quirk for new SoCs pinctrl: uniphier: support UniPhier PH1-LD20 pinctrl driver pinctrl: uniphier: support UniPhier PH1-LD11 pinctrl driver
drivers/clk/uniphier/clk-uniphier-core.c | 9 +- drivers/gpio/gpio-uniphier.c | 8 +- drivers/i2c/i2c-uniphier-f.c | 12 +-- drivers/i2c/i2c-uniphier.c | 11 +-- drivers/mmc/uniphier-sd.c | 9 +- drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 64 ++++++++++--- drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 114 +++++++++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c | 3 - drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c | 3 - drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 4 +- drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 4 +- drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 3 - drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c | 3 - drivers/pinctrl/uniphier/pinctrl-uniphier.h | 10 +- drivers/serial/serial_uniphier.c | 8 +- 17 files changed, 208 insertions(+), 64 deletions(-) create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.)
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/serial/serial_uniphier.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c index edb9203..525f0a4 100644 --- a/drivers/serial/serial_uniphier.c +++ b/drivers/serial/serial_uniphier.c @@ -6,6 +6,7 @@
#include <linux/io.h> #include <linux/serial_reg.h> +#include <linux/sizes.h> #include <asm/errno.h> #include <dm/device.h> #include <mapmem.h> @@ -91,12 +92,13 @@ static int uniphier_serial_probe(struct udevice *dev) struct uniphier_serial_private_data *priv = dev_get_priv(dev); struct uniphier_serial __iomem *port; fdt_addr_t base; - fdt_size_t size; u32 tmp;
- base = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size); + base = dev_get_addr(dev); + if (base == FDT_ADDR_T_NONE) + return -EINVAL;
- port = map_sysmem(base, size); + port = map_sysmem(base, SZ_64); if (!port) return -ENOMEM;
Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.)
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/clk/uniphier/clk-uniphier-core.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c index e79e0ff..25c163b 100644 --- a/drivers/clk/uniphier/clk-uniphier-core.c +++ b/drivers/clk/uniphier/clk-uniphier-core.c @@ -8,13 +8,12 @@ #include <mapmem.h> #include <linux/bitops.h> #include <linux/io.h> +#include <linux/sizes.h> #include <clk.h> #include <dm/device.h>
#include "clk-uniphier.h"
-DECLARE_GLOBAL_DATA_PTR; - static int uniphier_clk_enable(struct udevice *dev, int index) { struct uniphier_clk_priv *priv = dev_get_priv(dev); @@ -133,14 +132,12 @@ int uniphier_clk_probe(struct udevice *dev) { struct uniphier_clk_priv *priv = dev_get_priv(dev); fdt_addr_t addr; - fdt_size_t size;
- addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", - &size); + addr = dev_get_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL;
- priv->base = map_sysmem(addr, size); + priv->base = map_sysmem(addr, SZ_4K); if (!priv->base) return -ENOMEM;
Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.)
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/i2c/i2c-uniphier-f.c | 12 +++++------- drivers/i2c/i2c-uniphier.c | 11 +++++------ 2 files changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/i2c/i2c-uniphier-f.c b/drivers/i2c/i2c-uniphier-f.c index b3349af..aebdcfc 100644 --- a/drivers/i2c/i2c-uniphier-f.c +++ b/drivers/i2c/i2c-uniphier-f.c @@ -7,6 +7,7 @@ #include <common.h> #include <linux/types.h> #include <linux/io.h> +#include <linux/sizes.h> #include <asm/errno.h> #include <dm/device.h> #include <dm/root.h> @@ -14,8 +15,6 @@ #include <fdtdec.h> #include <mapmem.h>
-DECLARE_GLOBAL_DATA_PTR; - struct uniphier_fi2c_regs { u32 cr; /* control register */ #define I2C_CR_MST (1 << 3) /* master mode */ @@ -112,15 +111,14 @@ static int check_device_busy(struct uniphier_fi2c_regs __iomem *regs) static int uniphier_fi2c_probe(struct udevice *dev) { fdt_addr_t addr; - fdt_size_t size; struct uniphier_fi2c_dev *priv = dev_get_priv(dev); int ret;
- addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", - &size); - - priv->regs = map_sysmem(addr, size); + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL;
+ priv->regs = map_sysmem(addr, SZ_128); if (!priv->regs) return -ENOMEM;
diff --git a/drivers/i2c/i2c-uniphier.c b/drivers/i2c/i2c-uniphier.c index 85b9eff..f8221da 100644 --- a/drivers/i2c/i2c-uniphier.c +++ b/drivers/i2c/i2c-uniphier.c @@ -7,6 +7,7 @@ #include <common.h> #include <linux/types.h> #include <linux/io.h> +#include <linux/sizes.h> #include <asm/errno.h> #include <dm/device.h> #include <dm/root.h> @@ -14,8 +15,6 @@ #include <fdtdec.h> #include <mapmem.h>
-DECLARE_GLOBAL_DATA_PTR; - struct uniphier_i2c_regs { u32 dtrm; /* data transmission */ #define I2C_DTRM_STA (1 << 10) @@ -48,13 +47,13 @@ struct uniphier_i2c_dev { static int uniphier_i2c_probe(struct udevice *dev) { fdt_addr_t addr; - fdt_size_t size; struct uniphier_i2c_dev *priv = dev_get_priv(dev);
- addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size); - - priv->regs = map_sysmem(addr, size); + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL;
+ priv->regs = map_sysmem(addr, SZ_64); if (!priv->regs) return -ENOMEM;
Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.)
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/gpio/gpio-uniphier.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c index 80bb16e..bde51ea 100644 --- a/drivers/gpio/gpio-uniphier.c +++ b/drivers/gpio/gpio-uniphier.c @@ -9,6 +9,7 @@ #include <mapmem.h> #include <linux/bitops.h> #include <linux/io.h> +#include <linux/sizes.h> #include <asm/errno.h> #include <asm/gpio.h>
@@ -91,17 +92,14 @@ static int uniphier_gpio_probe(struct udevice *dev) { struct uniphier_gpio_priv *priv = dev_get_priv(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - DECLARE_GLOBAL_DATA_PTR; fdt_addr_t addr; - fdt_size_t size; unsigned int tmp;
- addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", - &size); + addr = dev_get_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL;
- priv->base = map_sysmem(addr, size); + priv->base = map_sysmem(addr, SZ_8); if (!priv->base) return -ENOMEM;
Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.)
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/mmc/uniphier-sd.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index 3bc4d94..81a80cd 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -12,6 +12,7 @@ #include <dm/device.h> #include <linux/compat.h> #include <linux/io.h> +#include <linux/sizes.h> #include <asm/unaligned.h> #include <asm/dma-mapping.h>
@@ -650,15 +651,17 @@ int uniphier_sd_probe(struct udevice *dev) struct uniphier_sd_priv *priv = dev_get_priv(dev); struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); fdt_addr_t base; - fdt_size_t size; struct udevice *clk_dev; int clk_id; int ret;
priv->dev = dev;
- base = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size); - priv->regbase = map_sysmem(base, size); + base = dev_get_addr(dev); + if (base == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->regbase = map_sysmem(base, SZ_2K); if (!priv->regbase) return -ENOMEM;
Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.)
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index ffdccab..ac3a06c 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -8,13 +8,12 @@ #include <mapmem.h> #include <linux/io.h> #include <linux/err.h> +#include <linux/sizes.h> #include <dm/device.h> #include <dm/pinctrl.h>
#include "pinctrl-uniphier.h"
-DECLARE_GLOBAL_DATA_PTR; - static int uniphier_pinctrl_get_groups_count(struct udevice *dev) { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); @@ -128,14 +127,12 @@ int uniphier_pinctrl_probe(struct udevice *dev, { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); fdt_addr_t addr; - fdt_size_t size;
- addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", - &size); + addr = dev_get_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL;
- priv->base = map_sysmem(addr, size); + priv->base = map_sysmem(addr, SZ_4K); if (!priv->base) return -ENOMEM;
The core part of the UniPhier pinctrl driver needs to support a new quirk for upcoming UniPhier ARMv8 SoCs. This often happens because pinctrl drivers include really SoC-specific stuff.
This commit intends to tidy up SoC-specific parameters of the existing drivers before adding new ones. Having flags would be better than adding new members every time a new SoC-specific quirk comes up.
At this time, there is one flag, UNIPHIER_PINCTRL_DBGMUX_SEPARATE. This quirk was added for PH1-Pro4 and PH1-Pro5 as requirement from our customer. For those SoCs, one pinmux setting is controlled by the combination of two separate registers; LSB bits at register offset (8 * N) and MSB bits at (8 * N + 4). Because it is impossible to update two separate registers atomically, the LOAD_PINCTRL register should be set in order to make the pinmux settings really effective.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 27 ++++++++++++++++++++---- drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c | 3 --- drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c | 3 --- drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 4 +--- drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 4 +--- drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 3 --- drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c | 3 --- drivers/pinctrl/uniphier/pinctrl-uniphier.h | 8 +++---- 8 files changed, 28 insertions(+), 27 deletions(-)
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index ac3a06c..7a6c95c 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -68,14 +68,33 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, unsigned muxval) { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); - unsigned mux_bits = priv->socdata->mux_bits; - unsigned reg_stride = priv->socdata->reg_stride; - unsigned reg, reg_end, shift, mask; + unsigned mux_bits, reg_stride, reg, reg_end, shift, mask; + bool load_pinctrl; u32 tmp;
/* some pins need input-enabling */ uniphier_pinconf_input_enable(dev, pin);
+ if (priv->socdata->quirks & UNIPHIER_PINCTRL_DBGMUX_SEPARATE) { + /* + * Mode offset bit + * Normal 4 * n shift+3:shift + * Debug 4 * n shift+7:shift+4 + */ + mux_bits = 4; + reg_stride = 8; + load_pinctrl = true; + } else { + /* + * Mode offset bit + * Normal 8 * n shift+3:shift + * Debug 8 * n + 4 shift+3:shift + */ + mux_bits = 8; + reg_stride = 4; + load_pinctrl = false; + } + reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride; reg_end = reg + reg_stride; shift = pin * mux_bits % 32; @@ -94,7 +113,7 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, muxval >>= mux_bits; }
- if (priv->socdata->load_pinctrl) + if (load_pinctrl) writel(1, priv->base + UNIPHIER_PINCTRL_LOAD_PINMUX); }
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c index b3d47f0..8f7574e 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c @@ -107,9 +107,6 @@ static struct uniphier_pinctrl_socdata ph1_ld4_pinctrl_socdata = { .groups_count = ARRAY_SIZE(ph1_ld4_groups), .functions = ph1_ld4_functions, .functions_count = ARRAY_SIZE(ph1_ld4_functions), - .mux_bits = 8, - .reg_stride = 4, - .load_pinctrl = false, };
static int ph1_ld4_pinctrl_probe(struct udevice *dev) diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c index 8703a21..2a5d5f3 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c @@ -107,9 +107,6 @@ static struct uniphier_pinctrl_socdata ph1_ld6b_pinctrl_socdata = { .groups_count = ARRAY_SIZE(ph1_ld6b_groups), .functions = ph1_ld6b_functions, .functions_count = ARRAY_SIZE(ph1_ld6b_functions), - .mux_bits = 8, - .reg_stride = 4, - .load_pinctrl = false, };
static int ph1_ld6b_pinctrl_probe(struct udevice *dev) diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c index b3eaf13..e07fafb 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c @@ -103,9 +103,7 @@ static struct uniphier_pinctrl_socdata ph1_pro4_pinctrl_socdata = { .groups_count = ARRAY_SIZE(ph1_pro4_groups), .functions = ph1_pro4_functions, .functions_count = ARRAY_SIZE(ph1_pro4_functions), - .mux_bits = 4, - .reg_stride = 8, - .load_pinctrl = true, + .quirks = UNIPHIER_PINCTRL_DBGMUX_SEPARATE, };
static int ph1_pro4_pinctrl_probe(struct udevice *dev) diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 3749250..d20db9f 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c @@ -117,9 +117,7 @@ static struct uniphier_pinctrl_socdata ph1_pro5_pinctrl_socdata = { .groups_count = ARRAY_SIZE(ph1_pro5_groups), .functions = ph1_pro5_functions, .functions_count = ARRAY_SIZE(ph1_pro5_functions), - .mux_bits = 4, - .reg_stride = 8, - .load_pinctrl = true, + .quirks = UNIPHIER_PINCTRL_DBGMUX_SEPARATE, };
static int ph1_pro5_pinctrl_probe(struct udevice *dev) diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index 2cca69d..976bb2f 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c @@ -114,9 +114,6 @@ static struct uniphier_pinctrl_socdata proxstream2_pinctrl_socdata = { .groups_count = ARRAY_SIZE(proxstream2_groups), .functions = proxstream2_functions, .functions_count = ARRAY_SIZE(proxstream2_functions), - .mux_bits = 8, - .reg_stride = 4, - .load_pinctrl = false, };
static int proxstream2_pinctrl_probe(struct udevice *dev) diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c index 5fafdb6..6cbf215 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c @@ -115,9 +115,6 @@ static struct uniphier_pinctrl_socdata ph1_sld8_pinctrl_socdata = { .groups_count = ARRAY_SIZE(ph1_sld8_groups), .functions = ph1_sld8_functions, .functions_count = ARRAY_SIZE(ph1_sld8_functions), - .mux_bits = 8, - .reg_stride = 4, - .load_pinctrl = false, };
static int ph1_sld8_pinctrl_probe(struct udevice *dev) diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index 6bdebf2..e622d93 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -59,8 +59,7 @@ struct uniphier_pinctrl_group { * @functions_count: number of pinmux functions * @mux_bits: bit width of each pinmux register * @reg_stride: stride of pinmux register address - * @load_pinctrl: if true, LOAD_PINMUX register must be set to one for new - * values in pinmux registers to become really effective + * @quirks: SoC-specific quirk flags */ struct uniphier_pinctrl_socdata { const struct uniphier_pinctrl_pin *pins; @@ -69,9 +68,8 @@ struct uniphier_pinctrl_socdata { int groups_count; const char * const *functions; int functions_count; - unsigned mux_bits; - unsigned reg_stride; - bool load_pinctrl; + unsigned quirks; +#define UNIPHIER_PINCTRL_DBGMUX_SEPARATE BIT(0) };
#define UNIPHIER_PINCTRL_PIN(a, b) \
Upcoming new pinctrl drivers of PH1-LD11/LD20 support input signal gating for each pin. (While, existing ones only support it per pin group.) This commit prepares the core part for that.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 28 +++++++++++++++++++++++- drivers/pinctrl/uniphier/pinctrl-uniphier.h | 2 ++ 2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index 7a6c95c..5e7ff02 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -44,7 +44,23 @@ static const char *uniphier_pinmux_get_function_name(struct udevice *dev, return priv->socdata->functions[selector]; }
-static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin) +static void uniphier_pinconf_input_enable_perpin(struct udevice *dev, + unsigned pin) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + unsigned reg; + u32 mask, tmp; + + reg = UNIPHIER_PINCTRL_IECTRL + pin / 32 * 4; + mask = BIT(pin % 32); + + tmp = readl(priv->base + reg); + tmp |= mask; + writel(tmp, priv->base + reg); +} + +static void uniphier_pinconf_input_enable_legacy(struct udevice *dev, + unsigned pin) { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); int pins_count = priv->socdata->pins_count; @@ -64,6 +80,16 @@ static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin) } }
+static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + if (priv->socdata->quirks & UNIPHIER_PINCTRL_PERPIN_IECTRL) + uniphier_pinconf_input_enable_perpin(dev, pin); + else + uniphier_pinconf_input_enable_legacy(dev, pin); +} + static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, unsigned muxval) { diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index e622d93..0134d06 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -7,6 +7,7 @@ #ifndef __PINCTRL_UNIPHIER_H__ #define __PINCTRL_UNIPHIER_H__
+#include <linux/bitops.h> #include <linux/bug.h> #include <linux/kernel.h> #include <linux/types.h> @@ -69,6 +70,7 @@ struct uniphier_pinctrl_socdata { const char * const *functions; int functions_count; unsigned quirks; +#define UNIPHIER_PINCTRL_PERPIN_IECTRL BIT(1) #define UNIPHIER_PINCTRL_DBGMUX_SEPARATE BIT(0) };
Add pin configuration and pinmux support for UniPhier PH1-LD20 SoC.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 113 +++++++++++++++++++++++ 3 files changed, 120 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index d22d485..626df8e 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -39,4 +39,10 @@ config PINCTRL_UNIPHIER_LD6B default y select PINCTRL_UNIPHIER
+config PINCTRL_UNIPHIER_LD20 + bool "UniPhier PH1-LD20 SoC pinctrl driver" + depends on ARCH_UNIPHIER_LD20 + default y + select PINCTRL_UNIPHIER + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index c6cc13d..bea4dd8 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8) += pinctrl-uniphier-sld8.o obj-$(CONFIG_PINCTRL_UNIPHIER_PRO5) += pinctrl-uniphier-pro5.o obj-$(CONFIG_PINCTRL_UNIPHIER_PXS2) += pinctrl-uniphier-pxs2.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD6B) += pinctrl-uniphier-ld6b.o +obj-$(CONFIG_PINCTRL_UNIPHIER_LD20) += pinctrl-uniphier-ld20.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c new file mode 100644 index 0000000..9209109 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c @@ -0,0 +1,113 @@ +/* + * Copyright (C) 2016 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25}; +static const unsigned emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29}; +static const unsigned emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const unsigned i2c0_pins[] = {63, 64}; +static const unsigned i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {65, 66}; +static const unsigned i2c1_muxvals[] = {0, 0}; +static const unsigned i2c3_pins[] = {67, 68}; +static const unsigned i2c3_muxvals[] = {1, 1}; +static const unsigned i2c4_pins[] = {61, 62}; +static const unsigned i2c4_muxvals[] = {1, 1}; +static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16}; +static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0}; +static const unsigned nand_cs1_pins[] = {}; +static const unsigned nand_cs1_muxvals[] = {}; +static const unsigned sd_pins[] = {10, 11, 12, 13, 14, 15, 16, 17}; +static const unsigned sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8}; /* No SDVOLC */ +static const unsigned uart0_pins[] = {54, 55}; +static const unsigned uart0_muxvals[] = {0, 0}; +static const unsigned uart1_pins[] = {58, 59}; +static const unsigned uart1_muxvals[] = {1, 1}; +static const unsigned uart2_pins[] = {90, 91}; +static const unsigned uart2_muxvals[] = {1, 1}; +static const unsigned uart3_pins[] = {94, 95}; +static const unsigned uart3_muxvals[] = {1, 1}; +static const unsigned usb0_pins[] = {46, 47}; +static const unsigned usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {48, 49}; +static const unsigned usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {50, 51}; +static const unsigned usb2_muxvals[] = {0, 0}; +static const unsigned usb3_pins[] = {52, 53}; +static const unsigned usb3_muxvals[] = {0, 0}; + +static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c4), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +}; + +static const char * const uniphier_ld20_functions[] = { + "emmc", + "i2c0", + "i2c1", + "i2c3", + "i2c4", + "nand", + "sd", + "uart0", + "uart1", + "uart2", + "uart3", + "usb0", + "usb1", + "usb2", + "usb3", +}; + +static struct uniphier_pinctrl_socdata uniphier_ld20_pinctrl_socdata = { + .groups = uniphier_ld20_groups, + .groups_count = ARRAY_SIZE(uniphier_ld20_groups), + .functions = uniphier_ld20_functions, + .functions_count = ARRAY_SIZE(uniphier_ld20_functions), + .quirks = UNIPHIER_PINCTRL_PERPIN_IECTRL, +}; + +static int uniphier_ld20_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &uniphier_ld20_pinctrl_socdata); +} + +static const struct udevice_id uniphier_ld20_pinctrl_match[] = { + { .compatible = "socionext,ph1-ld20-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(uniphier_ld20_pinctrl) = { + .name = "uniphier-ld20-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(uniphier_ld20_pinctrl_match), + .probe = uniphier_ld20_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +};
The pinmux of PH1-LD11 is almost a subset of that of PH1-LD20 (as far as used in boot-loader), so this commit makes the driver shared between the two SoCs.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/Kconfig | 4 ++-- drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 9 +++++---- 2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 626df8e..1856ff0 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -40,8 +40,8 @@ config PINCTRL_UNIPHIER_LD6B select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_LD20 - bool "UniPhier PH1-LD20 SoC pinctrl driver" - depends on ARCH_UNIPHIER_LD20 + bool "UniPhier PH1-LD11/PH1-LD20 SoC pinctrl driver" + depends on ARCH_UNIPHIER_LD11 || ARCH_UNIPHIER_LD20 default y select PINCTRL_UNIPHIER
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c index 9209109..febc73c 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c @@ -55,7 +55,7 @@ static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { UNIPHIER_PINCTRL_GROUP(i2c4), UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), - UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(sd), /* SD does not exist for LD11 */ UNIPHIER_PINCTRL_GROUP(uart0), UNIPHIER_PINCTRL_GROUP(uart1), UNIPHIER_PINCTRL_GROUP(uart2), @@ -63,7 +63,7 @@ static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { UNIPHIER_PINCTRL_GROUP(usb0), UNIPHIER_PINCTRL_GROUP(usb1), UNIPHIER_PINCTRL_GROUP(usb2), - UNIPHIER_PINCTRL_GROUP(usb3), + UNIPHIER_PINCTRL_GROUP(usb3), /* USB3 does not exist for LD11 */ };
static const char * const uniphier_ld20_functions[] = { @@ -73,7 +73,7 @@ static const char * const uniphier_ld20_functions[] = { "i2c3", "i2c4", "nand", - "sd", + "sd", /* SD does not exist for LD11 */ "uart0", "uart1", "uart2", @@ -81,7 +81,7 @@ static const char * const uniphier_ld20_functions[] = { "usb0", "usb1", "usb2", - "usb3", + "usb3", /* USB3 does not exist for LD11 */ };
static struct uniphier_pinctrl_socdata uniphier_ld20_pinctrl_socdata = { @@ -98,6 +98,7 @@ static int uniphier_ld20_pinctrl_probe(struct udevice *dev) }
static const struct udevice_id uniphier_ld20_pinctrl_match[] = { + { .compatible = "socionext,ph1-ld11-pinctrl" }, { .compatible = "socionext,ph1-ld20-pinctrl" }, { /* sentinel */ } };
2016-03-24 22:32 GMT+09:00 Masahiro Yamada yamada.masahiro@socionext.com:
Masahiro Yamada (10): serial: uniphier: use devm_get_addr() to get base address clk: uniphier: use devm_get_addr() to get base address i2c: uniphier: use devm_get_addr() to get base address gpio: uniphier: use devm_get_addr() to get base address mmc: uniphier: use devm_get_addr() to get base address pinctrl: uniphier: use devm_get_addr() to get base address pinctrl: uniphier: introduce quirks flags pinctrl: uniphier: support per-pin input enable quirk for new SoCs pinctrl: uniphier: support UniPhier PH1-LD20 pinctrl driver pinctrl: uniphier: support UniPhier PH1-LD11 pinctrl driver
Applied to u-boot-uniphier/master.
participants (1)
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Masahiro Yamada