[U-Boot] [PATCH v2] armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
MC and debug server are not board-specific. Instead of reserving memory in each board file, a weak function is introduced in board_f.c to replace macro CONFIG_SYS_MEM_TOP_HIDE for more flexibility. Legacy use of this macro is still supported. Move the reservation calculation to SoC file. Reduce debug server memory by 2MB to make room for secure memory.
In the system with MC and debug server, the top of u-boot memory is not the end of memory. PRAM is not used for this reservation.
Signed-off-by: York Sun yorksun@freescale.com
---
Changes in v2: Revise commit message.
README | 6 +++--- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 18 ++++++++++++++++++ board/freescale/ls2085a/ls2085a.c | 17 ----------------- board/freescale/ls2085aqds/ls2085aqds.c | 17 ----------------- board/freescale/ls2085ardb/ls2085ardb.c | 17 ----------------- common/board_f.c | 14 +++++++++++--- include/configs/ls2085a_common.h | 5 ++--- 7 files changed, 34 insertions(+), 60 deletions(-)
diff --git a/README b/README index 61cbc82..390ee10 100644 --- a/README +++ b/README @@ -3889,7 +3889,7 @@ Configuration Settings: the RAM base is not zero, or RAM is divided into banks, this variable needs to be recalcuated to get the address.
-- CONFIG_SYS_MEM_TOP_HIDE (PPC only): +- CONFIG_SYS_MEM_TOP_HIDE: If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of RAM and won't get "touched" at all by U-Boot. By @@ -5068,8 +5068,8 @@ This firmware often needs to be loaded during U-Boot booting. - CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE Define minimum DDR size required for debug server image
-- CONFIG_SYS_MEM_TOP_HIDE_MIN - Define minimum DDR size to be hided from top of the DDR memory +- CONFIG_SYS_MC_RESERV_MEM_ALIGN + Define alignment of reserved memory MC requires
Reproducible builds ------------------- diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 501feb3..01e8f52 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -628,3 +628,21 @@ void reset_cpu(ulong addr) val |= 0x02; scfg_out32(rstcr, val); } + +unsigned long board_reserve_ram_top(unsigned long ram_size) +{ + unsigned long ram_top = ram_size; + +/* Carve the Debug Server private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_DEBUG_SERVER + ram_top -= debug_server_get_dram_block_size(); +#endif + +/* Carve the MC private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_MC_ENET + ram_top -= mc_get_dram_block_size(); + ram_top &= ~(CONFIG_SYS_MC_RESERV_MEM_ALIGN - 1); +#endif + + return ram_size - ram_top; +} diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c index 27481e2..6f4c3d4 100644 --- a/board/freescale/ls2085a/ls2085a.c +++ b/board/freescale/ls2085a/ls2085a.c @@ -66,23 +66,6 @@ int arch_misc_init(void) } #endif
-unsigned long get_dram_size_to_hide(void) -{ - unsigned long dram_to_hide = 0; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide += debug_server_get_dram_block_size(); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide += mc_get_dram_block_size(); -#endif - - return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN); -} - int board_eth_init(bd_t *bis) { int error = 0; diff --git a/board/freescale/ls2085aqds/ls2085aqds.c b/board/freescale/ls2085aqds/ls2085aqds.c index b02d6e8..8898cc3 100644 --- a/board/freescale/ls2085aqds/ls2085aqds.c +++ b/board/freescale/ls2085aqds/ls2085aqds.c @@ -251,23 +251,6 @@ int arch_misc_init(void) } #endif
-unsigned long get_dram_size_to_hide(void) -{ - unsigned long dram_to_hide = 0; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide += debug_server_get_dram_block_size(); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide += mc_get_dram_block_size(); -#endif - - return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN); -} - #ifdef CONFIG_FSL_MC_ENET void fdt_fixup_board_enet(void *fdt) { diff --git a/board/freescale/ls2085ardb/ls2085ardb.c b/board/freescale/ls2085ardb/ls2085ardb.c index 18953b8..efddf74 100644 --- a/board/freescale/ls2085ardb/ls2085ardb.c +++ b/board/freescale/ls2085ardb/ls2085ardb.c @@ -217,23 +217,6 @@ int arch_misc_init(void) } #endif
-unsigned long get_dram_size_to_hide(void) -{ - unsigned long dram_to_hide = 0; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide += debug_server_get_dram_block_size(); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide += mc_get_dram_block_size(); -#endif - - return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN); -} - #ifdef CONFIG_FSL_MC_ENET void fdt_fixup_board_enet(void *fdt) { diff --git a/common/board_f.c b/common/board_f.c index 8061105..369e6da 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -316,6 +316,15 @@ __weak ulong board_get_usable_ram_top(ulong total_size) return gd->ram_top; }
+__weak ulong board_reserve_ram_top(ulong ram_size) +{ +#ifdef CONFIG_SYS_MEM_TOP_HIDE + return CONFIG_SYS_MEM_TOP_HIDE; +#else + return 0; +#endif +} + static int setup_dest_addr(void) { debug("Monitor len: %08lX\n", gd->mon_len); @@ -332,7 +341,6 @@ static int setup_dest_addr(void) */ gd->secure_ram = gd->ram_size; #endif -#if defined(CONFIG_SYS_MEM_TOP_HIDE) /* * Subtract specified amount of memory to hide so that it won't * get "touched" at all by U-Boot. By fixing up gd->ram_size @@ -343,8 +351,8 @@ static int setup_dest_addr(void) * memory size from the SDRAM controller setup will have to * get fixed. */ - gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; -#endif + gd->ram_size -= board_reserve_ram_top(gd->ram_size); + #ifdef CONFIG_SYS_SDRAM_BASE gd->ram_top = CONFIG_SYS_SDRAM_BASE; #endif diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 0011e72..55d6a53 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -193,10 +193,9 @@ unsigned long long get_qixis_addr(void); * 512MB aligned, so the min size to hide is 512MB. */ #if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER) -#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (254UL * 1024 * 1024) #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) -#define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024) -#define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide() +#define CONFIG_SYS_MC_RESERV_MEM_ALIGN (512UL * 1024 * 1024) #endif
/* PCIe */
On Wed, 2015-11-18 at 10:05 -0800, York Sun wrote:
MC and debug server are not board-specific. Instead of reserving memory in each board file, a weak function is introduced in board_f.c to replace macro CONFIG_SYS_MEM_TOP_HIDE for more flexibility. Legacy use of this macro is still supported. Move the reservation calculation to SoC file. Reduce debug server memory by 2MB to make room for secure memory.
In the system with MC and debug server, the top of u-boot memory is not the end of memory. PRAM is not used for this reservation.
Signed-off-by: York Sun yorksun@freescale.com
Changes in v2: Revise commit message.
README | 6 +++--- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 18 ++++++++++++++++++ board/freescale/ls2085a/ls2085a.c | 17 ----------------- board/freescale/ls2085aqds/ls2085aqds.c | 17 ----------------- board/freescale/ls2085ardb/ls2085ardb.c | 17 ----------------- common/board_f.c | 14 +++++++++++--- include/configs/ls2085a_common.h | 5 ++--- 7 files changed, 34 insertions(+), 60 deletions(-)
diff --git a/README b/README index 61cbc82..390ee10 100644 --- a/README +++ b/README @@ -3889,7 +3889,7 @@ Configuration Settings: the RAM base is not zero, or RAM is divided into banks, this variable needs to be recalcuated to get the address.
-- CONFIG_SYS_MEM_TOP_HIDE (PPC only): +- CONFIG_SYS_MEM_TOP_HIDE: If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of RAM and won't get "touched" at all by U-Boot. By @@ -5068,8 +5068,8 @@ This firmware often needs to be loaded during U-Boot booting.
- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE Define minimum DDR size required for debug server image
-- CONFIG_SYS_MEM_TOP_HIDE_MIN
- Define minimum DDR size to be hided from top of the DDR memory
+- CONFIG_SYS_MC_RESERV_MEM_ALIGN
- Define alignment of reserved memory MC requires
Can you make this RESERVE, or RSV or RES? RESERV is hard to look at, like creat(). :-P
Reproducible builds
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 501feb3..01e8f52 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -628,3 +628,21 @@ void reset_cpu(ulong addr) val |= 0x02; scfg_out32(rstcr, val); }
+unsigned long board_reserve_ram_top(unsigned long ram_size) +{
- unsigned long ram_top = ram_size;
+/* Carve the Debug Server private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_DEBUG_SERVER
- ram_top -= debug_server_get_dram_block_size();
+#endif
+/* Carve the MC private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_MC_ENET
- ram_top -= mc_get_dram_block_size();
- ram_top &= ~(CONFIG_SYS_MC_RESERV_MEM_ALIGN - 1);
+#endif
- return ram_size - ram_top;
+}
So Layerscape doesn't respect CONFIG_SYS_MEM_TOP_HIDE at all? If you don't want to add that in (and thus worry about where it should go relative to the other reasons), there should probably at least be an #error if the symbol is defined and non-zero.
I think it'd be a bit more straightforward for this to return the new ram_top rather than the size to be subtracted.
Otherwise this looks good.
-Scott
On 11/18/2015 02:15 PM, Scott Wood wrote:
On Wed, 2015-11-18 at 10:05 -0800, York Sun wrote:
MC and debug server are not board-specific. Instead of reserving memory in each board file, a weak function is introduced in board_f.c to replace macro CONFIG_SYS_MEM_TOP_HIDE for more flexibility. Legacy use of this macro is still supported. Move the reservation calculation to SoC file. Reduce debug server memory by 2MB to make room for secure memory.
In the system with MC and debug server, the top of u-boot memory is not the end of memory. PRAM is not used for this reservation.
Signed-off-by: York Sun yorksun@freescale.com
Changes in v2: Revise commit message.
README | 6 +++--- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 18 ++++++++++++++++++ board/freescale/ls2085a/ls2085a.c | 17 ----------------- board/freescale/ls2085aqds/ls2085aqds.c | 17 ----------------- board/freescale/ls2085ardb/ls2085ardb.c | 17 ----------------- common/board_f.c | 14 +++++++++++--- include/configs/ls2085a_common.h | 5 ++--- 7 files changed, 34 insertions(+), 60 deletions(-)
diff --git a/README b/README index 61cbc82..390ee10 100644 --- a/README +++ b/README @@ -3889,7 +3889,7 @@ Configuration Settings: the RAM base is not zero, or RAM is divided into banks, this variable needs to be recalcuated to get the address.
-- CONFIG_SYS_MEM_TOP_HIDE (PPC only): +- CONFIG_SYS_MEM_TOP_HIDE: If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of RAM and won't get "touched" at all by U-Boot. By @@ -5068,8 +5068,8 @@ This firmware often needs to be loaded during U-Boot booting.
- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE Define minimum DDR size required for debug server image
-- CONFIG_SYS_MEM_TOP_HIDE_MIN
- Define minimum DDR size to be hided from top of the DDR memory
+- CONFIG_SYS_MC_RESERV_MEM_ALIGN
- Define alignment of reserved memory MC requires
Can you make this RESERVE, or RSV or RES? RESERV is hard to look at, like creat(). :-P
Sure.
Reproducible builds
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 501feb3..01e8f52 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -628,3 +628,21 @@ void reset_cpu(ulong addr) val |= 0x02; scfg_out32(rstcr, val); }
+unsigned long board_reserve_ram_top(unsigned long ram_size) +{
- unsigned long ram_top = ram_size;
+/* Carve the Debug Server private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_DEBUG_SERVER
- ram_top -= debug_server_get_dram_block_size();
+#endif
+/* Carve the MC private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_MC_ENET
- ram_top -= mc_get_dram_block_size();
- ram_top &= ~(CONFIG_SYS_MC_RESERV_MEM_ALIGN - 1);
+#endif
- return ram_size - ram_top;
+}
So Layerscape doesn't respect CONFIG_SYS_MEM_TOP_HIDE at all? If you don't want to add that in (and thus worry about where it should go relative to the other reasons), there should probably at least be an #error if the symbol is defined and non-zero.
Actually Layerscape was using CONFIG_SYS_MEM_TOP_HIDE and it defines CONFIG_SYS_MEM_TOP_HIDE as a function. When I tried to move the function out of board files, you suggested to "do it more generically and transparently".
After this patch, CONFIG_SYS_MEM_TOP_HIDE shouldn't be used with this function. I can add a check for CONFIG_SYS_MEM_TOP_HIDE in this function to throw out an error if defined.
I think it'd be a bit more straightforward for this to return the new ram_top rather than the size to be subtracted.
That will be inaccurate. For layerscape SoCs, the gd->ram_size is known at this point, but the address is not known until later in board file dram bank is filled int. So this function can only return how much memory is reserved.
Otherwise this looks good.
Thanks.
York
On Wed, 2015-11-18 at 14:48 -0800, York Sun wrote:
On 11/18/2015 02:15 PM, Scott Wood wrote:
On Wed, 2015-11-18 at 10:05 -0800, York Sun wrote:
MC and debug server are not board-specific. Instead of reserving memory in each board file, a weak function is introduced in board_f.c to replace macro CONFIG_SYS_MEM_TOP_HIDE for more flexibility. Legacy use of this macro is still supported. Move the reservation calculation to SoC file. Reduce debug server memory by 2MB to make room for secure memory.
In the system with MC and debug server, the top of u-boot memory is not the end of memory. PRAM is not used for this reservation.
Signed-off-by: York Sun yorksun@freescale.com
Changes in v2: Revise commit message.
README | 6 +++--- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 18 ++++++++++++++++++ board/freescale/ls2085a/ls2085a.c | 17 ----------------- board/freescale/ls2085aqds/ls2085aqds.c | 17 ----------------- board/freescale/ls2085ardb/ls2085ardb.c | 17 ----------------- common/board_f.c | 14 +++++++++++--- include/configs/ls2085a_common.h | 5 ++--- 7 files changed, 34 insertions(+), 60 deletions(-)
diff --git a/README b/README index 61cbc82..390ee10 100644 --- a/README +++ b/README @@ -3889,7 +3889,7 @@ Configuration Settings: the RAM base is not zero, or RAM is divided into banks, this variable needs to be recalcuated to get the address.
-- CONFIG_SYS_MEM_TOP_HIDE (PPC only): +- CONFIG_SYS_MEM_TOP_HIDE: If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of RAM and won't get "touched" at all by U-Boot. By @@ -5068,8 +5068,8 @@ This firmware often needs to be loaded during U -Boot booting.
- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE Define minimum DDR size required for debug server image
-- CONFIG_SYS_MEM_TOP_HIDE_MIN
- Define minimum DDR size to be hided from top of the DDR memory
+- CONFIG_SYS_MC_RESERV_MEM_ALIGN
- Define alignment of reserved memory MC requires
Can you make this RESERVE, or RSV or RES? RESERV is hard to look at, like creat(). :-P
Sure.
Reproducible builds
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 501feb3..01e8f52 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -628,3 +628,21 @@ void reset_cpu(ulong addr) val |= 0x02; scfg_out32(rstcr, val); }
+unsigned long board_reserve_ram_top(unsigned long ram_size) +{
- unsigned long ram_top = ram_size;
+/* Carve the Debug Server private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_DEBUG_SERVER
- ram_top -= debug_server_get_dram_block_size();
+#endif
+/* Carve the MC private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_MC_ENET
- ram_top -= mc_get_dram_block_size();
- ram_top &= ~(CONFIG_SYS_MC_RESERV_MEM_ALIGN - 1);
+#endif
- return ram_size - ram_top;
+}
So Layerscape doesn't respect CONFIG_SYS_MEM_TOP_HIDE at all? If you don't want to add that in (and thus worry about where it should go relative to the other reasons), there should probably at least be an #error if the symbol is defined and non-zero.
Actually Layerscape was using CONFIG_SYS_MEM_TOP_HIDE and it defines CONFIG_SYS_MEM_TOP_HIDE as a function. When I tried to move the function out of board files, you suggested to "do it more generically and transparently".
Right, but it's still documented as a generic U-Boot feature so we shouldn't silently ignore it.
After this patch, CONFIG_SYS_MEM_TOP_HIDE shouldn't be used with this function. I can add a check for CONFIG_SYS_MEM_TOP_HIDE in this function to throw out an error if defined.
Thanks.
I think it'd be a bit more straightforward for this to return the new ram_top rather than the size to be subtracted.
That will be inaccurate. For layerscape SoCs, the gd->ram_size is known at this point, but the address is not known until later in board file dram bank is filled int. So this function can only return how much memory is reserved.
Sorry, I should have said offset from the start of RAM instead of address. So the caller does "gd->ram_size = board_reserve_ram_top(gd->ram_size);".
-Scott
On 11/18/2015 02:56 PM, Scott Wood wrote:
<snip>
I think it'd be a bit more straightforward for this to return the new ram_top rather than the size to be subtracted.
That will be inaccurate. For layerscape SoCs, the gd->ram_size is known at this point, but the address is not known until later in board file dram bank is filled int. So this function can only return how much memory is reserved.
Sorry, I should have said offset from the start of RAM instead of address. So the caller does "gd->ram_size = board_reserve_ram_top(gd->ram_size);".
Sure. That can be arranged.
York
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York Sun