Copied wholeheartedly from board/Marvell/guruplug and modified to add support for SPI NOR flash.

CONFIG_MACH_DREAMPLUG defined in include/configs/dreamplug.h until Linus's kernel.org tree adds it to mach-types.h. Once it trickles down, the definition can be removed from dreamplug.h.

Signed-off-by: Jason Cooper u-boot@lakedaemon.net --- Changes from v1 to v2:

- resorted series to move 'make all' support last.

Changes from v2 to v3:

- Use MACH_TYPE_GURUPLUG for now until dreamplug support is in Linux. - Update MAINTAINERS. - Collapse into one patch.

Changes from v3 to v4:

- update copyright info as recommended by Prafulla Wadaskar. - maintain proper order in boards.cfg, MAINTAINERS, etc. - label MPP's - change back to MACH_TYPE_DREAMPLUG. This patch is just RFC until the Dreamplug is supported in Linux (and MACH_TYPE_ added).

Changes from v4 to v5:

- Complete rewrite due to receiving u-boot source indirectly from Global Scale Tech. - Added driver for integrated RTC. (thx GST!) - Added support for displaying CPU frequencies at boot. (thx GST!) - Adjust USB timeout to handle dreamplug EHCI chipset. - Cleaned up MPP registers based on Global Scale code. (thx GST!) - broke out MACH_TYPE_DREAMPLUG changes since it's going to be a while until the Linux arm tree gets sorted and accepts new boards again. Since all Dreamplugs currently on the market set r1 to MACH_TYPE_GURUPLUG, this allows the board to be added to u-boot while waiting for Linux mainline. Once it's in Linux mainline, then the last patch can be integrated to use MACH_TYPE_DREAMPLUG.

Changes from v5 to v6:

- Define MACH_TYPE_DREAMPLUG in includes/configs/dreamplug.h until Linus's kernel.org tree includes assigned machine id. This is on Wolfgang's recommendation [1]. - Removed dcache disabling as it is no longer enabled by default. - USB timeout fix was merged. - Marvell Integrated RTC was merged. - Dropped CPU frequency printout as I'm not familiar enough with all flavors of kirkwood SoCs to do it correctly. - Labelled MPP*_GPIO pins that are broken out as gpio pins for the user. - Fixed function name mv_phy_88e1121_init() -> mv_phy_88e1116_init().

Changes from v6 to v7:

- Use CONFIG_MACH_TYPE in dreamplug.c and define it to MACH_TYPE_DREAMPLUG in include/configs/dreamplug.h

[1] http://www.mail-archive.com/u-boot@lists.denx.de/msg60921.html

MAINTAINERS | 4 + board/Marvell/dreamplug/Makefile | 54 ++++++++ board/Marvell/dreamplug/dreamplug.c | 154 +++++++++++++++++++++++ board/Marvell/dreamplug/dreamplug.h | 42 +++++++ board/Marvell/dreamplug/kwbimage.cfg | 163 +++++++++++++++++++++++++ boards.cfg | 1 + include/configs/dreamplug.h | 159 ++++++++++++++++++++++++ 7 files changed, 577 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s create mode 100644 board/Marvell/dreamplug/Makefile create mode 100644 board/Marvell/dreamplug/dreamplug.c create mode 100644 board/Marvell/dreamplug/dreamplug.h create mode 100644 board/Marvell/dreamplug/kwbimage.cfg create mode 100644 include/configs/dreamplug.h

diff --git a/MAINTAINERS b/MAINTAINERS index 2f60a60..88d5637 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -70,6 +70,10 @@ Conn Clark clark@esteem.com

ESTEEM192E MPC8xx

+Jason Cooper u-boot@lakedaemon.net + + dreamplug ARM926EJS (Kirkwood SoC) + Joe D'Abbraccio ljd015@freescale.com

MPC837xERDB MPC837x diff --git a/arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s b/arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s new file mode 100644 index 0000000..e69de29 diff --git a/board/Marvell/dreamplug/Makefile b/board/Marvell/dreamplug/Makefile new file mode 100644 index 0000000..9ee5406 --- /dev/null +++ b/board/Marvell/dreamplug/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2011 +# Jason Cooper u-boot@lakedaemon.net +# +# Based on work by: +# Marvell Semiconductor <www.marvell.com> +# Written-by: Siddarth Gore gores@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := dreamplug.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c new file mode 100644 index 0000000..05098fa --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.c @@ -0,0 +1,154 @@ +/* + * (C) Copyright 2011 + * Jason Cooper u-boot@lakedaemon.net + * + * Based on work by: + * Marvell Semiconductor <www.marvell.com> + * Written-by: Siddarth Gore gores@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include "dreamplug.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(DREAMPLUG_OE_VAL_LOW, + DREAMPLUG_OE_VAL_HIGH, + DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_SPI_SCn, /* SPI Flash */ + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, /* Serial */ + MPP11_UART0_RXD, + MPP12_SD_CLK, /* SDIO Slot */ + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, /* Gigabit Ethernet */ + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GE1_8, + MPP29_GE1_9, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GE1_14, + MPP35_GE1_15, + MPP36_GPIO, /* 7 external GPIO pins (36 - 45) */ + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_TDM_SPI_SCK, + MPP41_TDM_SPI_MISO, + MPP42_TDM_SPI_MOSI, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, /* Wifi AP LED */ + MPP47_GPIO, + MPP48_GPIO, /* Wifi LED */ + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + return 0; +} + +int board_init(void) +{ + /* arch number of board */ + gd->bd->bi_arch_number = CONFIG_MACH_TYPE; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void mv_phy_88e1116_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __func__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, &reg); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1116 Initialized on %s\n", name); +} + +void reset_phy(void) +{ + /* configure and initialize both PHY's */ + mv_phy_88e1116_init("egiga0"); + mv_phy_88e1116_init("egiga1"); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/dreamplug/dreamplug.h b/board/Marvell/dreamplug/dreamplug.h new file mode 100644 index 0000000..ad5ffcf --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.h @@ -0,0 +1,42 @@ +/* + * (C) Copyright 2011 + * Jason Cooper u-boot@lakedaemon.net + * + * Based on work by: + * Marvell Semiconductor <www.marvell.com> + * Written-by: Siddarth Gore gores@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __DREAMPLUG_H +#define __DREAMPLUG_H + +#define DREAMPLUG_OE_LOW (~(0)) +#define DREAMPLUG_OE_HIGH (~(0)) +#define DREAMPLUG_OE_VAL_LOW 0 +#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */ + +/* PHY related */ +#define MV88E1116_MAC_CTRL2_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __DREAMPLUG_H */ diff --git a/board/Marvell/dreamplug/kwbimage.cfg b/board/Marvell/dreamplug/kwbimage.cfg new file mode 100644 index 0000000..ca9cd74 --- /dev/null +++ b/board/Marvell/dreamplug/kwbimage.cfg @@ -0,0 +1,163 @@ +# +# (C) Copyright 2011 +# Jason Cooper u-boot@lakedaemon.net +# +# Based on work by: +# Marvell Semiconductor <www.marvell.com> +# Written-by: Siddarth Gore gores@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0/1 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b9b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x37543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x000000cc # DDR Address Control +# bit1-0: 01, Cs0width=x8 +# bit3-2: 10, Cs0size=1Gb +# bit5-4: 01, Cs1width=x8 +# bit7-6: 10, Cs1size=1Gb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000C52 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000040 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000E803 # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/boards.cfg b/boards.cfg index 8a5bfc1..cceda57 100644 --- a/boards.cfg +++ b/boards.cfg @@ -135,6 +135,7 @@ portl2 arm arm926ejs km_arm keymile inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:INETSPACE_V2 netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_V2 netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_MAX_V2 +dreamplug arm arm926ejs - Marvell kirkwood guruplug arm arm926ejs - Marvell kirkwood mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood openrd_base arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_BASE diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h new file mode 100644 index 0000000..a7168bd --- /dev/null +++ b/include/configs/dreamplug.h @@ -0,0 +1,159 @@ +/* + * (C) Copyright 2011 + * Jason Cooper u-boot@lakedaemon.net + * + * Based on work by: + * Marvell Semiconductor <www.marvell.com> + * Written-by: Siddarth Gore gores@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_DREAMPLUG_H +#define _CONFIG_DREAMPLUG_H + +/* + * FIXME: This belongs in mach-types.h. However, we only pull mach-types + * from Linus' kernel.org tree. This hasn't been updated primarily due to + * the recent arch/arm reshuffling. So, in the meantime, we'll place it + * here. + */ +#define MACH_TYPE_DREAMPLUG 3550 + +#ifdef CONFIG_MACH_DREAMPLUG +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DREAMPLUG +# endif +# define machine_is_dreamplug() (machine_arch_type == MACH_TYPE_DREAMPLUG) +#else +# define machine_is_dreamplug() (0) +#endif + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nMarvell-DreamPlug" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_TYPE MACH_TYPE_DREAMPLUG +#define CONFIG_MACH_DREAMPLUG /* Machine type */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_SF +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB +#define CONFIG_CMD_IDE +#define CONFIG_CMD_DATE + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * Environment variables configurations + */ +#ifdef CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64k */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif + +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH 1 +#define CONFIG_HARD_SPI 1 +#define CONFIG_KIRKWOOD_SPI 1 +#define CONFIG_SPI_FLASH_MACRONIX 1 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 /* 50 MHz */ +#endif + +/* + * max 4k env size is enough, but in case of nand + * it has to be rounded to sector size + */ +#define CONFIG_ENV_SIZE 0x1000 /* 4k */ +#define CONFIG_ENV_ADDR 0x100000 +#define CONFIG_ENV_OFFSET 0x100000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \ + "${x_bootcmd_ethernet}; setenv ethact egiga1; " \ + "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\ + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ + "bootm 0x6400000;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "x_bootcmd_ethernet=ping 192.168.2.1\0" \ + "x_bootcmd_usb=usb start\0" \ + "x_bootcmd_kernel=fatload usb 0 0x6400000 uImage\0" \ + "x_bootargs=console=ttyS0,115200\0" \ + "x_bootargs_root=root=/dev/sda2 rootdelay=10\0" + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ +#define CONFIG_PHY_BASE_ADR 0 +#endif /* CONFIG_CMD_NET */ + +/* + * SATA Driver configuration + */ +#ifdef CONFIG_MVSATA_IDE +#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#endif /*CONFIG_MVSATA_IDE*/ + +/* + * RTC driver configuration + */ +#ifdef CONFIG_CMD_DATE +#define CONFIG_RTC_MV +#endif /* CONFIG_CMD_DATE */ + +#define CONFIG_SYS_ALT_MEMTEST + +/* + * display enhanced info about the cpu at boot. + */ +#define CONFIG_DISPLAY_CPUINFO + +#endif /* _CONFIG_DREAMPLUG_H */

Copied wholeheartedly from board/Marvell/guruplug and modified to add support for SPI NOR flash.

CONFIG_MACH_DREAMPLUG defined in include/configs/dreamplug.h until Linus's kernel.org tree adds it to mach-types.h. Once it trickles down, the definition can be removed from include/configs/dreamplug.h.

Signed-off-by: Jason Cooper u-boot@lakedaemon.net --- Changes from v1 to v2:

- resorted series to move 'make all' support last.

Changes from v2 to v3:

- Use MACH_TYPE_GURUPLUG for now until dreamplug support is in Linux. - Update MAINTAINERS. - Collapse into one patch.

Changes from v3 to v4:

- update copyright info as recommended by Prafulla Wadaskar. - maintain proper order in boards.cfg, MAINTAINERS, etc. - label MPP's - change back to MACH_TYPE_DREAMPLUG. This patch is just RFC until the Dreamplug is supported in Linux (and MACH_TYPE_ added).

Changes from v4 to v5:

- Complete rewrite due to receiving u-boot source indirectly from Global Scale Tech. - Added driver for integrated RTC. (thx GST!) - Added support for displaying CPU frequencies at boot. (thx GST!) - Adjust USB timeout to handle dreamplug EHCI chipset. - Cleaned up MPP registers based on Global Scale code. (thx GST!) - broke out MACH_TYPE_DREAMPLUG changes since it's going to be a while until the Linux arm tree gets sorted and accepts new boards again. Since all Dreamplugs currently on the market set r1 to MACH_TYPE_GURUPLUG, this allows the board to be added to u-boot while waiting for Linux mainline. Once it's in Linux mainline, then the last patch can be integrated to use MACH_TYPE_DREAMPLUG.

Changes from v5 to v6:

- Define MACH_TYPE_DREAMPLUG in includes/configs/dreamplug.h until Linus's kernel.org tree includes assigned machine id. This is on Wolfgang's recommendation [1]. - Removed dcache disabling as it is no longer enabled by default. - USB timeout fix was merged. - Marvell Integrated RTC was merged. - Dropped CPU frequency printout as I'm not familiar enough with all flavors of kirkwood SoCs to do it correctly. - Labelled MPP*_GPIO pins that are broken out as gpio pins for the user. - Fixed function name mv_phy_88e1121_init() -> mv_phy_88e1116_init().

Changes from v6 to v7:

- Use CONFIG_MACH_TYPE in dreamplug.c and define it to MACH_TYPE_DREAMPLUG in include/configs/dreamplug.h

Changes from v7 to v8:

- #error MACH_TYPE_DREAMPLUG once it is defined in mach-types.h. On Albert Aribaud's recommendation.

[1] http://www.mail-archive.com/u-boot@lists.denx.de/msg60921.html

MAINTAINERS | 4 + board/Marvell/dreamplug/Makefile | 54 ++++++++ board/Marvell/dreamplug/dreamplug.c | 151 +++++++++++++++++++++++ board/Marvell/dreamplug/dreamplug.h | 42 +++++++ board/Marvell/dreamplug/kwbimage.cfg | 163 +++++++++++++++++++++++++ boards.cfg | 1 + include/configs/dreamplug.h | 151 +++++++++++++++++++++++ 7 files changed, 566 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s create mode 100644 board/Marvell/dreamplug/Makefile create mode 100644 board/Marvell/dreamplug/dreamplug.c create mode 100644 board/Marvell/dreamplug/dreamplug.h create mode 100644 board/Marvell/dreamplug/kwbimage.cfg create mode 100644 include/configs/dreamplug.h

diff --git a/MAINTAINERS b/MAINTAINERS index 2f60a60..88d5637 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -70,6 +70,10 @@ Conn Clark clark@esteem.com

ESTEEM192E MPC8xx

+Jason Cooper u-boot@lakedaemon.net + + dreamplug ARM926EJS (Kirkwood SoC) + Joe D'Abbraccio ljd015@freescale.com

MPC837xERDB MPC837x diff --git a/arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s b/arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s new file mode 100644 index 0000000..e69de29 diff --git a/board/Marvell/dreamplug/Makefile b/board/Marvell/dreamplug/Makefile new file mode 100644 index 0000000..9ee5406 --- /dev/null +++ b/board/Marvell/dreamplug/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2011 +# Jason Cooper u-boot@lakedaemon.net +# +# Based on work by: +# Marvell Semiconductor <www.marvell.com> +# Written-by: Siddarth Gore gores@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := dreamplug.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c new file mode 100644 index 0000000..13b4013 --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.c @@ -0,0 +1,151 @@ +/* + * (C) Copyright 2011 + * Jason Cooper u-boot@lakedaemon.net + * + * Based on work by: + * Marvell Semiconductor <www.marvell.com> + * Written-by: Siddarth Gore gores@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include "dreamplug.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(DREAMPLUG_OE_VAL_LOW, + DREAMPLUG_OE_VAL_HIGH, + DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_SPI_SCn, /* SPI Flash */ + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, /* Serial */ + MPP11_UART0_RXD, + MPP12_SD_CLK, /* SDIO Slot */ + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, /* Gigabit Ethernet */ + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GE1_8, + MPP29_GE1_9, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GE1_14, + MPP35_GE1_15, + MPP36_GPIO, /* 7 external GPIO pins (36 - 45) */ + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_TDM_SPI_SCK, + MPP41_TDM_SPI_MISO, + MPP42_TDM_SPI_MOSI, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, /* Bluetooth LED */ + MPP48_GPIO, /* Wifi LED */ + MPP49_GPIO, /* Wifi AP LED */ + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void mv_phy_88e1116_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __func__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, &reg); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1116 Initialized on %s\n", name); +} + +void reset_phy(void) +{ + /* configure and initialize both PHY's */ + mv_phy_88e1116_init("egiga0"); + mv_phy_88e1116_init("egiga1"); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/dreamplug/dreamplug.h b/board/Marvell/dreamplug/dreamplug.h new file mode 100644 index 0000000..ad5ffcf --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.h @@ -0,0 +1,42 @@ +/* + * (C) Copyright 2011 + * Jason Cooper u-boot@lakedaemon.net + * + * Based on work by: + * Marvell Semiconductor <www.marvell.com> + * Written-by: Siddarth Gore gores@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __DREAMPLUG_H +#define __DREAMPLUG_H + +#define DREAMPLUG_OE_LOW (~(0)) +#define DREAMPLUG_OE_HIGH (~(0)) +#define DREAMPLUG_OE_VAL_LOW 0 +#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */ + +/* PHY related */ +#define MV88E1116_MAC_CTRL2_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __DREAMPLUG_H */ diff --git a/board/Marvell/dreamplug/kwbimage.cfg b/board/Marvell/dreamplug/kwbimage.cfg new file mode 100644 index 0000000..ca9cd74 --- /dev/null +++ b/board/Marvell/dreamplug/kwbimage.cfg @@ -0,0 +1,163 @@ +# +# (C) Copyright 2011 +# Jason Cooper u-boot@lakedaemon.net +# +# Based on work by: +# Marvell Semiconductor <www.marvell.com> +# Written-by: Siddarth Gore gores@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0/1 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b9b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x37543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x000000cc # DDR Address Control +# bit1-0: 01, Cs0width=x8 +# bit3-2: 10, Cs0size=1Gb +# bit5-4: 01, Cs1width=x8 +# bit7-6: 10, Cs1size=1Gb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000C52 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000040 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000E803 # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/boards.cfg b/boards.cfg index 8a5bfc1..cceda57 100644 --- a/boards.cfg +++ b/boards.cfg @@ -135,6 +135,7 @@ portl2 arm arm926ejs km_arm keymile inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:INETSPACE_V2 netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_V2 netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_MAX_V2 +dreamplug arm arm926ejs - Marvell kirkwood guruplug arm arm926ejs - Marvell kirkwood mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood openrd_base arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_BASE diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h new file mode 100644 index 0000000..0f2f9a2 --- /dev/null +++ b/include/configs/dreamplug.h @@ -0,0 +1,151 @@ +/* + * (C) Copyright 2011 + * Jason Cooper u-boot@lakedaemon.net + * + * Based on work by: + * Marvell Semiconductor <www.marvell.com> + * Written-by: Siddarth Gore gores@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_DREAMPLUG_H +#define _CONFIG_DREAMPLUG_H + +/* + * FIXME: This belongs in mach-types.h. However, we only pull mach-types + * from Linus' kernel.org tree. This hasn't been updated primarily due to + * the recent arch/arm reshuffling. So, in the meantime, we'll place it + * here. + */ +#include <asm/mach-types.h> +#ifdef MACH_TYPE_DREAMPLUG +#error "MACH_TYPE_DREAMPLUG has been defined properly, please remove this." +#else +#define MACH_TYPE_DREAMPLUG 3550 +#endif + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nMarvell-DreamPlug" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_TYPE MACH_TYPE_DREAMPLUG +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_SF +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB +#define CONFIG_CMD_IDE +#define CONFIG_CMD_DATE + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * Environment variables configurations + */ +#ifdef CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64k */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif + +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH 1 +#define CONFIG_HARD_SPI 1 +#define CONFIG_KIRKWOOD_SPI 1 +#define CONFIG_SPI_FLASH_MACRONIX 1 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 /* 50 MHz */ +#endif + +/* + * max 4k env size is enough, but in case of nand + * it has to be rounded to sector size + */ +#define CONFIG_ENV_SIZE 0x1000 /* 4k */ +#define CONFIG_ENV_ADDR 0x100000 +#define CONFIG_ENV_OFFSET 0x100000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \ + "${x_bootcmd_ethernet}; setenv ethact egiga1; " \ + "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\ + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ + "bootm 0x6400000;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "x_bootcmd_ethernet=ping 192.168.2.1\0" \ + "x_bootcmd_usb=usb start\0" \ + "x_bootcmd_kernel=fatload usb 0 0x6400000 uImage\0" \ + "x_bootargs=console=ttyS0,115200\0" \ + "x_bootargs_root=root=/dev/sda2 rootdelay=10\0" + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ +#define CONFIG_PHY_BASE_ADR 0 +#endif /* CONFIG_CMD_NET */ + +/* + * SATA Driver configuration + */ +#ifdef CONFIG_MVSATA_IDE +#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#endif /*CONFIG_MVSATA_IDE*/ + +/* + * RTC driver configuration + */ +#ifdef CONFIG_CMD_DATE +#define CONFIG_RTC_MV +#endif /* CONFIG_CMD_DATE */ + +#define CONFIG_SYS_ALT_MEMTEST + +/* + * display enhanced info about the cpu at boot. + */ +#define CONFIG_DISPLAY_CPUINFO + +#endif /* _CONFIG_DREAMPLUG_H */

Signed-off-by: Jason Cooper u-boot@lakedaemon.net --- drivers/rtc/Makefile | 1 + drivers/rtc/mvinteg_rtc.c | 151 +++++++++++++++++++++++++++++++++++++++++++++ drivers/rtc/mvinteg_rtc.h | 89 ++++++++++++++++++++++++++ 3 files changed, 241 insertions(+), 0 deletions(-) create mode 100644 drivers/rtc/mvinteg_rtc.c create mode 100644 drivers/rtc/mvinteg_rtc.h

diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index e4be4a4..ed63e9c 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -55,6 +55,7 @@ COBJS-$(CONFIG_MCFRTC) += mcfrtc.o COBJS-$(CONFIG_RTC_MK48T59) += mk48t59.o COBJS-$(CONFIG_RTC_MPC5200) += mpc5xxx.o COBJS-$(CONFIG_RTC_MPC8xx) += mpc8xx.o +COBJS-$(CONFIG_RTC_MVINTEG) += mvinteg_rtc.o COBJS-$(CONFIG_RTC_PCF8563) += pcf8563.o COBJS-$(CONFIG_RTC_PL031) += pl031.o COBJS-$(CONFIG_RTC_PT7C4338) += pt7c4338.o diff --git a/drivers/rtc/mvinteg_rtc.c b/drivers/rtc/mvinteg_rtc.c new file mode 100644 index 0000000..295e4f7 --- /dev/null +++ b/drivers/rtc/mvinteg_rtc.c @@ -0,0 +1,151 @@ +/* + * Copyright (C) 2011 + * Jason Cooper u-boot@lakedaemon.net + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Date & Time support for Marvell Integrated RTC + */ + +#include <common.h> +#include <command.h> +#include <rtc.h> +#include "mvinteg_rtc.h" + +/* This RTC does not support century, so we assume 20 */ +#define CENTURY 20 + +int rtc_get(struct rtc_time *t) +{ + u32 time; + u32 date; + u8 tens; + u8 single; + + /* read the time register */ + time = MV_REG_READ(MVINTEG_RTCTIME_REG); + + /* read the date register */ + date = MV_REG_READ(MVINTEG_RTCDATE_REG); + + /* seconds */ + tens = ((time & MVINTEG_10SEC_MSK) >> MVINTEG_10SEC_SFT); + single = ((time & MVINTEG_SEC_MSK) >> MVINTEG_SEC_SFT); + t->tm_sec = 10 * tens + single; + + /* minutes */ + tens = ((time & MVINTEG_10MIN_MSK) >> MVINTEG_10MIN_SFT); + single = ((time & MVINTEG_MIN_MSK) >> MVINTEG_MIN_SFT); + t->tm_min = 10 * tens + single; + + /* hours */ + tens = ((time & MVINTEG_10HOUR_MSK) >> MVINTEG_10HOUR_SFT); + single = ((time & MVINTEG_HOUR_MSK) >> MVINTEG_HOUR_SFT); + t->tm_hour = 10 * tens + single; + + /* day */ + t->tm_wday = ((time & MVINTEG_DAY_MSK) >> MVINTEG_DAY_SFT); + t->tm_wday--; + + /* date */ + tens = ((date & MVINTEG_10DATE_MSK) >> MVINTEG_10DATE_SFT); + single = ((date & MVINTEG_DATE_MSK) >> MVINTEG_DATE_SFT); + t->tm_mday = 10 * tens + single; + + /* month */ + tens = ((date & MVINTEG_10MON_MSK) >> MVINTEG_10MON_SFT); + single = ((date & MVINTEG_MON_MSK) >> MVINTEG_MON_SFT); + t->tm_mon = 10 * tens + single; + + /* year */ + tens = ((date & MVINTEG_10YEAR_MSK) >> MVINTEG_10YEAR_SFT); + single = ((date & MVINTEG_YEAR_MSK) >> MVINTEG_YEAR_SFT); + t->tm_year = (CENTURY * 100) + (10 * tens) + single; + + /* not supported in this RTC */ + t->tm_yday = 0; + t->tm_isdst = 0; + + return 0; +} + +int rtc_set(struct rtc_time *t) +{ + u32 time = 0; + u32 date = 0; + u32 tens; + u32 single; + + /* seconds */ + tens = t->tm_sec / 10; + single = t->tm_sec % 10; + time |= ((tens << MVINTEG_10SEC_SFT) & MVINTEG_10SEC_MSK) | + ((single << MVINTEG_SEC_SFT) & MVINTEG_SEC_MSK); + + /* minutes */ + tens = t->tm_min / 10; + single = t->tm_min % 10; + time |= ((tens << MVINTEG_10MIN_SFT) & MVINTEG_10MIN_MSK) | + ((single << MVINTEG_MIN_SFT) & MVINTEG_MIN_MSK); + + /* hours (24) */ + tens = t->tm_hour / 10; + single = t->tm_hour % 10; + time |= ((tens << MVINTEG_10HOUR_SFT) & MVINTEG_10HOUR_MSK) | + ((single << MVINTEG_HOUR_SFT) & MVINTEG_HOUR_MSK); + + /* day */ + single = t->tm_wday + 1; + time |= ((single << MVINTEG_DAY_SFT) & MVINTEG_DAY_MSK); + + /* date */ + tens = t->tm_mday / 10; + single = t->tm_mday % 10; + date |= ((tens << MVINTEG_10DATE_SFT) & MVINTEG_10DATE_MSK) | + ((single << MVINTEG_DATE_SFT) & MVINTEG_DATE_MSK); + + /* month */ + tens = t->tm_mon / 10; + single = t->tm_mon % 10; + date |= ((tens << MVINTEG_10MON_SFT) & MVINTEG_10MON_MSK) | + ((single << MVINTEG_MON_SFT) & MVINTEG_MON_MSK); + + /* year */ + if ((t->tm_year / 100) != CENTURY) + printf("Warning: Only century %d supported.\n", CENTURY); + tens = (t->tm_year % 100) / 10; + single = (t->tm_year % 100) % 10; + date |= ((tens << MVINTEG_10YEAR_SFT) & MVINTEG_10YEAR_MSK) | + ((single << MVINTEG_YEAR_SFT) & MVINTEG_YEAR_MSK); + + /* write the time register */ + MV_REG_WRITE(MVINTEG_RTCTIME_REG, time); + + /* write the date register */ + MV_REG_WRITE(MVINTEG_RTCDATE_REG, date); + + return 0; +} + +void rtc_reset(void) +{ + /* no init routine for this RTC needed */ +} diff --git a/drivers/rtc/mvinteg_rtc.h b/drivers/rtc/mvinteg_rtc.h new file mode 100644 index 0000000..522c5d0 --- /dev/null +++ b/drivers/rtc/mvinteg_rtc.h @@ -0,0 +1,89 @@ +/* + * Copyright (C) 2011 + * Jason Cooper u-boot@lakedaemon.net + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Date & Time support for Marvell Integrated RTC + */ + +#ifndef _MVINTEG_RTC_H_ +#define _MVINTEG_RTC_H_ + +#include <compiler.h> + +#define INTERNAL_REG_BASE_ADDR 0xf1000000 + +/* register operations macros */ +#define MV_REG_READ(offset) \ + le32_to_cpu( \ + *(volatile unsigned int *)(INTERNAL_REG_BASE_ADDR + offset)) + +#define MV_REG_WRITE(offset, data) \ + do { \ + *(volatile unsigned int *)(INTERNAL_REG_BASE_ADDR + offset) = \ + cpu_to_le32(data); \ + } while (0); + +/* RTC registers */ +#define MVINTEG_RTCTIME_REG 0x10300 +#define MVINTEG_RTCDATE_REG 0x10304 + +/* time register */ +#define MVINTEG_SEC_SFT 0 +#define MVINTEG_SEC_MSK (0xf << MVINTEG_SEC_SFT) +#define MVINTEG_10SEC_SFT 4 +#define MVINTEG_10SEC_MSK (0x7 << MVINTEG_10SEC_SFT) + +#define MVINTEG_MIN_SFT 8 +#define MVINTEG_MIN_MSK (0xf << MVINTEG_MIN_SFT) +#define MVINTEG_10MIN_SFT 12 +#define MVINTEG_10MIN_MSK (0x7 << MVINTEG_10MIN_SFT) + +#define MVINTEG_HOUR_SFT 16 +#define MVINTEG_HOUR_MSK (0xf << MVINTEG_HOUR_SFT) +#define MVINTEG_10HOUR_SFT 20 +#define MVINTEG_10HOUR_MSK (0x3 << MVINTEG_10HOUR_SFT) + +#define MVINTEG_HRFMT_SFT 22 +#define MVINTEG_HRFMT12_MSK (0x1 << MVINTEG_HRFMT_SFT) +#define MVINTEG_HRFMT24_MSK (0x0 << MVINTEG_HRFMT_SFT) + +#define MVINTEG_DAY_SFT 24 +#define MVINTEG_DAY_MSK (0x7 << MVINTEG_DAY_SFT) + +/* date register */ +#define MVINTEG_DATE_SFT 0 +#define MVINTEG_DATE_MSK (0xf << MVINTEG_DATE_SFT) +#define MVINTEG_10DATE_SFT 4 +#define MVINTEG_10DATE_MSK (0x3 << MVINTEG_10DATE_SFT) + +#define MVINTEG_MON_SFT 8 +#define MVINTEG_MON_MSK (0xf << MVINTEG_MON_SFT) +#define MVINTEG_10MON_SFT 12 +#define MVINTEG_10MON_MSK (0x1 << MVINTEG_10MON_SFT) + +#define MVINTEG_YEAR_SFT 16 +#define MVINTEG_YEAR_MSK (0xf << MVINTEG_YEAR_SFT) +#define MVINTEG_10YEAR_SFT 20 +#define MVINTEG_10YEAR_MSK (0xf << MVINTEG_10YEAR_SFT) + +#endif

Signed-off-by: Jason Cooper u-boot@lakedaemon.net --- arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 46 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-kirkwood/cpu.h | 1 + 2 files changed, 47 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c index b4a4c04..a69f9f2 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c @@ -270,11 +270,26 @@ static void kw_sysrst_check(void) }

#if defined(CONFIG_DISPLAY_CPUINFO) +#define MSAR_CPUCLCK_EXTRACT(X) (((X & 0x2) >> 1) | ((X & 0x400000) >> 21) | \ + ((X & 0x18) >> 1)) +#define MSAR_L2CLCK_EXTRACT(X) (((X & 0x600) >> 9) | ((X & 0x80000) >> 17)) +#define MSAR_DDRCLCK_RTIO_MASK (0xf << 5) + +#define MSAR_TCLCK_OFFS 21 +#define MSAR_TCLCK_MASK (0x1 << MSAR_TCLCK_OFFS) +#define MV_BOARD_TCLK_166MHZ 166666667 +#define MV_BOARD_TCLK_200MHZ 200000000 +#define MSAR_TCLCK_167 (0x1 << MSAR_TCLCK_OFFS) +#define MSAR_TCLCK_200 (0x0 << MSAR_TCLCK_OFFS) + int print_cpuinfo(void) { char *rev; u16 devid = (readl(KW_REG_PCIE_DEVID) >> 16) & 0xffff; u8 revid = readl(KW_REG_PCIE_REVID) & 0xff; + u32 cpu_clk, t_clk, tmp; + u32 sys_clk, l2_clk; + u32 l2_ratio, ddr_ratio;

if ((readl(KW_REG_DEVICE_ID) & 0x03) > 2) { printf("Error.. %s:Unsupported Kirkwood SoC 88F%04x\n", __FUNCTION__, devid); @@ -297,6 +312,37 @@ int print_cpuinfo(void) }

printf("SoC: Kirkwood 88F%04x_%s\n", devid, rev); + + tmp = readl(MPP_SAMPLE_AT_RESET); + cpu_clk = MSAR_CPUCLCK_EXTRACT(tmp); + if (cpu_clk == 0x9) + cpu_clk = 1200; + + l2_ratio = MSAR_L2CLCK_EXTRACT(tmp); + l2_clk = cpu_clk / l2_ratio; + + ddr_ratio = tmp & MSAR_DDRCLCK_RTIO_MASK; + ddr_ratio = ddr_ratio >> 5; + if (ddr_ratio == 4) + sys_clk = 400; + + switch (tmp & MSAR_TCLCK_MASK) { + case MSAR_TCLCK_167: + t_clk = MV_BOARD_TCLK_166MHZ; + break; + case MSAR_TCLCK_200: + t_clk = MV_BOARD_TCLK_200MHZ; + break; + default: + t_clk = MV_BOARD_TCLK_200MHZ; + break; + } + + printf("CPU running @ %dMHz L2 running @ %dMHz\n", + cpu_clk, l2_clk); + printf("SysClock = %dMHz, TClock = %dMHz\n", + sys_clk, t_clk / 1000000); + return 0; } #endif /* CONFIG_DISPLAY_CPUINFO */ diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h b/arch/arm/include/asm/arch-kirkwood/cpu.h index d28c51a..28ddd25 100644 --- a/arch/arm/include/asm/arch-kirkwood/cpu.h +++ b/arch/arm/include/asm/arch-kirkwood/cpu.h @@ -41,6 +41,7 @@ #define KW_REG_SYSRST_CNT (KW_MPP_BASE + 0x50) #define SYSRST_CNT_1SEC_VAL (25*1000000) #define KW_REG_MPP_OUT_DRV_REG (KW_MPP_BASE + 0xE0) +#define MPP_SAMPLE_AT_RESET (KW_MPP_BASE + 0x30)

enum memory_bank { BANK0,

On Wed, Jul 27, 2011 at 11:21:16AM -0700, Prafulla Wadaskar wrote:

...

-----Original Message----- From: Jason Cooper [mailto:u-boot@lakedaemon.net] Sent: Wednesday, July 27, 2011 2:49 AM To: clint@debian.org; wd@denx.de; Prafulla Wadaskar Cc: u-boot@lists.denx.de; Prabhanjan Sarnaik; Ashish Karkare; Siddarth Gore; bdale@gag.com; Jason Cooper Subject: RFC [PATCH 2/5] arm/kirkwood: print speeds with cpu info.

Signed-off-by: Jason Cooper u-boot@lakedaemon.net

arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 46 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-kirkwood/cpu.h | 1 + 2 files changed, 47 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c index b4a4c04..a69f9f2 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c @@ -270,11 +270,26 @@ static void kw_sysrst_check(void) }

#if defined(CONFIG_DISPLAY_CPUINFO) +#define MSAR_CPUCLCK_EXTRACT(X) (((X & 0x2) >> 1) | ((X & 0x400000) >> 21) | \

• 		((X & 0x18) >> 1))
  

+#define MSAR_L2CLCK_EXTRACT(X) (((X & 0x600) >> 9) | ((X & 0x80000) >> 17)) +#define MSAR_DDRCLCK_RTIO_MASK (0xf << 5)

+#define MSAR_TCLCK_OFFS 21 +#define MSAR_TCLCK_MASK (0x1 << MSAR_TCLCK_OFFS) +#define MV_BOARD_TCLK_166MHZ 166666667 +#define MV_BOARD_TCLK_200MHZ 200000000 +#define MSAR_TCLCK_167 (0x1 << MSAR_TCLCK_OFFS) +#define MSAR_TCLCK_200 (0x0 << MSAR_TCLCK_OFFS)

There are one time used macros, can they be optimized?

Sure, do you prefer a static assignment:

#define MSAR_TCLCK_166 0x00200000

or, just do away with it altogether and use the number?

...

int print_cpuinfo(void) { char *rev; u16 devid = (readl(KW_REG_PCIE_DEVID) >> 16) & 0xffff; u8 revid = readl(KW_REG_PCIE_REVID) & 0xff;

• u32 cpu_clk, t_clk, tmp;

• u32 sys_clk, l2_clk;

• u32 l2_ratio, ddr_ratio;

  if ((readl(KW_REG_DEVICE_ID) & 0x03) > 2) { printf("Error.. %s:Unsupported Kirkwood SoC 88F%04x\n",

__FUNCTION__, devid); @@ -297,6 +312,37 @@ int print_cpuinfo(void) }

printf("SoC: Kirkwood 88F%04x_%s\n", devid, rev);

• tmp = readl(MPP_SAMPLE_AT_RESET);
• cpu_clk = MSAR_CPUCLCK_EXTRACT(tmp);
• if (cpu_clk == 0x9)

• cpu_clk = 1200;
  

• l2_ratio = MSAR_L2CLCK_EXTRACT(tmp);
• l2_clk = cpu_clk / l2_ratio;
• ddr_ratio = tmp & MSAR_DDRCLCK_RTIO_MASK;
• ddr_ratio = ddr_ratio >> 5;
• if (ddr_ratio == 4)

• sys_clk = 400;
  

• switch (tmp & MSAR_TCLCK_MASK) {
• case MSAR_TCLCK_167:

• t_clk = MV_BOARD_TCLK_166MHZ;
  

• break;
  

• case MSAR_TCLCK_200:

• t_clk = MV_BOARD_TCLK_200MHZ;
  

• break;
  

• default:

• t_clk = MV_BOARD_TCLK_200MHZ;
  

• break;
  

• }
• printf("CPU running @ %dMHz L2 running @ %dMHz\n",

• cpu_clk, l2_clk);
  

• printf("SysClock = %dMHz, TClock = %dMHz\n",

• sys_clk, t_clk / 1000000);
  

It is good to encapsulate this in #ifdef CONFIG_SYS_XXX

It's already encapsulated in CONFIG_DISPLAY_CPUINFO, so if enabled, on boot it looks like:

SoC: Kirkwood 88F6281_A1 CPU running @ 1200MHz L2 running @ 400MHz SysClock = 400MHz, TClock = 200MHz

I can encapsulate it separately if you want, but it seems a little too fine grained for me. Either I want cpu info, or I don't. ymmv.

thx,

Jason.

This fixes 'EHCI timed out on TD...' on the dreamplug board.

Signed-off-by: Jason Cooper u-boot@lakedaemon.net --- include/usb.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/usb.h b/include/usb.h index 53603a5..168e2b2 100644 --- a/include/usb.h +++ b/include/usb.h @@ -46,7 +46,7 @@ * This is the timeout to allow for submitting an urb in ms. We allow more * time for a BULK device to react - some are slow. */ -#define USB_TIMEOUT_MS(pipe) (usb_pipebulk(pipe) ? 5000 : 100) +#define USB_TIMEOUT_MS(pipe) (usb_pipebulk(pipe) ? 5000 : 500)

/* device request (setup) */ struct devrequest {

On Wed, Jul 27, 2011 at 11:23:50AM -0700, Prafulla Wadaskar wrote:

...

-----Original Message----- From: Jason Cooper [mailto:u-boot@lakedaemon.net] Sent: Wednesday, July 27, 2011 2:49 AM To: clint@debian.org; wd@denx.de; Prafulla Wadaskar Cc: u-boot@lists.denx.de; Prabhanjan Sarnaik; Ashish Karkare; Siddarth Gore; bdale@gag.com; Jason Cooper Subject: RFC [PATCH 3/5] usb: Some EHCI chipsets are slow to respond.

This fixes 'EHCI timed out on TD...' on the dreamplug board.

Signed-off-by: Jason Cooper u-boot@lakedaemon.net

include/usb.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/usb.h b/include/usb.h index 53603a5..168e2b2 100644 --- a/include/usb.h +++ b/include/usb.h @@ -46,7 +46,7 @@

• This is the timeout to allow for submitting an urb in ms. We allow

more

• time for a BULK device to react - some are slow.

*/ -#define USB_TIMEOUT_MS(pipe) (usb_pipebulk(pipe) ? 5000 : 100) +#define USB_TIMEOUT_MS(pipe) (usb_pipebulk(pipe) ? 5000 : 500)

This looks global change, how will it affect other implementations?

I dunno, that's why it's RFC. ;-) It's a timeout, so it *shouldn't* adversely affect other systems with well behaved usb chipsets. And boards will ill-tempered usb chipsets should work better. But I'm not familiar enough with the usb code to say that definitively.

I could try doing a dreamplug-specific hack to make it work, but if there's no adverse affect to other systems, then this is a cleaner approach.

thx,

Jason.

On Thu, Jul 28, 2011 at 12:16:00PM -0700, Prafulla Wadaskar wrote:

...

-----Original Message----- From: Jason [mailto:u-boot@lakedaemon.net] Sent: Thursday, July 28, 2011 7:07 AM To: Prafulla Wadaskar Cc: clint@debian.org; wd@denx.de; u-boot@lists.denx.de; Prabhanjan Sarnaik; Ashish Karkare; Siddarth Gore; bdale@gag.com Subject: Re: RFC [PATCH 3/5] usb: Some EHCI chipsets are slow to respond.

On Wed, Jul 27, 2011 at 11:23:50AM -0700, Prafulla Wadaskar wrote:

...

...

-----Original Message----- From: Jason Cooper [mailto:u-boot@lakedaemon.net] Sent: Wednesday, July 27, 2011 2:49 AM To: clint@debian.org; wd@denx.de; Prafulla Wadaskar Cc: u-boot@lists.denx.de; Prabhanjan Sarnaik; Ashish Karkare;

Siddarth

...

...

Gore; bdale@gag.com; Jason Cooper Subject: RFC [PATCH 3/5] usb: Some EHCI chipsets are slow to

respond.

...

...

This fixes 'EHCI timed out on TD...' on the dreamplug board.

Signed-off-by: Jason Cooper u-boot@lakedaemon.net

include/usb.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/usb.h b/include/usb.h index 53603a5..168e2b2 100644 --- a/include/usb.h +++ b/include/usb.h @@ -46,7 +46,7 @@

• This is the timeout to allow for submitting an urb in ms. We

allow

...

...

more

• time for a BULK device to react - some are slow.

*/ -#define USB_TIMEOUT_MS(pipe) (usb_pipebulk(pipe) ? 5000 : 100) +#define USB_TIMEOUT_MS(pipe) (usb_pipebulk(pipe) ? 5000 : 500)

This looks global change, how will it affect other implementations?

I dunno, that's why it's RFC. ;-) It's a timeout, so it *shouldn't* adversely affect other systems with well behaved usb chipsets. And boards will ill-tempered usb chipsets should work better. But I'm not familiar enough with the usb code to say that definitively.

I could try doing a dreamplug-specific hack to make it work, but if there's no adverse affect to other systems, then this is a cleaner approach.

You can post this standalone patch, remove from this patch series since it will be acked/applied by other custodian.

Based on new info (the OpenRD-ultimate is experiencing the same bug), a git bisect has revealed the following patch as the culprit:

commit c2dd0d45540397704de9b13287417d21049d34c6 Author: Aneesh V aneesh@ti.com Date: Thu Jun 16 23:30:49 2011 +0000

armv7: integrate cache maintenance support

- Enable I-cache on bootup - Enable MMU and D-cache immediately after relocation - Do necessary initialization before enabling d-cache and MMU - Changes to cleanup_before_linux() - Make changes according to the new framework

Signed-off-by: Aneesh V aneesh@ti.com

The reporter was also able to verify that reverting this patch fixed reading from the internal usb attached microsd card. I'd be lying if I said I understood how.

I think the problem is in one of two areas. Either the patch is incorrect, or it's fix highlighted a bug in the marvell EHCI code. I'll add some folks to the CC who can add more intelligent thoughts. :-)

You can see his error report here [1] which is the exact same error messages I was trying to fix after giving the command 'usb start'.

thx,

Jason.

[1] http://lists.denx.de/pipermail/u-boot/2011-July/097333.html

-----Original Message----- From: Jason Cooper [mailto:u-boot@lakedaemon.net] Sent: Wednesday, July 27, 2011 2:49 AM To: clint@debian.org; wd@denx.de; Prafulla Wadaskar Cc: u-boot@lists.denx.de; Prabhanjan Sarnaik; Ashish Karkare; Siddarth Gore; bdale@gag.com; Jason Cooper Subject: RFC [PATCH 4/5 v5] dreamplug: initial board support.

Copied wholeheartedly from board/Marvell/guruplug and modified to add support for SPI NOR flash.

Also, the following features are used: - Use the Marvell Integrated RTC. - display Marvell CPU/L2/etc speeds if requested.

Note: this still uses MACH_TYPE_GURUPLUG until MACH_TYPE_DREAMPLUG is accepted into mainline Linux. The source from Globalscale did the same.

Signed-off-by: Jason Cooper u-boot@lakedaemon.net

There is no change log for all previous versions. Please put them here. Ref: http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions

MAINTAINERS | 4 + MAKEALL | 1 + board/Marvell/dreamplug/Makefile | 54 +++++++++++ board/Marvell/dreamplug/dreamplug.c | 157 ++++++++++++++++++++++++++++++++ board/Marvell/dreamplug/dreamplug.h | 42 +++++++++ board/Marvell/dreamplug/kwbimage.cfg | 163 ++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/dreamplug.h | 138 ++++++++++++++++++++++++++++ 8 files changed, 560 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/dreamplug/Makefile create mode 100644 board/Marvell/dreamplug/dreamplug.c create mode 100644 board/Marvell/dreamplug/dreamplug.h create mode 100644 board/Marvell/dreamplug/kwbimage.cfg create mode 100644 include/configs/dreamplug.h

diff --git a/MAINTAINERS b/MAINTAINERS index 2bba7b4..9affbea 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -70,6 +70,10 @@ Conn Clark clark@esteem.com

  ESTEEM192E      MPC8xx

+Jason Cooper u-boot@lakedaemon.net

• dreamplug       ARM926EJS (Kirkwood SoC)
  

Joe D'Abbraccio ljd015@freescale.com

  MPC837xERDB     MPC837x

diff --git a/MAKEALL b/MAKEALL index 51db13e..55a122f 100755 --- a/MAKEALL +++ b/MAKEALL @@ -335,6 +335,7 @@ LIST_ARM9=" \ cp966 \ da830evm \ da850evm \

• dreamplug               \
  edb9301                 \
  edb9302                 \
  edb9302a                \
  

diff --git a/board/Marvell/dreamplug/Makefile b/board/Marvell/dreamplug/Makefile new file mode 100644 index 0000000..9ee5406 --- /dev/null +++ b/board/Marvell/dreamplug/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2011 +# Jason Cooper u-boot@lakedaemon.net +# +# Based on work by: +# Marvell Semiconductor <www.marvell.com> +# Written-by: Siddarth Gore gores@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +#

+include $(TOPDIR)/config.mk

+LIB = $(obj)lib$(BOARD).o

+COBJS := dreamplug.o

+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS))

+$(LIB): $(obj).depend $(OBJS) $(SOBJS)

• $(call cmd_link_o_target, $(OBJS) $(SOBJS))
  

+clean:

• rm -f $(SOBJS) $(OBJS)
  

+distclean: clean

• rm -f $(LIB) core *.bak .depend
  

+####################################################################### ##

+# defines $(obj).depend target +include $(SRCTREE)/rules.mk

+sinclude $(obj).depend

+####################################################################### ## diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c new file mode 100644 index 0000000..cdc094a --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.c @@ -0,0 +1,157 @@ +/*

• • (C) Copyright 2011
• • Jason Cooper u-boot@lakedaemon.net
• • Based on work by:
• • Marvell Semiconductor <www.marvell.com>
• • Written-by: Siddarth Gore gores@marvell.com
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
• • MA 02110-1301 USA
• */

+#include <common.h> +#include <miiphy.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include "dreamplug.h"

+DECLARE_GLOBAL_DATA_PTR;

+int board_early_init_f(void) +{

• /*
  

•  * default gpio configuration
  

•  * There are maximum 64 gpios controlled through 2 sets of registers
  

•  * the  below configuration configures mainly initial LED status
  

•  */
  

• kw_config_gpio(DREAMPLUG_OE_VAL_LOW,
  

•                 DREAMPLUG_OE_VAL_HIGH,
  

•                 DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH);
  

• /* Multi-Purpose Pins Functionality configuration */
  

• u32 kwmpp_config[] = {
  

•         MPP0_SPI_SCn,           /* SPI Flash */
  

•         MPP1_SPI_MOSI,
  

•         MPP2_SPI_SCK,
  

•         MPP3_SPI_MISO,
  

•         MPP4_NF_IO6,
  

•         MPP5_NF_IO7,
  

•         MPP6_SYSRST_OUTn,
  

•         MPP7_GPO,
  

•         MPP8_TW_SDA,
  

•         MPP9_TW_SCK,
  

•         MPP10_UART0_TXD,        /* Serial */
  

•         MPP11_UART0_RXD,
  

•         MPP12_SD_CLK,           /* SDIO Slot */
  

•         MPP13_SD_CMD,
  

•         MPP14_SD_D0,
  

•         MPP15_SD_D1,
  

•         MPP16_SD_D2,
  

•         MPP17_SD_D3,
  

•         MPP18_NF_IO0,
  

•         MPP19_NF_IO1,
  

•         MPP20_GE1_0,            /* Gigabit Ethernet */
  

•         MPP21_GE1_1,
  

•         MPP22_GE1_2,
  

•         MPP23_GE1_3,
  

•         MPP24_GE1_4,
  

•         MPP25_GE1_5,
  

•         MPP26_GE1_6,
  

•         MPP27_GE1_7,
  

•         MPP28_GE1_8,
  

•         MPP29_GE1_9,
  

•         MPP30_GE1_10,
  

•         MPP31_GE1_11,
  

•         MPP32_GE1_12,
  

•         MPP33_GE1_13,
  

•         MPP34_GE1_14,
  

•         MPP35_GE1_15,
  

•         MPP36_GPIO,
  

•         MPP37_GPIO,
  

•         MPP38_GPIO,
  

•         MPP39_GPIO,
  

•         MPP40_TDM_SPI_SCK,
  

•         MPP41_TDM_SPI_MISO,
  

•         MPP42_TDM_SPI_MOSI,
  

•         MPP43_GPIO,
  

•         MPP44_GPIO,
  

•         MPP45_GPIO,
  

•         MPP46_GPIO,             /* Wifi AP LED */
  

•         MPP47_GPIO,
  

•         MPP48_GPIO,             /* Wifi LED */
  

It is better if you can comment about rest other GPIOSs with their assigned functionality.

•         MPP49_GPIO,
  

•         0
  

• };
  

• kirkwood_mpp_conf(kwmpp_config);
  

• return 0;
  

+}

+int board_init(void) +{

• /*
  

•  * arch number of board
  

•  * XXX: change to MACH_TYPE_DREAMPLUG once in Linux mainline.
  

•  */
  

• gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
  

I think this board should have some delta to guruplug? I think you should have different machine ID here.

BTW: what is delta w.r.to guruplug?

• /* adress of boot parameters */
  

• gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
  

• return 0;
  

+}

+#ifdef CONFIG_RESET_PHY_R +void mv_phy_88e1121_init(char *name) +{

• u16 reg;
  

• u16 devadr;
  

• if (miiphy_set_current_dev(name))
  

•         return;
  

• /* command to read PHY dev address */
  

• if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
  

•         printf("Err..%s could not read PHY dev address\n",
  

•                 __FUNCTION__);
  

•         return;
  

• }
  

• /*
  

•  * Enable RGMII delay on Tx and Rx for CPU port
  

•  * Ref: sec 4.7.2 of chip datasheet
  

•  */
  

• miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2);
  

• miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, &reg);
  

• reg |= (MV88E1121_RGMII_RXTM_CTRL | MV88E1121_RGMII_TXTM_CTRL);
  

• miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg);
  

• miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0);
  

• /* reset the phy */
  

• miiphy_reset(name, devadr);
  

• printf("88E1116 Initialized on %s\n", name);
  

Function name and print info are mismatching.

+}

+void reset_phy(void) +{

• /* configure and initialize both PHY's */
  

• mv_phy_88e1121_init("egiga0");
  

• mv_phy_88e1121_init("egiga1");
  

+} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/dreamplug/dreamplug.h b/board/Marvell/dreamplug/dreamplug.h new file mode 100644 index 0000000..21bf644 --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.h @@ -0,0 +1,42 @@ +/*

• • (C) Copyright 2011
• • Jason Cooper u-boot@lakedaemon.net
• • Based on work by:
• • Marvell Semiconductor <www.marvell.com>
• • Written-by: Siddarth Gore gores@marvell.com
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
• • MA 02110-1301 USA
• */

+#ifndef __DREAMPLUG_H +#define __DREAMPLUG_H

+#define DREAMPLUG_OE_LOW (~(0)) +#define DREAMPLUG_OE_HIGH (~(0)) +#define DREAMPLUG_OE_VAL_LOW 0 +#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */

+/* PHY related */ +#define MV88E1121_MAC_CTRL2_REG 21 +#define MV88E1121_PGADR_REG 22 +#define MV88E1121_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1121_RGMII_RXTM_CTRL (1 << 5)

+#endif /* __DREAMPLUG_H */ diff --git a/board/Marvell/dreamplug/kwbimage.cfg b/board/Marvell/dreamplug/kwbimage.cfg

I hope this is not same as guruplug (since you are using same machine-id)?

new file mode 100644 index 0000000..ca9cd74 --- /dev/null +++ b/board/Marvell/dreamplug/kwbimage.cfg @@ -0,0 +1,163 @@ +# +# (C) Copyright 2011 +# Jason Cooper u-boot@lakedaemon.net +# +# Based on work by: +# Marvell Semiconductor <www.marvell.com> +# Written-by: Siddarth Gore gores@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +#

+# Boot Media configurations +BOOT_FROM spi

+# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed

+# Configure RGMII-0/1 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b9b9b

+#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01

+DATA 0xFFD01404 0x37543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay

+DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP

+DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required

+DATA 0xFFD01410 0x000000cc # DDR Address Control +# bit1-0: 01, Cs0width=x8 +# bit3-2: 10, Cs0size=1Gb +# bit5-4: 01, Cs1width=x8 +# bit7-6: 10, Cs1size=1Gb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required

+DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required

+DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required

+DATA 0xFFD0141C 0x00000C52 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required

+DATA 0xFFD01420 0x00000040 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required

+DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required

+DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)

+DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB)

+DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1

+DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled

+DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required

+DATA 0xFFD0149C 0x0000E803 # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write

+# End of Header extension +DATA 0x0 0x0 diff --git a/boards.cfg b/boards.cfg index dfefc3f..294c675 100644 --- a/boards.cfg +++ b/boards.cfg @@ -118,6 +118,7 @@ davinci_sonata arm arm926ejs sonata davinci suen3 arm arm926ejs km_arm keymile kirkwood suen8 arm arm926ejs km_arm keymile kirkwood mgcoge3un arm arm926ejs km_arm keymile kirkwood +dreamplug arm arm926ejs - Marvell kirkwood guruplug arm arm926ejs - Marvell kirkwood mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood openrd_base arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_BASE diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h new file mode 100644 index 0000000..2a908f4 --- /dev/null +++ b/include/configs/dreamplug.h @@ -0,0 +1,138 @@ +/*

• • (C) Copyright 2011
• • Jason Cooper u-boot@lakedaemon.net
• • Based on work by:
• • Marvell Semiconductor <www.marvell.com>
• • Written-by: Siddarth Gore gores@marvell.com
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
• • MA 02110-1301 USA
• */

+#ifndef _CONFIG_DREAMPLUG_H +#define _CONFIG_DREAMPLUG_H

+/*

• • Version number information
• */

+#define CONFIG_IDENT_STRING "\nMarvell-DreamPlug"

+/*

• • High Level Configuration Options (easy to change)
• */

+#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_GURUPLUG /* Machine type */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */

+/*

• • Commands configuration
• */

+#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_SF +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB +#define CONFIG_CMD_IDE +#define CONFIG_CMD_DATE

+/*

• • mv-common.h should be defined after CMD configs since it used them
• • to enable certain macros
• */

+#include "mv-common.h"

+/*

• • Environment variables configurations
• */

+#ifdef CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64k */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif

+#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH 1 +#define CONFIG_HARD_SPI 1 +#define CONFIG_KIRKWOOD_SPI 1 +#define CONFIG_SPI_FLASH_MACRONIX 1 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 /* 50 MHz */ +#endif

+/*

• • max 4k env size is enough, but in case of nand
• • it has to be rounded to sector size
• */

+#define CONFIG_ENV_SIZE 0x1000 /* 4k */ +#define CONFIG_ENV_ADDR 0x100000 +#define CONFIG_ENV_OFFSET 0x100000 /* env starts here */

+/*

• • Default environment variables
• */

+#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \

• "${x_bootcmd_ethernet}; setenv ethact egiga1; " \
  

• "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\
  

• "setenv bootargs ${x_bootargs} ${x_bootargs_root}; "    \
  

• "bootm 0x6400000;"
  

+#define CONFIG_EXTRA_ENV_SETTINGS \

• "x_bootcmd_ethernet=ping 192.168.2.1\0" \
  

• "x_bootcmd_usb=usb start\0"     \
  

• "x_bootcmd_kernel=fatload usb 0 0x6400000 uImage\0" \
  

• "x_bootargs=console=ttyS0,115200\0"     \
  

• "x_bootargs_root=root=/dev/sda2 rootdelay=10\0"
  

+/*

• • Ethernet Driver configuration
• */

+#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ +#define CONFIG_PHY_BASE_ADR 0 +#endif /* CONFIG_CMD_NET */

+/*

• • SATA Driver configuration
• */

+#ifdef CONFIG_MVSATA_IDE +#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#endif /*CONFIG_MVSATA_IDE*/

+/*

• • RTC driver configuration
• */

+#ifdef CONFIG_CMD_DATE +#define CONFIG_RTC_MVINTEG +#endif /* CONFIG_CMD_DATE */

+#define CONFIG_SYS_ALT_MEMTEST

+/*

• • display enhanced info about the cpu at boot.
• */

+#define CONFIG_DISPLAY_CPUINFO

+#endif /* _CONFIG_DREAMPLUG_H */

Regards.. Prafulla . .

1.7.0.4

-----Original Message----- From: Jason [mailto:u-boot@lakedaemon.net] Sent: Thursday, July 28, 2011 7:33 AM To: Prafulla Wadaskar Cc: clint@debian.org; wd@denx.de; u-boot@lists.denx.de; Prabhanjan Sarnaik; Ashish Karkare; Siddarth Gore; bdale@gag.com Subject: Re: RFC [PATCH 4/5 v5] dreamplug: initial board support.

On Wed, Jul 27, 2011 at 11:38:55AM -0700, Prafulla Wadaskar wrote:

...

...

-----Original Message----- From: Jason Cooper [mailto:u-boot@lakedaemon.net] Sent: Wednesday, July 27, 2011 2:49 AM To: clint@debian.org; wd@denx.de; Prafulla Wadaskar Cc: u-boot@lists.denx.de; Prabhanjan Sarnaik; Ashish Karkare;

Siddarth

...

...

Gore; bdale@gag.com; Jason Cooper Subject: RFC [PATCH 4/5 v5] dreamplug: initial board support.

Copied wholeheartedly from board/Marvell/guruplug and modified to

add

...

...

support for SPI NOR flash.

Also, the following features are used: - Use the Marvell Integrated RTC. - display Marvell CPU/L2/etc speeds if requested.

Note: this still uses MACH_TYPE_GURUPLUG until MACH_TYPE_DREAMPLUG

is

...

...

accepted into mainline Linux. The source from Globalscale did the same.

Signed-off-by: Jason Cooper u-boot@lakedaemon.net

There is no change log for all previous versions. Please put them here. Ref: http://www.denx.de/wiki/view/U-

Boot/Patches#Sending_updated_patch_versions

%$#%@#. I knew I forgot something. Here it is:

Changes from v1 to v2:

    - resorted series to move 'make all' support last.

Changes from v2 to v3:

    - Use MACH_TYPE_GURUPLUG for now until dreamplug support is in
      Linux.
    - Update MAINTAINERS.
    - Collapse into one patch.

Changes from v3 to v4:

    - update copyright info as recommended by Prafulla Wadaskar.
    - maintain proper order in boards.cfg, MAINTAINERS, etc.
    - label MPP's
    - change back to MACH_TYPE_DREAMPLUG.  This patch is just RFC
      until the Dreamplug is supported in Linux (and MACH_TYPE_

added).

Changes from v4 to v5:

            - Complete rewrite due to receiving u-boot source indirectly
              from Global Scale Tech.
    - Added driver for integrated RTC. (thx GST!)
    - Added support for displaying CPU frequencies at boot. (thx
      GST!)
    - Adjust USB timeout to handle dreamplug EHCI chipset.
    - Cleaned up MPP registers based on Global Scale code. (thx
      GST!)
    - broke out MACH_TYPE_DREAMPLUG changes since it's going to be a
      while until the Linux arm tree gets sorted and accepts new
      boards again.  Since all Dreamplugs currently on the market
      set r1 to MACH_TYPE_GURUPLUG, this allows the board to be
      added to u-boot while waiting for Linux mainline.  Once it's
      in Linux mainline, then the last patch can be integrated to

use MACH_TYPE_DREAMPLUG.

Please kindly repost with changelog.

...

...

MAINTAINERS | 4 + MAKEALL | 1 + board/Marvell/dreamplug/Makefile | 54 +++++++++++ board/Marvell/dreamplug/dreamplug.c | 157 ++++++++++++++++++++++++++++++++ board/Marvell/dreamplug/dreamplug.h | 42 +++++++++ board/Marvell/dreamplug/kwbimage.cfg | 163 ++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/dreamplug.h | 138 ++++++++++++++++++++++++++++ 8 files changed, 560 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/dreamplug/Makefile create mode 100644 board/Marvell/dreamplug/dreamplug.c create mode 100644 board/Marvell/dreamplug/dreamplug.h create mode 100644 board/Marvell/dreamplug/kwbimage.cfg create mode 100644 include/configs/dreamplug.h

diff --git a/MAINTAINERS b/MAINTAINERS index 2bba7b4..9affbea 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -70,6 +70,10 @@ Conn Clark clark@esteem.com

  ESTEEM192E      MPC8xx

+Jason Cooper u-boot@lakedaemon.net

• dreamplug       ARM926EJS (Kirkwood SoC)
  

Joe D'Abbraccio ljd015@freescale.com

  MPC837xERDB     MPC837x

diff --git a/MAKEALL b/MAKEALL index 51db13e..55a122f 100755 --- a/MAKEALL +++ b/MAKEALL @@ -335,6 +335,7 @@ LIST_ARM9=" \ cp966 \ da830evm \ da850evm \

• dreamplug               \
  edb9301                 \
  edb9302                 \
  edb9302a                \
  

diff --git a/board/Marvell/dreamplug/Makefile b/board/Marvell/dreamplug/Makefile new file mode 100644 index 0000000..9ee5406 --- /dev/null +++ b/board/Marvell/dreamplug/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2011 +# Jason Cooper u-boot@lakedaemon.net +# +# Based on work by: +# Marvell Semiconductor <www.marvell.com> +# Written-by: Siddarth Gore gores@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See

the

...

...

+# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +#

+include $(TOPDIR)/config.mk

+LIB = $(obj)lib$(BOARD).o

+COBJS := dreamplug.o

+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS))

+$(LIB): $(obj).depend $(OBJS) $(SOBJS)

• $(call cmd_link_o_target, $(OBJS) $(SOBJS))
  

+clean:

• rm -f $(SOBJS) $(OBJS)
  

+distclean: clean

• rm -f $(LIB) core *.bak .depend
  

+#######################################################################

...

...

##

+# defines $(obj).depend target +include $(SRCTREE)/rules.mk

+sinclude $(obj).depend

+#######################################################################

...

...

## diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c new file mode 100644 index 0000000..cdc094a --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.c @@ -0,0 +1,157 @@ +/*

• • (C) Copyright 2011
• • Jason Cooper u-boot@lakedaemon.net
• • Based on work by:
• • Marvell Semiconductor <www.marvell.com>
• • Written-by: Siddarth Gore gores@marvell.com
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public

License

...

...

• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
• • MA 02110-1301 USA
• */

+#include <common.h> +#include <miiphy.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include "dreamplug.h"

+DECLARE_GLOBAL_DATA_PTR;

+int board_early_init_f(void) +{

• /*
  

•  * default gpio configuration
  

•  * There are maximum 64 gpios controlled through 2 sets of
  

registers

...

...

•  * the  below configuration configures mainly initial LED
  

status

...

...

•  */
  

• kw_config_gpio(DREAMPLUG_OE_VAL_LOW,
  

•                 DREAMPLUG_OE_VAL_HIGH,
  

•                 DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH);
  

• /* Multi-Purpose Pins Functionality configuration */
  

• u32 kwmpp_config[] = {
  

•         MPP0_SPI_SCn,           /* SPI Flash */
  

•         MPP1_SPI_MOSI,
  

•         MPP2_SPI_SCK,
  

•         MPP3_SPI_MISO,
  

•         MPP4_NF_IO6,
  

•         MPP5_NF_IO7,
  

•         MPP6_SYSRST_OUTn,
  

•         MPP7_GPO,
  

•         MPP8_TW_SDA,
  

•         MPP9_TW_SCK,
  

•         MPP10_UART0_TXD,        /* Serial */
  

•         MPP11_UART0_RXD,
  

•         MPP12_SD_CLK,           /* SDIO Slot */
  

•         MPP13_SD_CMD,
  

•         MPP14_SD_D0,
  

•         MPP15_SD_D1,
  

•         MPP16_SD_D2,
  

•         MPP17_SD_D3,
  

•         MPP18_NF_IO0,
  

•         MPP19_NF_IO1,
  

•         MPP20_GE1_0,            /* Gigabit Ethernet */
  

•         MPP21_GE1_1,
  

•         MPP22_GE1_2,
  

•         MPP23_GE1_3,
  

•         MPP24_GE1_4,
  

•         MPP25_GE1_5,
  

•         MPP26_GE1_6,
  

•         MPP27_GE1_7,
  

•         MPP28_GE1_8,
  

•         MPP29_GE1_9,
  

•         MPP30_GE1_10,
  

•         MPP31_GE1_11,
  

•         MPP32_GE1_12,
  

•         MPP33_GE1_13,
  

•         MPP34_GE1_14,
  

•         MPP35_GE1_15,
  

•         MPP36_GPIO,
  

•         MPP37_GPIO,
  

•         MPP38_GPIO,
  

•         MPP39_GPIO,
  

•         MPP40_TDM_SPI_SCK,
  

•         MPP41_TDM_SPI_MISO,
  

•         MPP42_TDM_SPI_MOSI,
  

•         MPP43_GPIO,
  

•         MPP44_GPIO,
  

•         MPP45_GPIO,
  

•         MPP46_GPIO,             /* Wifi AP LED */
  

•         MPP47_GPIO,
  

•         MPP48_GPIO,             /* Wifi LED */
  

It is better if you can comment about rest other GPIOSs with their assigned functionality.

I filled in what I was comfortable labeling, anything else would be a guess on my part. This is a standard kirkwood configuration except for pins 0-3 and the LEDS (46,48). Should I add a comment to the same effect?

My comment was for MPPXX_GPIOs, for rest other macros are enough to explain.

...

...

•         MPP49_GPIO,
  

•         0
  

• };
  

• kirkwood_mpp_conf(kwmpp_config);
  

• return 0;
  

+}

+int board_init(void) +{

• /*
  

•  * arch number of board
  

•  * XXX: change to MACH_TYPE_DREAMPLUG once in Linux mainline.
  

•  */
  

• gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
  

I think this board should have some delta to guruplug? I think you should have different machine ID here.

See added changelog and patch 5 in the series.

...

BTW: what is delta w.r.to guruplug?

Just 2MB SPI flash instead of 512MB NAND flash. It grabs the kernel/initrd from an internal microSD card attached via USB, instead of NAND flash. OS is on the same microSD card.

The dreamplug kernel shipped with the device doesn't even see the SPI flash. I think it may be the exact same as the guruplug kernel, although I haven't done a rigorous check. It's built for MACH_TYPE_GURUPLUG, though.

It has some bells and whistles, like audio in/out, SPDIF out. Nothing else really relevant to u-boot.

...

...

• /* adress of boot parameters */
  

• gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
  

• return 0;
  

+}

+#ifdef CONFIG_RESET_PHY_R +void mv_phy_88e1121_init(char *name) +{

• u16 reg;
  

• u16 devadr;
  

• if (miiphy_set_current_dev(name))
  

•         return;
  

• /* command to read PHY dev address */
  

• if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
  

•         printf("Err..%s could not read PHY dev address\n",
  

•                 __FUNCTION__);
  

•         return;
  

• }
  

• /*
  

•  * Enable RGMII delay on Tx and Rx for CPU port
  

•  * Ref: sec 4.7.2 of chip datasheet
  

•  */
  

• miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2);
  

• miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, &reg);
  

• reg |= (MV88E1121_RGMII_RXTM_CTRL |
  

MV88E1121_RGMII_TXTM_CTRL);

...

...

• miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg);
  

• miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0);
  

• /* reset the phy */
  

• miiphy_reset(name, devadr);
  

• printf("88E1116 Initialized on %s\n", name);
  

Function name and print info are mismatching.

Gah! good catch. I just copied that printf over from the GST source code. I'll fix it up.

...

...

+}

+void reset_phy(void) +{

• /* configure and initialize both PHY's */
  

• mv_phy_88e1121_init("egiga0");
  

• mv_phy_88e1121_init("egiga1");
  

+} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/dreamplug/dreamplug.h b/board/Marvell/dreamplug/dreamplug.h new file mode 100644 index 0000000..21bf644 --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.h @@ -0,0 +1,42 @@ +/*

• • (C) Copyright 2011
• • Jason Cooper u-boot@lakedaemon.net
• • Based on work by:
• • Marvell Semiconductor <www.marvell.com>
• • Written-by: Siddarth Gore gores@marvell.com
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public

License

...

...

• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
• • MA 02110-1301 USA
• */

+#ifndef __DREAMPLUG_H +#define __DREAMPLUG_H

+#define DREAMPLUG_OE_LOW (~(0)) +#define DREAMPLUG_OE_HIGH (~(0)) +#define DREAMPLUG_OE_VAL_LOW 0 +#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high

*/

...

...

+/* PHY related */ +#define MV88E1121_MAC_CTRL2_REG 21 +#define MV88E1121_PGADR_REG 22 +#define MV88E1121_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1121_RGMII_RXTM_CTRL (1 << 5)

+#endif /* __DREAMPLUG_H */ diff --git a/board/Marvell/dreamplug/kwbimage.cfg b/board/Marvell/dreamplug/kwbimage.cfg

I hope this is not same as guruplug (since you are using same machine-

id)?

Very similar, see above.

We can overrule this at this and can go ahead having dreamplug as new board support since we have valid machin_id for this board.

Regards.. Prafulla . .

Signed-off-by: Jason Cooper u-boot@lakedaemon.net --- board/Marvell/dreamplug/dreamplug.c | 7 ++----- include/configs/dreamplug.h | 2 +- 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c index cdc094a..f848db7 100644 --- a/board/Marvell/dreamplug/dreamplug.c +++ b/board/Marvell/dreamplug/dreamplug.c @@ -104,11 +104,8 @@ int board_early_init_f(void)

int board_init(void) { - /* - * arch number of board - * XXX: change to MACH_TYPE_DREAMPLUG once in Linux mainline. - */ - gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG; + /* arch number of board */ + gd->bd->bi_arch_number = MACH_TYPE_DREAMPLUG;

/* adress of boot parameters */ gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 2a908f4..4be2e59 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -39,7 +39,7 @@ #define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ #define CONFIG_KIRKWOOD 1 /* SOC Family Name */ #define CONFIG_KW88F6281 1 /* SOC Name */ -#define CONFIG_MACH_GURUPLUG /* Machine type */ +#define CONFIG_MACH_DREAMPLUG /* Machine type */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */

/*