The PCI Express internal transmit and receive buffers are ECC protected. When these buffers are being read before they are written, a false multi-bit ECC error is likely to occur. So disable the PCI Express ECC error reporting.

The Workaround is for the T4 silicon rev 1.0.

Signed-off-by: Chunhe Lan Chunhe.Lan@freescale.com --- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 ++++ arch/powerpc/cpu/mpc85xx/cpu_init.c | 8 ++++++++ arch/powerpc/include/asm/config_mpc85xx.h | 2 ++ 3 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 0711064..7489174 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -270,6 +270,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A005553 puts("Work-around for Erratum A005553 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A005977 + if (IS_SVR_REV(svr, 1, 0)) + puts("Work-around for Erratum A005977 enabled\n"); +#endif #ifdef CONFIG_SYS_FSL_ERRATUM_A004849 /* This work-around is implemented in PBI, so just check for it */ check_erratum_a4849(svr); diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 6f7a10f..0b6668b 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -675,6 +675,14 @@ skip_l2: setbits_be32((void *)DCFG_ECC, 1 << (31 - 15)); #endif

+#ifdef CONFIG_SYS_FSL_ERRATUM_A005977 + if (IS_SVR_REV(svr, 1, 0)) { + void *p; + p = (void *)CONFIG_SYS_DCSRBAR + 0x20520; + setbits_be32(p, 0xf << (31 - 15)); + } +#endif + #ifdef CONFIG_FMAN_ENET fman_enet_init(); #endif diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 650df14..bc619e9 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -540,6 +540,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A004809 #define CONFIG_SYS_FSL_ERRATUM_A004857 #define CONFIG_SYS_FSL_ERRATUM_A005553 +#define CONFIG_SYS_FSL_ERRATUM_A005977 #define CONFIG_SYS_FSL_ERRATUM_A004390 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_PCI_VER_3_X @@ -583,6 +584,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A004809 #define CONFIG_SYS_FSL_ERRATUM_A004857 #define CONFIG_SYS_FSL_ERRATUM_A005553 +#define CONFIG_SYS_FSL_ERRATUM_A005977 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_PCI_VER_3_X