[U-Boot] [PATCH v3 0/3] Split rockchip mipi driver into common and specific parts.

This patch series split the rockchip mipi dsi driver into common and specific parts to make it possible that different soc share the most common code.
Changes in v2: -Use dev_read_addr to replace devfdt_get_addr.
Changes in v1: -Add title. -Delete the unused variable.
Eric Gao (3): rockchip: defconfig: Increase max video resolution for mipi panel rockchip: video: mipi: Split mipi driver into common and specific parts rockchop: video: mipi: Makefile: Add soc specfic driver for rk3399 mipi dsi
configs/evb-rk3399_defconfig | 8 +- drivers/video/rockchip/Makefile | 3 +- drivers/video/rockchip/rk3399_mipi.c | 183 +++++++++++++++++++++++++++++++++++ drivers/video/rockchip/rk_mipi.c | 170 ++------------------------------ drivers/video/rockchip/rk_mipi.h | 32 ++++++ 5 files changed, 226 insertions(+), 170 deletions(-) create mode 100644 drivers/video/rockchip/rk3399_mipi.c create mode 100644 drivers/video/rockchip/rk_mipi.h

The mipi panel used on evb-rk3399 has a 1920x1200 resolution. But now the max resolution is 1920x1080. So increase it.
Signed-off-by: Eric Gao eric.gao@rock-chips.com
---
Changes in v2: None Changes in v1: -Add title.
configs/evb-rk3399_defconfig | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index c189e75..1b30f24 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ROCKCHIP_RK3399=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" +CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_DISPLAY_CPUINFO is not set @@ -23,6 +24,7 @@ CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_OF_PLATDATA=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -34,12 +36,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_DM_PMIC=y -CONFIG_PMIC_RK808=y -CONFIG_REGULATOR_RK808=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y @@ -53,7 +51,6 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 -CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 @@ -68,6 +65,7 @@ CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200 CONFIG_DISPLAY_ROCKCHIP_MIPI=y CONFIG_USE_TINY_PRINTF=y CONFIG_ERRNO_STR=y

The mipi panel used on evb-rk3399 has a 1920x1200 resolution. But now the max resolution is 1920x1080. So increase it.
Signed-off-by: Eric Gao eric.gao@rock-chips.com
Changes in v2: None Changes in v1: -Add title.
configs/evb-rk3399_defconfig | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com

Hi Eric,
On Wed, 21 Jun 2017 11:20:32 +0800 Eric Gao eric.gao@rock-chips.com wrote:
The mipi panel used on evb-rk3399 has a 1920x1200 resolution. But now the max resolution is 1920x1080. So increase it.
Signed-off-by: Eric Gao eric.gao@rock-chips.com
Changes in v2: None Changes in v1: -Add title.
configs/evb-rk3399_defconfig | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)
Applied to u-boot-video/master after dropping already committed hunks.
Thanks!
-- Anatolij

To compatible with different rockchip soc, we split the mipi dirver into common and soc specific parts, and all the soc share the common functions from common driver part.
Signed-off-by: Eric Gao eric.gao@rock-chips.com
---
Changes in v2: -Use dev_read_addr to replace devfdt_get_addr.
Changes in v1: -Delete the unused variable.
drivers/video/rockchip/rk3399_mipi.c | 183 +++++++++++++++++++++++++++++++++++ drivers/video/rockchip/rk_mipi.c | 170 ++------------------------------ drivers/video/rockchip/rk_mipi.h | 32 ++++++ 3 files changed, 221 insertions(+), 164 deletions(-) create mode 100644 drivers/video/rockchip/rk3399_mipi.c create mode 100644 drivers/video/rockchip/rk_mipi.h
diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c new file mode 100644 index 0000000..c1690bd --- /dev/null +++ b/drivers/video/rockchip/rk3399_mipi.c @@ -0,0 +1,183 @@ +/* + * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd + * Author: Eric Gao eric.gao@rock-chips.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <clk.h> +#include <display.h> +#include <dm.h> +#include <fdtdec.h> +#include <panel.h> +#include <regmap.h> +#include "rk_mipi.h" +#include <syscon.h> +#include <asm/gpio.h> +#include <asm/hardware.h> +#include <asm/io.h> +#include <dm/uclass-internal.h> +#include <linux/kernel.h> +#include <asm/arch/clock.h> +#include <asm/arch/cru_rk3399.h> +#include <asm/arch/grf_rk3399.h> +#include <asm/arch/rockchip_mipi_dsi.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Select mipi dsi source, big or little vop */ +static int rk_mipi_dsi_source_select(struct udevice *dev) +{ + struct rk_mipi_priv *priv = dev_get_priv(dev); + struct rk3399_grf_regs *grf = priv->grf; + struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev); + + /* Select the video source */ + switch (disp_uc_plat->source_id) { + case VOP_B: + rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, + GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT); + break; + case VOP_L: + rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, + GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT); + break; + default: + debug("%s: Invalid VOP id\n", __func__); + return -EINVAL; + } + + return 0; +} + +/* Setup mipi dphy working mode */ +static void rk_mipi_dphy_mode_set(struct udevice *dev) +{ + struct rk_mipi_priv *priv = dev_get_priv(dev); + struct rk3399_grf_regs *grf = priv->grf; + int val; + + /* Set Controller as TX mode */ + val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT; + rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); + + /* Exit tx stop mode */ + val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT; + rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); + + /* Disable turnequest */ + val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT; + rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); +} + +/* + * This function is called by rk_display_init() using rk_mipi_dsi_enable() and + * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success, + * enable backlight. + */ +static int rk_display_enable(struct udevice *dev, int panel_bpp, + const struct display_timing *timing) +{ + int ret; + struct rk_mipi_priv *priv = dev_get_priv(dev); + + /* Fill the mipi controller parameter */ + priv->ref_clk = 24 * MHz; + priv->sys_clk = priv->ref_clk; + priv->pix_clk = timing->pixelclock.typ; + priv->phy_clk = priv->pix_clk * 6; + priv->txbyte_clk = priv->phy_clk / 8; + priv->txesc_clk = 20 * MHz; + + /* Select vop port, big or little */ + rk_mipi_dsi_source_select(dev); + + /* Set mipi dphy work mode */ + rk_mipi_dphy_mode_set(dev); + + /* Config and enable mipi dsi according to timing */ + ret = rk_mipi_dsi_enable(dev, timing); + if (ret) { + debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n", + __func__, ret); + return ret; + } + + /* Config and enable mipi phy */ + ret = rk_mipi_phy_enable(dev); + if (ret) { + debug("%s: rk_mipi_phy_enable() failed (err=%d)\n", + __func__, ret); + return ret; + } + + /* Enable backlight */ + ret = panel_enable_backlight(priv->panel); + if (ret) { + debug("%s: panel_enable_backlight() failed (err=%d)\n", + __func__, ret); + return ret; + } + + return 0; +} + +static int rk_mipi_ofdata_to_platdata(struct udevice *dev) +{ + struct rk_mipi_priv *priv = dev_get_priv(dev); + + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (priv->grf <= 0) { + debug("%s: Get syscon grf failed (ret=%p)\n", + __func__, priv->grf); + return -ENXIO; + } + priv->regs = dev_read_addr(dev); + if (priv->regs <= 0) { + debug("%s: Get MIPI dsi address failed (ret=%lu)\n", __func__, + priv->regs); + return -ENXIO; + } + + return 0; +} + +/* + * Probe function: check panel existence and readingit's timing. Then config + * mipi dsi controller and enable it according to the timing parameter. + */ +static int rk_mipi_probe(struct udevice *dev) +{ + int ret; + struct rk_mipi_priv *priv = dev_get_priv(dev); + + ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel", + &priv->panel); + if (ret) { + debug("%s: Can not find panel (err=%d)\n", __func__, ret); + return ret; + } + + return 0; +} + +static const struct dm_display_ops rk_mipi_dsi_ops = { + .read_timing = rk_mipi_read_timing, + .enable = rk_display_enable, +}; + +static const struct udevice_id rk_mipi_dsi_ids[] = { + { .compatible = "rockchip,rk3399_mipi_dsi" }, + { } +}; + +U_BOOT_DRIVER(rk_mipi_dsi) = { + .name = "rk_mipi_dsi", + .id = UCLASS_DISPLAY, + .of_match = rk_mipi_dsi_ids, + .ofdata_to_platdata = rk_mipi_ofdata_to_platdata, + .probe = rk_mipi_probe, + .ops = &rk_mipi_dsi_ops, + .priv_auto_alloc_size = sizeof(struct rk_mipi_priv), +}; diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c index 1199a30..d537755 100644 --- a/drivers/video/rockchip/rk_mipi.c +++ b/drivers/video/rockchip/rk_mipi.c @@ -12,6 +12,7 @@ #include <fdtdec.h> #include <panel.h> #include <regmap.h> +#include "rk_mipi.h" #include <syscon.h> #include <asm/gpio.h> #include <asm/hardware.h> @@ -22,38 +23,11 @@ #include <asm/arch/cru_rk3399.h> #include <asm/arch/grf_rk3399.h> #include <asm/arch/rockchip_mipi_dsi.h> -#include <dt-bindings/clock/rk3288-cru.h>
DECLARE_GLOBAL_DATA_PTR;
-/* - * Private information for rk mipi - * - * @regs: mipi controller address - * @grf: GRF register - * @panel: panel assined by device tree - * @ref_clk: reference clock for mipi dsi pll - * @sysclk: config clock for mipi dsi register - * @pix_clk: pixel clock for vop->dsi data transmission - * @phy_clk: mipi dphy output clock - * @txbyte_clk: clock for dsi->dphy high speed data transmission - * @txesc_clk: clock for tx esc mode - */ -struct rk_mipi_priv { - uintptr_t regs; - struct rk3399_grf_regs *grf; - struct udevice *panel; - struct mipi_dsi *dsi; - u32 ref_clk; - u32 sys_clk; - u32 pix_clk; - u32 phy_clk; - u32 txbyte_clk; - u32 txesc_clk; -}; - -static int rk_mipi_read_timing(struct udevice *dev, - struct display_timing *timing) +int rk_mipi_read_timing(struct udevice *dev, + struct display_timing *timing) { int ret;
@@ -102,46 +76,18 @@ static void rk_mipi_dsi_write(uintptr_t regs, u32 reg, u32 val) writel(dat, addr); }
-static int rk_mipi_dsi_enable(struct udevice *dev, - const struct display_timing *timing) +int rk_mipi_dsi_enable(struct udevice *dev, + const struct display_timing *timing) { int node, timing_node; int val; struct rk_mipi_priv *priv = dev_get_priv(dev); uintptr_t regs = priv->regs; - struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev); u32 txbyte_clk = priv->txbyte_clk; u32 txesc_clk = priv->txesc_clk;
txesc_clk = txbyte_clk/(txbyte_clk/txesc_clk + 1);
- /* Select the video source */ - switch (disp_uc_plat->source_id) { - case VOP_B: - rk_clrsetreg(&priv->grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, - GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT); - break; - case VOP_L: - rk_clrsetreg(&priv->grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, - GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT); - break; - default: - debug("%s: Invalid VOP id\n", __func__); - return -EINVAL; - } - - /* Set Controller as TX mode */ - val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT; - rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); - - /* Exit tx stop mode */ - val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT; - rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); - - /* Disable turnequest */ - val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT; - rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); - /* Set Display timing parameter */ rk_mipi_dsi_write(regs, VID_HSA_TIME, timing->hsync_len.typ); rk_mipi_dsi_write(regs, VID_HBP_TIME, timing->hback_porch.typ); @@ -249,7 +195,7 @@ static void rk_mipi_phy_write(uintptr_t regs, unsigned char test_code, * fsfreqrang value ,cap ,lpf and so on according to the given pix clk rate, * and then enable phy. */ -static int rk_mipi_phy_enable(struct udevice *dev) +int rk_mipi_phy_enable(struct udevice *dev) { int i; struct rk_mipi_priv *priv = dev_get_priv(dev); @@ -385,107 +331,3 @@ static int rk_mipi_phy_enable(struct udevice *dev) return 0; }
-/* - * This function is called by rk_display_init() using rk_mipi_dsi_enable() and - * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success, - * enable backlight. - */ -static int rk_display_enable(struct udevice *dev, int panel_bpp, - const struct display_timing *timing) -{ - int ret; - struct rk_mipi_priv *priv = dev_get_priv(dev); - - /* Fill the mipi controller parameter */ - priv->ref_clk = 24 * MHz; - priv->sys_clk = priv->ref_clk; - priv->pix_clk = timing->pixelclock.typ; - priv->phy_clk = priv->pix_clk * 6; - priv->txbyte_clk = priv->phy_clk / 8; - priv->txesc_clk = 20 * MHz; - - /* Config and enable mipi dsi according to timing */ - ret = rk_mipi_dsi_enable(dev, timing); - if (ret) { - debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n", - __func__, ret); - return ret; - } - - /* Config and enable mipi phy */ - ret = rk_mipi_phy_enable(dev); - if (ret) { - debug("%s: rk_mipi_phy_enable() failed (err=%d)\n", - __func__, ret); - return ret; - } - - /* Enable backlight */ - ret = panel_enable_backlight(priv->panel); - if (ret) { - debug("%s: panel_enable_backlight() failed (err=%d)\n", - __func__, ret); - return ret; - } - - return 0; -} - -static int rk_mipi_ofdata_to_platdata(struct udevice *dev) -{ - struct rk_mipi_priv *priv = dev_get_priv(dev); - - priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); - if (priv->grf <= 0) { - debug("%s: Get syscon grf failed (ret=%p)\n", - __func__, priv->grf); - return -ENXIO; - } - priv->regs = devfdt_get_addr(dev); - if (priv->regs <= 0) { - debug("%s: Get MIPI dsi address failed (ret=%lu)\n", __func__, - priv->regs); - return -ENXIO; - } - - return 0; -} - -/* - * Probe function: check panel existence and readingit's timing. Then config - * mipi dsi controller and enable it according to the timing parameter. - */ -static int rk_mipi_probe(struct udevice *dev) -{ - int ret; - struct rk_mipi_priv *priv = dev_get_priv(dev); - - ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel", - &priv->panel); - if (ret) { - debug("%s: Can not find panel (err=%d)\n", __func__, ret); - return ret; - } - - return 0; -} - -static const struct dm_display_ops rk_mipi_dsi_ops = { - .read_timing = rk_mipi_read_timing, - .enable = rk_display_enable, -}; - -static const struct udevice_id rk_mipi_dsi_ids[] = { - { .compatible = "rockchip,rk3399_mipi_dsi" }, - { } -}; - -U_BOOT_DRIVER(rk_mipi_dsi) = { - .name = "rk_mipi_dsi", - .id = UCLASS_DISPLAY, - .of_match = rk_mipi_dsi_ids, - .ofdata_to_platdata = rk_mipi_ofdata_to_platdata, - .probe = rk_mipi_probe, - .ops = &rk_mipi_dsi_ops, - .priv_auto_alloc_size = sizeof(struct rk_mipi_priv), -}; diff --git a/drivers/video/rockchip/rk_mipi.h b/drivers/video/rockchip/rk_mipi.h new file mode 100644 index 0000000..906aaaa --- /dev/null +++ b/drivers/video/rockchip/rk_mipi.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd + * Author: Eric Gao eric.gao@rock-chips.com + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __RK_MIPI_H +#define __RK_MIPI_H + +struct rk_mipi_priv { + void __iomem *regs; + void *grf; + struct udevice *panel; + struct mipi_dsi *dsi; + u32 ref_clk; + u32 sys_clk; + u32 pix_clk; + u32 phy_clk; + u32 txbyte_clk; + u32 txesc_clk; +}; + +int rk_mipi_read_timing(struct udevice *dev, + struct display_timing *timing); + +int rk_mipi_dsi_enable(struct udevice *dev, + const struct display_timing *timing); + +int rk_mipi_phy_enable(struct udevice *dev); + + +#endif

To compatible with different rockchip soc, we split the mipi dirver into common and soc specific parts, and all the soc share the common functions from common driver part.
Signed-off-by: Eric Gao eric.gao@rock-chips.com
Changes in v2: -Use dev_read_addr to replace devfdt_get_addr.
Changes in v1: -Delete the unused variable.
drivers/video/rockchip/rk3399_mipi.c | 183 +++++++++++++++++++++++++++++++++++ drivers/video/rockchip/rk_mipi.c | 170 ++------------------------------ drivers/video/rockchip/rk_mipi.h | 32 ++++++ 3 files changed, 221 insertions(+), 164 deletions(-) create mode 100644 drivers/video/rockchip/rk3399_mipi.c create mode 100644 drivers/video/rockchip/rk_mipi.h
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com

On Wed, 21 Jun 2017 11:20:33 +0800 Eric Gao eric.gao@rock-chips.com wrote:
To compatible with different rockchip soc, we split the mipi dirver into common and soc specific parts, and all the soc share the common functions from common driver part.
Signed-off-by: Eric Gao eric.gao@rock-chips.com
Changes in v2: -Use dev_read_addr to replace devfdt_get_addr.
Changes in v1: -Delete the unused variable.
drivers/video/rockchip/rk3399_mipi.c | 183 +++++++++++++++++++++++++++++++++++ drivers/video/rockchip/rk_mipi.c | 170 ++------------------------------ drivers/video/rockchip/rk_mipi.h | 32 ++++++ 3 files changed, 221 insertions(+), 164 deletions(-) create mode 100644 drivers/video/rockchip/rk3399_mipi.c create mode 100644 drivers/video/rockchip/rk_mipi.h
Applied to u-boot-video/master, thanks!
-- Anatolij

From: "eric.gao@rock-chips.com" eric.gao@rock-chips.com
To compatible with different rockchip soc, we split the mipi dirver into common and soc specific parts, and all the soc share the common functions from common driver part.
Signed-off-by: Eric Gao eric.gao@rock-chips.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com [agust: fix build breakage and warnings] Signed-off-by: Anatolij Gustschin agust@denx.de --- drivers/video/rockchip/rk3399_mipi.c | 182 +++++++++++++++++++++++++++++++++++ drivers/video/rockchip/rk_mipi.c | 170 ++------------------------------ drivers/video/rockchip/rk_mipi.h | 32 ++++++ 3 files changed, 220 insertions(+), 164 deletions(-) create mode 100644 drivers/video/rockchip/rk3399_mipi.c create mode 100644 drivers/video/rockchip/rk_mipi.h
Changes in v4: - fix build warnings: drivers/video/rockchip/rk_mipi.c: In function ?rk_mipi_dsi_enable?: drivers/video/rockchip/rk_mipi.c:85:19: warning: initialization makes integer from pointer without a cast [-Wint-conversion] drivers/video/rockchip/rk_mipi.c: In function ?rk_mipi_phy_enable?: drivers/video/rockchip/rk_mipi.c:202:19: warning: initialization makes integer from pointer without a cast [-Wint-conversion] ... drivers/video/rockchip/rk3399_mipi.c: In function ‘rk_mipi_ofdata_to_platdata’: drivers/video/rockchip/rk3399_mipi.c:136:13: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
- fix build breakage in debug();
diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c new file mode 100644 index 0000000..9ef202b --- /dev/null +++ b/drivers/video/rockchip/rk3399_mipi.c @@ -0,0 +1,182 @@ +/* + * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd + * Author: Eric Gao eric.gao@rock-chips.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <clk.h> +#include <display.h> +#include <dm.h> +#include <fdtdec.h> +#include <panel.h> +#include <regmap.h> +#include "rk_mipi.h" +#include <syscon.h> +#include <asm/gpio.h> +#include <asm/hardware.h> +#include <asm/io.h> +#include <dm/uclass-internal.h> +#include <linux/kernel.h> +#include <asm/arch/clock.h> +#include <asm/arch/cru_rk3399.h> +#include <asm/arch/grf_rk3399.h> +#include <asm/arch/rockchip_mipi_dsi.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Select mipi dsi source, big or little vop */ +static int rk_mipi_dsi_source_select(struct udevice *dev) +{ + struct rk_mipi_priv *priv = dev_get_priv(dev); + struct rk3399_grf_regs *grf = priv->grf; + struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev); + + /* Select the video source */ + switch (disp_uc_plat->source_id) { + case VOP_B: + rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, + GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT); + break; + case VOP_L: + rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, + GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT); + break; + default: + debug("%s: Invalid VOP id\n", __func__); + return -EINVAL; + } + + return 0; +} + +/* Setup mipi dphy working mode */ +static void rk_mipi_dphy_mode_set(struct udevice *dev) +{ + struct rk_mipi_priv *priv = dev_get_priv(dev); + struct rk3399_grf_regs *grf = priv->grf; + int val; + + /* Set Controller as TX mode */ + val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT; + rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); + + /* Exit tx stop mode */ + val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT; + rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); + + /* Disable turnequest */ + val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT; + rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); +} + +/* + * This function is called by rk_display_init() using rk_mipi_dsi_enable() and + * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success, + * enable backlight. + */ +static int rk_display_enable(struct udevice *dev, int panel_bpp, + const struct display_timing *timing) +{ + int ret; + struct rk_mipi_priv *priv = dev_get_priv(dev); + + /* Fill the mipi controller parameter */ + priv->ref_clk = 24 * MHz; + priv->sys_clk = priv->ref_clk; + priv->pix_clk = timing->pixelclock.typ; + priv->phy_clk = priv->pix_clk * 6; + priv->txbyte_clk = priv->phy_clk / 8; + priv->txesc_clk = 20 * MHz; + + /* Select vop port, big or little */ + rk_mipi_dsi_source_select(dev); + + /* Set mipi dphy work mode */ + rk_mipi_dphy_mode_set(dev); + + /* Config and enable mipi dsi according to timing */ + ret = rk_mipi_dsi_enable(dev, timing); + if (ret) { + debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n", + __func__, ret); + return ret; + } + + /* Config and enable mipi phy */ + ret = rk_mipi_phy_enable(dev); + if (ret) { + debug("%s: rk_mipi_phy_enable() failed (err=%d)\n", + __func__, ret); + return ret; + } + + /* Enable backlight */ + ret = panel_enable_backlight(priv->panel); + if (ret) { + debug("%s: panel_enable_backlight() failed (err=%d)\n", + __func__, ret); + return ret; + } + + return 0; +} + +static int rk_mipi_ofdata_to_platdata(struct udevice *dev) +{ + struct rk_mipi_priv *priv = dev_get_priv(dev); + + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (priv->grf <= 0) { + debug("%s: Get syscon grf failed (ret=%p)\n", + __func__, priv->grf); + return -ENXIO; + } + priv->regs = dev_read_addr(dev); + if (priv->regs == FDT_ADDR_T_NONE) { + debug("%s: Get MIPI dsi address failed\n", __func__); + return -ENXIO; + } + + return 0; +} + +/* + * Probe function: check panel existence and readingit's timing. Then config + * mipi dsi controller and enable it according to the timing parameter. + */ +static int rk_mipi_probe(struct udevice *dev) +{ + int ret; + struct rk_mipi_priv *priv = dev_get_priv(dev); + + ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel", + &priv->panel); + if (ret) { + debug("%s: Can not find panel (err=%d)\n", __func__, ret); + return ret; + } + + return 0; +} + +static const struct dm_display_ops rk_mipi_dsi_ops = { + .read_timing = rk_mipi_read_timing, + .enable = rk_display_enable, +}; + +static const struct udevice_id rk_mipi_dsi_ids[] = { + { .compatible = "rockchip,rk3399_mipi_dsi" }, + { } +}; + +U_BOOT_DRIVER(rk_mipi_dsi) = { + .name = "rk_mipi_dsi", + .id = UCLASS_DISPLAY, + .of_match = rk_mipi_dsi_ids, + .ofdata_to_platdata = rk_mipi_ofdata_to_platdata, + .probe = rk_mipi_probe, + .ops = &rk_mipi_dsi_ops, + .priv_auto_alloc_size = sizeof(struct rk_mipi_priv), +}; diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c index 1199a30..d537755 100644 --- a/drivers/video/rockchip/rk_mipi.c +++ b/drivers/video/rockchip/rk_mipi.c @@ -12,6 +12,7 @@ #include <fdtdec.h> #include <panel.h> #include <regmap.h> +#include "rk_mipi.h" #include <syscon.h> #include <asm/gpio.h> #include <asm/hardware.h> @@ -22,38 +23,11 @@ #include <asm/arch/cru_rk3399.h> #include <asm/arch/grf_rk3399.h> #include <asm/arch/rockchip_mipi_dsi.h> -#include <dt-bindings/clock/rk3288-cru.h>
DECLARE_GLOBAL_DATA_PTR;
-/* - * Private information for rk mipi - * - * @regs: mipi controller address - * @grf: GRF register - * @panel: panel assined by device tree - * @ref_clk: reference clock for mipi dsi pll - * @sysclk: config clock for mipi dsi register - * @pix_clk: pixel clock for vop->dsi data transmission - * @phy_clk: mipi dphy output clock - * @txbyte_clk: clock for dsi->dphy high speed data transmission - * @txesc_clk: clock for tx esc mode - */ -struct rk_mipi_priv { - uintptr_t regs; - struct rk3399_grf_regs *grf; - struct udevice *panel; - struct mipi_dsi *dsi; - u32 ref_clk; - u32 sys_clk; - u32 pix_clk; - u32 phy_clk; - u32 txbyte_clk; - u32 txesc_clk; -}; - -static int rk_mipi_read_timing(struct udevice *dev, - struct display_timing *timing) +int rk_mipi_read_timing(struct udevice *dev, + struct display_timing *timing) { int ret;
@@ -102,46 +76,18 @@ static void rk_mipi_dsi_write(uintptr_t regs, u32 reg, u32 val) writel(dat, addr); }
-static int rk_mipi_dsi_enable(struct udevice *dev, - const struct display_timing *timing) +int rk_mipi_dsi_enable(struct udevice *dev, + const struct display_timing *timing) { int node, timing_node; int val; struct rk_mipi_priv *priv = dev_get_priv(dev); uintptr_t regs = priv->regs; - struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev); u32 txbyte_clk = priv->txbyte_clk; u32 txesc_clk = priv->txesc_clk;
txesc_clk = txbyte_clk/(txbyte_clk/txesc_clk + 1);
- /* Select the video source */ - switch (disp_uc_plat->source_id) { - case VOP_B: - rk_clrsetreg(&priv->grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, - GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT); - break; - case VOP_L: - rk_clrsetreg(&priv->grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, - GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT); - break; - default: - debug("%s: Invalid VOP id\n", __func__); - return -EINVAL; - } - - /* Set Controller as TX mode */ - val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT; - rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); - - /* Exit tx stop mode */ - val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT; - rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); - - /* Disable turnequest */ - val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT; - rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); - /* Set Display timing parameter */ rk_mipi_dsi_write(regs, VID_HSA_TIME, timing->hsync_len.typ); rk_mipi_dsi_write(regs, VID_HBP_TIME, timing->hback_porch.typ); @@ -249,7 +195,7 @@ static void rk_mipi_phy_write(uintptr_t regs, unsigned char test_code, * fsfreqrang value ,cap ,lpf and so on according to the given pix clk rate, * and then enable phy. */ -static int rk_mipi_phy_enable(struct udevice *dev) +int rk_mipi_phy_enable(struct udevice *dev) { int i; struct rk_mipi_priv *priv = dev_get_priv(dev); @@ -385,107 +331,3 @@ static int rk_mipi_phy_enable(struct udevice *dev) return 0; }
-/* - * This function is called by rk_display_init() using rk_mipi_dsi_enable() and - * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success, - * enable backlight. - */ -static int rk_display_enable(struct udevice *dev, int panel_bpp, - const struct display_timing *timing) -{ - int ret; - struct rk_mipi_priv *priv = dev_get_priv(dev); - - /* Fill the mipi controller parameter */ - priv->ref_clk = 24 * MHz; - priv->sys_clk = priv->ref_clk; - priv->pix_clk = timing->pixelclock.typ; - priv->phy_clk = priv->pix_clk * 6; - priv->txbyte_clk = priv->phy_clk / 8; - priv->txesc_clk = 20 * MHz; - - /* Config and enable mipi dsi according to timing */ - ret = rk_mipi_dsi_enable(dev, timing); - if (ret) { - debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n", - __func__, ret); - return ret; - } - - /* Config and enable mipi phy */ - ret = rk_mipi_phy_enable(dev); - if (ret) { - debug("%s: rk_mipi_phy_enable() failed (err=%d)\n", - __func__, ret); - return ret; - } - - /* Enable backlight */ - ret = panel_enable_backlight(priv->panel); - if (ret) { - debug("%s: panel_enable_backlight() failed (err=%d)\n", - __func__, ret); - return ret; - } - - return 0; -} - -static int rk_mipi_ofdata_to_platdata(struct udevice *dev) -{ - struct rk_mipi_priv *priv = dev_get_priv(dev); - - priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); - if (priv->grf <= 0) { - debug("%s: Get syscon grf failed (ret=%p)\n", - __func__, priv->grf); - return -ENXIO; - } - priv->regs = devfdt_get_addr(dev); - if (priv->regs <= 0) { - debug("%s: Get MIPI dsi address failed (ret=%lu)\n", __func__, - priv->regs); - return -ENXIO; - } - - return 0; -} - -/* - * Probe function: check panel existence and readingit's timing. Then config - * mipi dsi controller and enable it according to the timing parameter. - */ -static int rk_mipi_probe(struct udevice *dev) -{ - int ret; - struct rk_mipi_priv *priv = dev_get_priv(dev); - - ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel", - &priv->panel); - if (ret) { - debug("%s: Can not find panel (err=%d)\n", __func__, ret); - return ret; - } - - return 0; -} - -static const struct dm_display_ops rk_mipi_dsi_ops = { - .read_timing = rk_mipi_read_timing, - .enable = rk_display_enable, -}; - -static const struct udevice_id rk_mipi_dsi_ids[] = { - { .compatible = "rockchip,rk3399_mipi_dsi" }, - { } -}; - -U_BOOT_DRIVER(rk_mipi_dsi) = { - .name = "rk_mipi_dsi", - .id = UCLASS_DISPLAY, - .of_match = rk_mipi_dsi_ids, - .ofdata_to_platdata = rk_mipi_ofdata_to_platdata, - .probe = rk_mipi_probe, - .ops = &rk_mipi_dsi_ops, - .priv_auto_alloc_size = sizeof(struct rk_mipi_priv), -}; diff --git a/drivers/video/rockchip/rk_mipi.h b/drivers/video/rockchip/rk_mipi.h new file mode 100644 index 0000000..d8a7b80 --- /dev/null +++ b/drivers/video/rockchip/rk_mipi.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd + * Author: Eric Gao eric.gao@rock-chips.com + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __RK_MIPI_H +#define __RK_MIPI_H + +struct rk_mipi_priv { + ulong regs; + void *grf; + struct udevice *panel; + struct mipi_dsi *dsi; + u32 ref_clk; + u32 sys_clk; + u32 pix_clk; + u32 phy_clk; + u32 txbyte_clk; + u32 txesc_clk; +}; + +int rk_mipi_read_timing(struct udevice *dev, + struct display_timing *timing); + +int rk_mipi_dsi_enable(struct udevice *dev, + const struct display_timing *timing); + +int rk_mipi_phy_enable(struct udevice *dev); + + +#endif

On Mon, 7 Aug 2017 20:59:26 +0200 Anatolij Gustschin agust@denx.de wrote:
From: "eric.gao@rock-chips.com" eric.gao@rock-chips.com
To compatible with different rockchip soc, we split the mipi dirver into common and soc specific parts, and all the soc share the common functions from common driver part.
Signed-off-by: Eric Gao eric.gao@rock-chips.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com [agust: fix build breakage and warnings] Signed-off-by: Anatolij Gustschin agust@denx.de
drivers/video/rockchip/rk3399_mipi.c | 182 +++++++++++++++++++++++++++++++++++ drivers/video/rockchip/rk_mipi.c | 170 ++------------------------------ drivers/video/rockchip/rk_mipi.h | 32 ++++++ 3 files changed, 220 insertions(+), 164 deletions(-) create mode 100644 drivers/video/rockchip/rk3399_mipi.c create mode 100644 drivers/video/rockchip/rk_mipi.h
Applied to u-boot-video/master.
-- Anatolij

Add Makefile item for soc specific driver for rk3399 mipi dsi.
Signed-off-by: Eric Gao eric.gao@rock-chips.com ---
Changes in v2: None Changes in v1: None
drivers/video/rockchip/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index 872dc0f..600743c 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -14,5 +14,6 @@ obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o obj-hdmi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_hdmi.o obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y) -obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o +obj-mipi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_mipi.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o $(obj-mipi-y) endif

Add Makefile item for soc specific driver for rk3399 mipi dsi.
Signed-off-by: Eric Gao eric.gao@rock-chips.com
Changes in v2: None Changes in v1: None
drivers/video/rockchip/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com

Add Makefile item for soc specific driver for rk3399 mipi dsi.
Signed-off-by: Eric Gao eric.gao@rock-chips.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v2: None Changes in v1: None
drivers/video/rockchip/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com

On Wed, 21 Jun 2017 11:20:34 +0800 Eric Gao eric.gao@rock-chips.com wrote:
Add Makefile item for soc specific driver for rk3399 mipi dsi.
Signed-off-by: Eric Gao eric.gao@rock-chips.com
Changes in v2: None Changes in v1: None
drivers/video/rockchip/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Applied to u-boot-video/master, thanks!
-- Anatolij
participants (3)
-
Anatolij Gustschin
-
Eric Gao
-
Philipp Tomsich