[PATCH 00/16] xilinx: DT sync up

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[PATCH] ARM: zynq: Fix addresses...

Michal Simek

18 Feb 2020 18 Feb '20

1:20 p.m.

Hi,

I am sending these patches based on Xilinx SoC vendor tree. There are also fixes found based on Linux yaml parser. Patches with link to Linux mainline patches should be marked properly.

Thanks, Michal

Amit Kumar Mahapatra (1): arm64: zynqmp: Do not duplicate flash partition label property

Ashok Reddy Soma (1): arm64: dts: zynqmp: Add clk cells for sdhci

Manish Narani (1): arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards

Michal Simek (10): arm64: zynqmp: Replace gpio-key,wakeup with wakeup source arm64: zynqmp: Update Copyright years to 2020 ARM: zynq: Fix spi name node arm64: zynqmp: Remove unused zynqmp-clk.dtsi arm64: zynqmp: Remove second copy of reset-controller arm64: zynqmp: Sync DP subsystem arm64: zynqmp: Fix addresses in partition definitions arm64: zynqmp: Fix GIC compatible property arm64: zynqmp: Change bus naming to axi arm64: zynqmp: Move pinctrl node under firmware node

Nava kishore Manne (1): arm64: zynqmp: Sync zynqmp fpga manager with mainline

Quanyang Wang (1): ARM: dts: zc702: Fix I2C bus warnings

Sudeep Holla (1): ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property

arch/arm/dts/avnet-ultra96-rev1.dts | 2 +- arch/arm/dts/zynq-zc702.dts | 12 +- arch/arm/dts/zynq-zc770-xm010.dts | 2 +- arch/arm/dts/zynq-zc770-xm013.dts | 2 +- arch/arm/dts/zynq-zturn.dts | 2 +- arch/arm/dts/zynqmp-clk-ccf.dtsi | 12 +- arch/arm/dts/zynqmp-clk.dtsi | 244 ----------------------- arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- arch/arm/dts/zynqmp-zc1232-revA.dts | 10 +- arch/arm/dts/zynqmp-zc1254-revA.dts | 10 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 34 ++-- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 6 +- arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 12 +- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 2 +- arch/arm/dts/zynqmp-zcu100-revC.dts | 2 +- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 6 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 36 ++-- arch/arm/dts/zynqmp-zcu102-revB.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revA.dts | 10 +- arch/arm/dts/zynqmp-zcu104-revC.dts | 10 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 14 +- arch/arm/dts/zynqmp-zcu111-revA.dts | 14 +- arch/arm/dts/zynqmp-zcu1275-revA.dts | 10 +- arch/arm/dts/zynqmp-zcu1275-revB.dts | 10 +- arch/arm/dts/zynqmp-zcu1285-revA.dts | 6 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 8 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 8 +- arch/arm/dts/zynqmp.dtsi | 176 +++++++--------- 29 files changed, 206 insertions(+), 460 deletions(-) delete mode 100644 arch/arm/dts/zynqmp-clk.dtsi

-- 2.25.0

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Michal Simek

18 Feb 18 Feb

1:20 p.m.

New subject: [PATCH 01/16] ARM: dts: zc702: Fix I2C bus warnings

From: Quanyang Wang quanyang.wang@windriver.com

The dtc has new checks for I2C and SPI buses. Fix the warnings in node names and unit-addresses.

Warning from Linux kernel: arch/arm/boot/dts/zynq-zc702.dts:187.13-190.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@52: I2C bus unit address format error, expected "34" arch/arm/boot/dts/zynq-zc702.dts:191.13-194.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@53: I2C bus unit address format error, expected "35" arch/arm/boot/dts/zynq-zc702.dts:195.13-198.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@54: I2C bus unit address format error, expected "36"

Signed-off-by: Quanyang Wang quanyang.wang@windriver.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynq-zc702.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index d10695740fa9..b043d341d680 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -181,17 +181,17 @@ #address-cells = <1>; #size-cells = <0>; reg = <7>; - hwmon@52 { + hwmon@34 { compatible = "ti,ucd9248"; - reg = <52>; + reg = <0x34>; }; - hwmon@53 { + hwmon@35 { compatible = "ti,ucd9248"; - reg = <53>; + reg = <0x35>; }; - hwmon@54 { + hwmon@36 { compatible = "ti,ucd9248"; - reg = <54>; + reg = <0x36>; }; }; };

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 02/16] ARM: dts: zynq: replace gpio-key, wakeup with wakeup-source property

From: Sudeep Holla sudeep.holla@arm.com

Most of the legacy "gpio-key,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees.

Replace the legacy properties with the unified "wakeup-source" property introduced in the Linux kernel commit 700a38b27eef ("Input: gpio_keys - switch to using generic device properties")

Cc: Michal Simek michal.simek@xilinx.com Signed-off-by: Sudeep Holla sudeep.holla@arm.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynq-zturn.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynq-zturn.dts b/arch/arm/dts/zynq-zturn.dts index cc41efcb4631..600e8ee0255c 100644 --- a/arch/arm/dts/zynq-zturn.dts +++ b/arch/arm/dts/zynq-zturn.dts @@ -54,7 +54,7 @@ label = "K1"; gpios = <&gpio0 0x32 0x1>; linux,code = <0x66>; - gpio-key,wakeup; + wakeup-source; autorepeat; }; };

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 03/16] arm64: zynqmp: Replace gpio-key, wakeup with wakeup source

The same change has been done for Zynq by commit 1241c72b6db1 ("ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property") in mainline Linux kernel.

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp-zcu208-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 9181060b893a..85f9e1f62850 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -50,7 +50,7 @@ label = "sw19"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; linux,code = <KEY_DOWN>; - gpio-key,wakeup; + wakeup-source; autorepeat; }; }; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index c294e1b51a22..2db546fddd2c 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -50,7 +50,7 @@ label = "sw19"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; linux,code = <KEY_DOWN>; - gpio-key,wakeup; + wakeup-source; autorepeat; }; };

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 04/16] arm64: zynqmp: Update Copyright years to 2020

Trivial change.

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

diff --git a/arch/arm/dts/avnet-ultra96-rev1.dts b/arch/arm/dts/avnet-ultra96-rev1.dts index 88aa06fa78a8..ddb8febaece1 100644 --- a/arch/arm/dts/avnet-ultra96-rev1.dts +++ b/arch/arm/dts/avnet-ultra96-rev1.dts @@ -2,7 +2,7 @@ /* * dts file for Avnet Ultra96 rev1 * - * (C) Copyright 2018, Xilinx, Inc. + * (C) Copyright 2018 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 8eacd22d7cda..1098e890192c 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -2,7 +2,7 @@ /* * Clock specification for Xilinx ZynqMP * - * (C) Copyright 2017 - 2019, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi index c9464ec8eb27..82eac56c9d93 100644 --- a/arch/arm/dts/zynqmp-clk.dtsi +++ b/arch/arm/dts/zynqmp-clk.dtsi @@ -2,7 +2,7 @@ /* * Clock specification for Xilinx ZynqMP * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index e4ba5ae9b683..c523e8123666 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP Mini Configuration * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Siva Durga Prasad siva.durga.paladugu@xilinx.com * Michal Simek michal.simek@xilinx.com diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts b/arch/arm/dts/zynqmp-zc1232-revA.dts index 6117f83c474e..87152afc32f5 100644 --- a/arch/arm/dts/zynqmp-zc1232-revA.dts +++ b/arch/arm/dts/zynqmp-zc1232-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZC1232 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts b/arch/arm/dts/zynqmp-zc1254-revA.dts index 6ac8346d23d9..d6b2834f3aa6 100644 --- a/arch/arm/dts/zynqmp-zc1254-revA.dts +++ b/arch/arm/dts/zynqmp-zc1254-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZC1254 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com * Siva Durga Prasad Paladugu sivadur@xilinx.com diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index bb6a94eefb8f..d604cf134252 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm015-dc1 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 1cc8aaa87976..2ff7952e70e5 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm016-dc2 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts index 2ead8dd24d57..c7de59e1e986 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm017-dc3 * - * (C) Copyright 2016 - 2018, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index 84c2904dc202..13508c45191f 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm018-dc4 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index 12c0173c5599..8d8ebeaac3bf 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm019-dc5 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Siva Durga Prasad siva.durga.paladugu@xilinx.com * Michal Simek michal.simek@xilinx.com diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 21118c8cc34a..1726edf78ed2 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU100 revC * - * (C) Copyright 2016 - 2018, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com * Nathalie Chan King Choy diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts index 6c702f2674e3..f39013794fa2 100644 --- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU102 Rev1.0 * - * (C) Copyright 2016 - 2018, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index b580f9263d02..222b67c7ce2f 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU102 RevA * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts index 38ec18816456..2422558b7484 100644 --- a/arch/arm/dts/zynqmp-zcu102-revB.dts +++ b/arch/arm/dts/zynqmp-zcu102-revB.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU102 RevB * - * (C) Copyright 2016 - 2018, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index 82557c88d21c..6375b47ff859 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU104 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index e0e7dac010c5..425d7605bf5c 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU104 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index d31982fce784..dc533f5f6dd7 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU106 * - * (C) Copyright 2016, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index bff224f78d1d..1304c509ac2a 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU111 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts index c22de576a586..8755bc433b4f 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU1275 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com * Siva Durga Prasad Paladugu sivadur@xilinx.com diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts index 2ec29b0b5d11..16f609c7e5c0 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revB.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU1275 RevB * - * (C) Copyright 2018, Xilinx, Inc. + * (C) Copyright 2018 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com * Siva Durga Prasad Paladugu sivadur@xilinx.com diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts index 9c1801313889..8a4d5b9fed19 100644 --- a/arch/arm/dts/zynqmp-zcu1285-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU1285 RevA * - * (C) Copyright 2018 - 2019, Xilinx, Inc. + * (C) Copyright 2018 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com * Siva Durga Prasad Paladugu sivadur@xilinx.com diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 85f9e1f62850..7395f23b6757 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU208 * - * (C) Copyright 2017 - 2019, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index 2db546fddd2c..f08bbe36c2a5 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU216 * - * (C) Copyright 2017 - 2019, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com */ diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 9e7fae83f787..ec0dd73e1504 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP * - * (C) Copyright 2014 - 2015, Xilinx, Inc. + * (C) Copyright 2014 - 2020, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com *

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 05/16] ARM: zynq: Fix spi name node

None name address should be aligned with address. DTC 1.5.1 is reporting issues related to that.

arch/arm/boot/dts/zynq-zc770-xm010.dts:106.10-119.4: Warning (spi_bus_reg): /amba/spi@e0007000/flash@0: SPI bus unit address format error, expected "1" arch/arm/boot/dts/zynq-zc770-xm013.dts:101.19-109.4: Warning (spi_bus_reg): /amba/spi@e0006000/eeprom@0: SPI bus unit address format error, expected "2"

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynq-zc770-xm010.dts | 2 +- arch/arm/dts/zynq-zc770-xm013.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index e1f34653ec3c..c547d7921d9c 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -72,7 +72,7 @@ status = "okay"; num-cs = <4>; is-decoded-cs = <0>; - flash@0 { + flash@1 { compatible = "sst25wf080", "jedec,spi-nor"; reg = <1>; spi-max-frequency = <1000000>; diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts index 05a49982cc4b..bdf0c2f956d1 100644 --- a/arch/arm/dts/zynq-zc770-xm013.dts +++ b/arch/arm/dts/zynq-zc770-xm013.dts @@ -67,7 +67,7 @@ status = "okay"; num-cs = <4>; is-decoded-cs = <0>; - eeprom: eeprom@0 { + eeprom: eeprom@2 { at25,byte-len = <8192>; at25,addr-mode = <2>; at25,page-size = <32>;

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 06/16] arm64: zynqmp: Remove unused zynqmp-clk.dtsi

All boards have been converted to firmware based driver that's why we can remove this file now.

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp-clk.dtsi | 244 ----------------------------------- 1 file changed, 244 deletions(-) delete mode 100644 arch/arm/dts/zynqmp-clk.dtsi

diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi deleted file mode 100644 index 82eac56c9d93..000000000000 --- a/arch/arm/dts/zynqmp-clk.dtsi +++ /dev/null @@ -1,244 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Clock specification for Xilinx ZynqMP - * - * (C) Copyright 2015 - 2020, Xilinx, Inc. - * - * Michal Simek michal.simek@xilinx.com - */ - -/ { - clk100: clk100 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - u-boot,dm-pre-reloc; - }; - - clk125: clk125 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <125000000>; - }; - - clk200: clk200 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - u-boot,dm-pre-reloc; - }; - - clk250: clk250 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <250000000>; - }; - - clk300: clk300 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <300000000>; - u-boot,dm-pre-reloc; - }; - - clk600: clk600 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <600000000>; - }; - - dp_aclk: clock0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - clock-accuracy = <100>; - }; - - dp_aud_clk: clock1 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24576000>; - clock-accuracy = <100>; - }; - - dpdma_clk: dpdma-clk { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <533000000>; - }; - - drm_clock: drm-clock { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <262750000>; - clock-accuracy = <0x64>; - }; -}; - -&can0 { - clocks = <&clk100 &clk100>; -}; - -&can1 { - clocks = <&clk100 &clk100>; -}; - -&fpd_dma_chan1 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan2 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan3 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan4 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan5 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan6 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan7 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan8 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan1 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan2 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan3 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan4 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan5 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan6 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan7 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan8 { - clocks = <&clk600>, <&clk100>; -}; - -&nand0 { - clocks = <&clk100 &clk100>; -}; - -&gem0 { - clocks = <&clk125>, <&clk125>, <&clk125>; -}; - -&gem1 { - clocks = <&clk125>, <&clk125>, <&clk125>; -}; - -&gem2 { - clocks = <&clk125>, <&clk125>, <&clk125>; -}; - -&gem3 { - clocks = <&clk125>, <&clk125>, <&clk125>; -}; - -&gpio { - clocks = <&clk100>; -}; - -&i2c0 { - clocks = <&clk100>; -}; - -&i2c1 { - clocks = <&clk100>; -}; - -&qspi { - clocks = <&clk300 &clk300>; -}; - -&sata { - clocks = <&clk250>; -}; - -&sdhci0 { - clocks = <&clk200 &clk200>; -}; - -&sdhci1 { - clocks = <&clk200 &clk200>; -}; - -&spi0 { - clocks = <&clk200 &clk200>; -}; - -&spi1 { - clocks = <&clk200 &clk200>; -}; - -&uart0 { - clocks = <&clk100 &clk100>; -}; - -&uart1 { - clocks = <&clk100 &clk100>; -}; - -&usb0 { - clocks = <&clk250>, <&clk250>; -}; - -&usb1 { - clocks = <&clk250>, <&clk250>; -}; - -&watchdog0 { - clocks = <&clk100>; -}; - -&lpd_watchdog { - clocks = <&clk250>; -}; - -&xilinx_drm { - clocks = <&drm_clock>; -}; - -&xlnx_dp { - clocks = <&dp_aclk>, <&dp_aud_clk>; -}; - -&xlnx_dpdma { - clocks = <&dpdma_clk>; -}; - -&xlnx_dp_snd_codec0 { - clocks = <&dp_aud_clk>; -};

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 07/16] arm64: zynqmp: Sync zynqmp fpga manager with mainline

From: Nava kishore Manne nava.manne@xilinx.com

Sync zynqmp fpga manager with mainline.

Signed-off-by: Nava kishore Manne nava.manne@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp-clk-ccf.dtsi | 4 ++++ arch/arm/dts/zynqmp.dtsi | 12 +++++++----- 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 1098e890192c..0b0fb6e98788 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -291,3 +291,7 @@ &xlnx_dp_snd_codec0 { clocks = <&zynqmp_clk DP_AUDIO_REF>; }; + +&zynqmp_pcap { + clocks = <&zynqmp_clk PCAP>; +}; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index ec0dd73e1504..58ac62c4f851 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -149,6 +149,11 @@ #power-domain-cells = <0x1>; u-boot,dm-pre-reloc;

+ zynqmp_pcap: pcap { + compatible = "xlnx,zynqmp-pcap-fpga"; + clock-names = "ref_clk"; + }; + zynqmp_power: zynqmp-power { u-boot,dm-pre-reloc; compatible = "xlnx,zynqmp-power"; @@ -180,9 +185,10 @@

fpga_full: fpga-full { compatible = "fpga-region"; - fpga-mgr = <&pcap>; + fpga-mgr = <&zynqmp_pcap>; #address-cells = <2>; #size-cells = <2>; + ranges; };

nvmem_firmware { @@ -195,10 +201,6 @@ }; };

- pcap: pcap { - compatible = "xlnx,zynqmp-pcap-fpga"; - }; - rst: reset-controller { compatible = "xlnx,zynqmp-reset"; #reset-cells = <1>;

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 08/16] arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards

From: Manish Narani manish.narani@xilinx.com

Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards. User can remove this property to enable the UHS mode. This is to keep the same speed (HS) modes across all the stages of the Linux Boot. Due to power cycling limitation of some of the ZynqMP boards, some SD cards don't get power cycled and are failing in Linux.

Signed-off-by: Manish Narani manish.narani@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 5 ++++- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 4 ---- arch/arm/dts/zynqmp-zcu102-revA.dts | 6 +++++- arch/arm/dts/zynqmp-zcu106-revA.dts | 4 ++++ arch/arm/dts/zynqmp-zcu111-revA.dts | 4 ++++ arch/arm/dts/zynqmp-zcu1285-revA.dts | 4 ++++ arch/arm/dts/zynqmp-zcu208-revA.dts | 4 ++++ arch/arm/dts/zynqmp-zcu216-revA.dts | 4 ++++ 8 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index d604cf134252..d8ea5578e779 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -154,7 +154,10 @@ /* SD1 with level shifter */ &sdhci1 { status = "okay"; - no-1-8-v; /* for 1.0 silicon */ + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; };

diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts index f39013794fa2..d508f3359943 100644 --- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts @@ -34,7 +34,3 @@ reg = <0xe0 0x3>; }; }; - -&sdhci1 { - /delete-property/ no-1-8-v; -}; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 222b67c7ce2f..e63f4b9cd8b0 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -655,7 +655,11 @@ /* SD1 with level shifter */ &sdhci1 { status = "okay"; - no-1-8-v; /* for 1.0 silicon */ + /* + * 1.0 revision has level shifter and this property should be + * removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; };

diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index dc533f5f6dd7..a5c4309f2f39 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -653,6 +653,10 @@ /* SD1 with level shifter */ &sdhci1 { status = "okay"; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; };

diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 1304c509ac2a..755c30e9ff67 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -567,6 +567,10 @@ &sdhci1 { status = "okay"; disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; };

diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts index 8a4d5b9fed19..d8b9cb1a9e13 100644 --- a/arch/arm/dts/zynqmp-zcu1285-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts @@ -241,5 +241,9 @@

&sdhci1 { status = "okay"; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 7395f23b6757..75ecd7a5c203 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -563,6 +563,10 @@ &sdhci1 { status = "okay"; disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; };

diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index f08bbe36c2a5..f3b5edfeb423 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -567,6 +567,10 @@ &sdhci1 { status = "okay"; disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; };

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 09/16] arm64: zynqmp: Remove second copy of reset-controller

Reset controller is handled via firmware that's why it should be the part of firmware node. Origin solution hasn't been removed when above change was applied by commit b07e97b4ba27 ("arm64: zynqmp: Use reset header in zynqmp.dtsi").

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp.dtsi | 5 ----- 1 file changed, 5 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 58ac62c4f851..ed28f1f695bb 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -201,11 +201,6 @@ }; };

- rst: reset-controller { - compatible = "xlnx,zynqmp-reset"; - #reset-cells = <1>; - }; - xlnx_dp_snd_card: dp_snd_card { compatible = "xlnx,dp-snd-card"; status = "disabled";

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 10/16] arm64: dts: zynqmp: Add clk cells for sdhci

From: Ashok Reddy Soma ashok.reddy.soma@xilinx.com

Add clock-cells and clock-output-names for sdhci0 and sdhci1. These are needed for linux sdhci driver from 5.4 version onwards.

Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp.dtsi | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index ed28f1f695bb..b117fc43c6d2 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -791,6 +791,8 @@ power-domains = <&zynqmp_firmware PD_SD_0>; nvmem-cells = <&soc_revision>; nvmem-cell-names = "soc_revision"; + #clock-cells = <1>; + clock-output-names = "clk_out_sd0", "clk_in_sd0"; };

sdhci1: mmc@ff170000 { @@ -807,6 +809,8 @@ power-domains = <&zynqmp_firmware PD_SD_1>; nvmem-cells = <&soc_revision>; nvmem-cell-names = "soc_revision"; + #clock-cells = <1>; + clock-output-names = "clk_out_sd1", "clk_in_sd1"; };

pinctrl0: pinctrl@ff180000 {

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 11/16] arm64: zynqmp: Do not duplicate flash partition label property

From: Amit Kumar Mahapatra amit.kumar-mahapatra@xilinx.com

In kernel 5.4, support has been added for reading MTD devices via the nvmem API. For this the mtd devices are registered as read-only NVMEM providers under sysfs with the same name as the flash partition label property.

So if flash partition label property of multiple flash devices are identical then the second mtd device fails to get registered as a NVMEM provider.

This patch fixes the issue by having different label property for different flashes.

Signed-off-by: Amit Kumar Mahapatra amit.kumar-mahapatra@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 2ff7952e70e5..92d938d665d2 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -197,7 +197,7 @@ reg = <0>;

partition@0 { - label = "data"; + label = "spi0-data"; reg = <0x0 0x100000>; }; }; @@ -214,7 +214,7 @@ reg = <0>;

partition@0 { - label = "data"; + label = "spi1-data"; reg = <0x0 0x84000>; }; };

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 12/16] arm64: zynqmp: Sync DP subsystem

Sync DP subsystem with the latest state in Xilinx U-Boot repository. This binding hasn't been approved in mainline Linux but it is much better than ancient version which this patch removes.

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp-clk-ccf.dtsi | 6 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 19 +--- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 2 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 20 +--- arch/arm/dts/zynqmp.dtsi | 136 ++++++++++------------- 5 files changed, 73 insertions(+), 110 deletions(-)

diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 0b0fb6e98788..b02ef22abd20 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -284,11 +284,15 @@ clocks = <&zynqmp_clk AMS_REF>; };

+&zynqmp_dpsub { + clocks = <&dp_aclk>, <&zynqmp_clk DP_AUDIO_REF>, <&zynqmp_clk DP_VIDEO_REF>; +}; + &xlnx_dpdma { clocks = <&zynqmp_clk DPDMA_REF>; };

-&xlnx_dp_snd_codec0 { +&zynqmp_dp_snd_codec0 { clocks = <&zynqmp_clk DP_AUDIO_REF>; };

diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index d8ea5578e779..fa3824d2a126 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -175,32 +175,23 @@ dr_mode = "host"; };

-&xilinx_drm { +&zynqmp_dpsub { status = "okay"; };

-&xlnx_dp { +&zynqmp_dp_snd_pcm0 { status = "okay"; };

-&xlnx_dp_sub { +&zynqmp_dp_snd_pcm1 { status = "okay"; - xlnx,vid-clk-pl; };

-&xlnx_dp_snd_pcm0 { +&zynqmp_dp_snd_card0 { status = "okay"; };

-&xlnx_dp_snd_pcm1 { - status = "okay"; -}; - -&xlnx_dp_snd_card { - status = "okay"; -}; - -&xlnx_dp_snd_codec0 { +&zynqmp_dp_snd_codec0 { status = "okay"; };

diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index 13508c45191f..6655b86a8029 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -115,7 +115,7 @@ status = "okay"; };

-&xlnx_dp { +&zynqmp_dpsub { status = "okay"; };

diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index e63f4b9cd8b0..fd6dfdd3c225 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -705,33 +705,23 @@ status = "okay"; };

-&xilinx_drm { +&zynqmp_dpsub { status = "okay"; - clocks = <&si570_1>; };

-&xlnx_dp { +&zynqmp_dp_snd_codec0 { status = "okay"; };

-&xlnx_dp_sub { +&zynqmp_dp_snd_pcm0 { status = "okay"; - xlnx,vid-clk-pl; };

-&xlnx_dp_snd_pcm0 { +&zynqmp_dp_snd_pcm1 { status = "okay"; };

-&xlnx_dp_snd_pcm1 { - status = "okay"; -}; - -&xlnx_dp_snd_card { - status = "okay"; -}; - -&xlnx_dp_snd_codec0 { +&zynqmp_dp_snd_card0 { status = "okay"; };

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index b117fc43c6d2..7d84a64b8055 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -201,54 +201,6 @@ }; };

- xlnx_dp_snd_card: dp_snd_card { - compatible = "xlnx,dp-snd-card"; - status = "disabled"; - xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>; - xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>; - }; - - xlnx_dp_snd_codec0: dp_snd_codec0 { - compatible = "xlnx,dp-snd-codec"; - status = "disabled"; - clock-names = "aud_clk"; - }; - - xlnx_dp_snd_pcm0: dp_snd_pcm0 { - compatible = "xlnx,dp-snd-pcm"; - status = "disabled"; - dmas = <&xlnx_dpdma 4>; - dma-names = "tx"; - }; - - xlnx_dp_snd_pcm1: dp_snd_pcm1 { - compatible = "xlnx,dp-snd-pcm"; - status = "disabled"; - dmas = <&xlnx_dpdma 5>; - dma-names = "tx"; - }; - - xilinx_drm: xilinx_drm { - compatible = "xlnx,drm"; - status = "disabled"; - xlnx,encoder-slave = <&xlnx_dp>; - xlnx,connector-type = "DisplayPort"; - xlnx,dp-sub = <&xlnx_dp_sub>; - planes { - xlnx,pixel-format = "rgb565"; - plane0 { - dmas = <&xlnx_dpdma 3>; - dma-names = "dma0"; - }; - plane1 { - dmas = <&xlnx_dpdma 0>, - <&xlnx_dpdma 1>, - <&xlnx_dpdma 2>; - dma-names = "dma0", "dma1", "dma2"; - }; - }; - }; - amba_apu: amba-apu@0 { compatible = "simple-bus"; #address-cells = <2>; @@ -1016,37 +968,6 @@ }; };

- xlnx_dp: dp@fd4a0000 { - compatible = "xlnx,v-dp"; - status = "disabled"; - reg = <0x0 0xfd4a0000 0x0 0x1000>; - interrupts = <0 119 4>; - interrupt-parent = <&gic>; - clock-names = "aclk", "aud_clk"; - xlnx,dp-version = "v1.2"; - xlnx,max-lanes = <2>; - xlnx,max-link-rate = <540000>; - xlnx,max-bpc = <16>; - xlnx,enable-ycrcb; - xlnx,colormetry = "rgb"; - xlnx,bpc = <8>; - xlnx,audio-chan = <2>; - xlnx,dp-sub = <&xlnx_dp_sub>; - xlnx,max-pclock-frequency = <300000>; - }; - - xlnx_dp_sub: dp_sub@fd4aa000 { - compatible = "xlnx,dp-sub"; - status = "disabled"; - reg = <0x0 0xfd4aa000 0x0 0x1000>, - <0x0 0xfd4ab000 0x0 0x1000>, - <0x0 0xfd4ac000 0x0 0x1000>; - reg-names = "blend", "av_buf", "aud"; - xlnx,output-fmt = "rgb"; - xlnx,vid-fmt = "yuyv"; - xlnx,gfx-fmt = "rgb565"; - }; - xlnx_dpdma: dma@fd4c0000 { compatible = "xlnx,dpdma"; status = "disabled"; @@ -1076,5 +997,62 @@ compatible = "xlnx,audio1"; }; }; + + zynqmp_dpsub: zynqmp-display@fd4a0000 { + compatible = "xlnx,zynqmp-dpsub-1.7"; + status = "disabled"; + reg = <0x0 0xfd4a0000 0x0 0x1000>, + <0x0 0xfd4aa000 0x0 0x1000>, + <0x0 0xfd4ab000 0x0 0x1000>, + <0x0 0xfd4ac000 0x0 0x1000>; + reg-names = "dp", "blend", "av_buf", "aud"; + interrupts = <0 119 4>; + interrupt-parent = <&gic>; + + clock-names = "dp_apb_clk", "dp_aud_clk", + "dp_vtc_pixel_clk_in"; + + power-domains = <&zynqmp_firmware PD_DP>; + + vid-layer { + dma-names = "vid0", "vid1", "vid2"; + dmas = <&xlnx_dpdma 0>, + <&xlnx_dpdma 1>, + <&xlnx_dpdma 2>; + }; + + gfx-layer { + dma-names = "gfx0"; + dmas = <&xlnx_dpdma 3>; + }; + + /* dummy node to indicate there's no child i2c device */ + i2c-bus { + }; + + zynqmp_dp_snd_codec0: zynqmp_dp_snd_codec0 { + compatible = "xlnx,dp-snd-codec"; + clock-names = "aud_clk"; + }; + + zynqmp_dp_snd_pcm0: zynqmp_dp_snd_pcm0 { + compatible = "xlnx,dp-snd-pcm"; + dmas = <&xlnx_dpdma 4>; + dma-names = "tx"; + }; + + zynqmp_dp_snd_pcm1: zynqmp_dp_snd_pcm1 { + compatible = "xlnx,dp-snd-pcm"; + dmas = <&xlnx_dpdma 5>; + dma-names = "tx"; + }; + + zynqmp_dp_snd_card0: zynqmp_dp_snd_card { + compatible = "xlnx,dp-snd-card"; + xlnx,dp-snd-pcm = <&zynqmp_dp_snd_pcm0>, + <&zynqmp_dp_snd_pcm1>; + xlnx,dp-snd-codec = <&zynqmp_dp_snd_codec0>; + }; + }; }; };

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 13/16] arm64: zynqmp: Fix addresses in partition definitions

Node name should be <name>@<address> which is not how partitions are described.

Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ...

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp-zc1232-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zc1254-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 8 ++++---- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu102-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu104-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu104-revC.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu106-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu111-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu1275-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu1275-revB.dts | 8 ++++---- 11 files changed, 44 insertions(+), 44 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts b/arch/arm/dts/zynqmp-zc1232-revA.dts index 87152afc32f5..cdd1c688abc8 100644 --- a/arch/arm/dts/zynqmp-zc1232-revA.dts +++ b/arch/arm/dts/zynqmp-zc1232-revA.dts @@ -48,19 +48,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts b/arch/arm/dts/zynqmp-zc1254-revA.dts index d6b2834f3aa6..f13788042314 100644 --- a/arch/arm/dts/zynqmp-zc1254-revA.dts +++ b/arch/arm/dts/zynqmp-zc1254-revA.dts @@ -48,19 +48,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index fa3824d2a126..05be495841e0 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -108,19 +108,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index 6655b86a8029..e22947ef326f 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -187,19 +187,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index fd6dfdd3c225..620ef81a979b 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -614,19 +614,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index 6375b47ff859..5172cfdcb141 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -209,19 +209,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 425d7605bf5c..0d18bacd0c3e 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -222,19 +222,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index a5c4309f2f39..6b8d55c053b3 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -612,19 +612,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 755c30e9ff67..56cf60767fdd 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -525,19 +525,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts index 8755bc433b4f..d0322add3bbb 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts @@ -49,19 +49,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts index 16f609c7e5c0..b5be749ee644 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revB.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts @@ -50,19 +50,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <1>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; };

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 14/16] arm64: zynqmp: Fix GIC compatible property

dtbs_check is showing warning around GIC compatible property as interrupt-controller@f9010000: compatible: ['arm,gic-400', 'arm,cortex-a15-gic'] is not valid under any of the given schemas

Similar change has been done also by Linux kernel commit 5400cdc1410b ("ARM: dts: sunxi: Fix GIC compatible")

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 7d84a64b8055..aa2815822237 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -208,7 +208,7 @@ ranges = <0 0 0 0 0xffffffff>;

gic: interrupt-controller@f9010000 { - compatible = "arm,gic-400", "arm,cortex-a15-gic"; + compatible = "arm,gic-400"; #interrupt-cells = <3>; reg = <0x0 0xf9010000 0x10000>, <0x0 0xf9020000 0x20000>,

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 15/16] arm64: zynqmp: Change bus naming to axi

Linux dtbs_check reports issue with bus name reported as amba-apu@0: $nodename:0: 'amba-apu@0' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

That's why change bus names to axi.

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index aa2815822237..d5bee2f448d1 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -201,7 +201,7 @@ }; };

- amba_apu: amba-apu@0 { + amba_apu: axi@0 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <1>; @@ -220,7 +220,7 @@ }; };

- amba: amba { + amba: axi { compatible = "simple-bus"; u-boot,dm-pre-reloc; #address-cells = <2>;

-- 2.25.0

Michal Simek

1:20 p.m.

New subject: [PATCH 16/16] arm64: zynqmp: Move pinctrl node under firmware node

Pinctrl is handled via firmare interface that's why move it there without reg property and new compatible string.

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynqmp.dtsi | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index d5bee2f448d1..93fdf6bfb8a8 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -167,6 +167,11 @@ compatible = "xlnx,zynqmp-reset"; #reset-cells = <1>; }; + + pinctrl0: pinctrl { + compatible = "xlnx,zynqmp-pinctrl"; + status = "disabled"; + }; }; };

@@ -765,12 +770,6 @@ clock-output-names = "clk_out_sd1", "clk_in_sd1"; };

- pinctrl0: pinctrl@ff180000 { - compatible = "xlnx,pinctrl-zynqmp"; - status = "disabled"; - reg = <0x0 0xff180000 0x0 0x1000>; - }; - smmu: smmu@fd800000 { compatible = "arm,mmu-500"; reg = <0x0 0xfd800000 0x0 0x20000>;

-- 2.25.0

Michal Simek

6 Apr 6 Apr

12:57 p.m.

út 18. 2. 2020 v 13:20 odesílatel Michal Simek michal.simek@xilinx.com napsal:

...

Hi,

I am sending these patches based on Xilinx SoC vendor tree. There are also fixes found based on Linux yaml parser. Patches with link to Linux mainline patches should be marked properly.

Thanks, Michal

Amit Kumar Mahapatra (1): arm64: zynqmp: Do not duplicate flash partition label property

Ashok Reddy Soma (1): arm64: dts: zynqmp: Add clk cells for sdhci

Manish Narani (1): arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards

Michal Simek (10): arm64: zynqmp: Replace gpio-key,wakeup with wakeup source arm64: zynqmp: Update Copyright years to 2020 ARM: zynq: Fix spi name node arm64: zynqmp: Remove unused zynqmp-clk.dtsi arm64: zynqmp: Remove second copy of reset-controller arm64: zynqmp: Sync DP subsystem arm64: zynqmp: Fix addresses in partition definitions arm64: zynqmp: Fix GIC compatible property arm64: zynqmp: Change bus naming to axi arm64: zynqmp: Move pinctrl node under firmware node

Nava kishore Manne (1): arm64: zynqmp: Sync zynqmp fpga manager with mainline

Quanyang Wang (1): ARM: dts: zc702: Fix I2C bus warnings

Sudeep Holla (1): ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property

arch/arm/dts/avnet-ultra96-rev1.dts | 2 +- arch/arm/dts/zynq-zc702.dts | 12 +- arch/arm/dts/zynq-zc770-xm010.dts | 2 +- arch/arm/dts/zynq-zc770-xm013.dts | 2 +- arch/arm/dts/zynq-zturn.dts | 2 +- arch/arm/dts/zynqmp-clk-ccf.dtsi | 12 +- arch/arm/dts/zynqmp-clk.dtsi | 244 ----------------------- arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- arch/arm/dts/zynqmp-zc1232-revA.dts | 10 +- arch/arm/dts/zynqmp-zc1254-revA.dts | 10 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 34 ++-- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 6 +- arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 12 +- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 2 +- arch/arm/dts/zynqmp-zcu100-revC.dts | 2 +- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 6 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 36 ++-- arch/arm/dts/zynqmp-zcu102-revB.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revA.dts | 10 +- arch/arm/dts/zynqmp-zcu104-revC.dts | 10 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 14 +- arch/arm/dts/zynqmp-zcu111-revA.dts | 14 +- arch/arm/dts/zynqmp-zcu1275-revA.dts | 10 +- arch/arm/dts/zynqmp-zcu1275-revB.dts | 10 +- arch/arm/dts/zynqmp-zcu1285-revA.dts | 6 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 8 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 8 +- arch/arm/dts/zynqmp.dtsi | 176 +++++++--------- 29 files changed, 206 insertions(+), 460 deletions(-) delete mode 100644 arch/arm/dts/zynqmp-clk.dtsi

-- 2.25.0

Applied all. M

-- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

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Michal Simek
Michal Simek