On 11/30/2016 01:28 PM, york.sun@nxp.com wrote:

On 11/20/2016 07:49 PM, Shengzhou Liu wrote:

...

• add additional function erratum_a009942_check_cpo to check if the board needs tuning CPO calibration for optimal setting.
• move ERRATUM_A009942(with revision to check cpo_sample option) from fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
• move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
• remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.

Signed-off-by: Shengzhou Liu Shengzhou.Liu@nxp.com

v2: fix warning on e5500 platform. v3: rebased.

Still have compiling error for qemu-ppce500. Please fix.

Never mind. I found the reason and the fix.

York