[U-Boot] [PATCH 0/6] Add Bananapi Zero board with OTG supported
Add Bananapi Zero board defconfig and device tree. OTG device is supported with enabling clock and adding necessary controller configuration change. USB mass storage is tested as a test case.
Jun Nie (6): sunxi: h3: add usb_otg and OHCI/EHCI for usbc0 on H3 sunxi: musb: Add fifo config for H3 sunxi: musb: Enable OTG device clock for H3 sunxi: musb: Hack dynamic fifo support for H3 OTG sunxi: usb_phy: Clear PHYCTL register before writing sunxi: Add initial Banana-Pi Zero support
arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 113 ++++++++++++++++++++++++ arch/arm/dts/sun8i-h3.dtsi | 32 +++++++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 2 + arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 + arch/arm/mach-sunxi/usb_phy.c | 8 +- configs/bananapi_zero_defconfig | 17 ++++ drivers/usb/musb-new/musb_regs.h | 3 +- drivers/usb/musb-new/sunxi.c | 51 +++++++++++ 9 files changed, 229 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts create mode 100644 configs/bananapi_zero_defconfig
Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI or MUSB controller.
Signed-off-by: Jun Nie jun.nie@linaro.org --- arch/arm/dts/sun8i-h3.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi index afa6079..ae1e861 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -218,6 +218,19 @@ #size-cells = <0>; };
+ usb_otg: usb@01c19000 { + compatible = "allwinner,sun8i-h3-musb"; + reg = <0x01c19000 0x400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + usbphy: phy@01c19400 { compatible = "allwinner,sun8i-h3-usb-phy"; reg = <0x01c19400 0x2c>, @@ -250,6 +263,25 @@ #phy-cells = <1>; };
+ ehci0: usb@01c1a000 { + compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>; + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>; + status = "disabled"; + }; + + ohci0: usb@01c1a400 { + compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>; + status = "disabled"; + }; + ehci1: usb@01c1b000 { compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>;
On Fri, Jan 5, 2018 at 1:06 PM, Jun Nie jun.nie@linaro.org wrote:
Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI or MUSB controller.
Since these nodes are from Linux, mention the similar text on commit message and head like "syncing [o-e]hci nodes from Linux' are similar.
Add fifo config for H3 as H3 differ with other SoC on ep number.
Signed-off-by: Jun Nie jun.nie@linaro.org --- drivers/usb/musb-new/sunxi.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 7ee44ea..0005c1e 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -290,10 +290,42 @@ static const struct musb_platform_ops sunxi_musb_ops = { .disable = sunxi_musb_disable, };
+#if defined(CONFIG_MACH_SUN8I_H3) +static struct musb_fifo_cfg sunxi_musb_fifo_config[] = { + { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, + { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, + { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, + { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, + { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, }, + { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, }, + { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, }, + { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, }, +}; +#else +static struct musb_fifo_cfg sunxi_musb_fifo_config[] = { + { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, + { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, + { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, + { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, + { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, }, + { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, }, + { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, }, + { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, }, + { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, }, + { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, }, +}; +#endif + static struct musb_hdrc_config musb_config = { + .fifo_cfg = sunxi_musb_fifo_config, + .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_fifo_config), .multipoint = 1, .dyn_fifo = 1, +#if defined(CONFIG_MACH_SUN8I_H3) .num_eps = 6, +#else + .num_eps = 5, +#endif .ram_bits = 11, };
On Fri, Jan 5, 2018 at 1:06 PM, Jun Nie jun.nie@linaro.org wrote:
Add fifo config for H3 as H3 differ with other SoC on ep number.
Signed-off-by: Jun Nie jun.nie@linaro.org
Reviewed-by: Jagan Teki jagan@openedev.com
Enable OTG clock and deassert reset
Signed-off-by: Jun Nie jun.nie@linaro.org --- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 2 ++ arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++++ drivers/usb/musb-new/sunxi.c | 19 +++++++++++++++++++ 3 files changed, 25 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index d328df9..0d81791 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -280,6 +280,8 @@ struct sunxi_ccm_reg { #define AHB_GATE_OFFSET_USB_EHCI2 27 #define AHB_GATE_OFFSET_USB_EHCI1 26 #define AHB_GATE_OFFSET_USB_EHCI0 25 +#define AHB_GATE_OFFSET_OTG_EHCI 24 +#define AHB_GATE_OFFSET_OTG_DEVICE 23 #else #define AHB_GATE_OFFSET_USB_EHCI1 27 #define AHB_GATE_OFFSET_USB_EHCI0 26 diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index 2419062..f7050df 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -64,7 +64,11 @@ #ifdef CONFIG_SUNXI_GEN_SUN6I #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) #define SUNXI_USBPHY_BASE 0x01c19000 +#ifndef CONFIG_USB_MUSB_HOST +#define SUNXI_USB0_BASE 0x01c19000 +#else #define SUNXI_USB0_BASE 0x01c1a000 +#endif #define SUNXI_USB1_BASE 0x01c1b000 #define SUNXI_USB2_BASE 0x01c1c000 #define SUNXI_USB3_BASE 0x01c1d000 diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 0005c1e..6d8242e 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -266,6 +266,16 @@ static int sunxi_musb_init(struct musb *musb) #ifdef CONFIG_SUNXI_GEN_SUN6I setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); #endif + +#ifdef CONFIG_MACH_SUNXI_H3_H5 +#ifdef CONFIG_USB_MUSB_HOST + setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_EHCI); + setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_EHCI); +#else + setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_DEVICE); + setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_DEVICE); +#endif +#endif sunxi_usb_phy_init(0);
USBC_ConfigFIFO_Base(); @@ -379,6 +389,15 @@ static int musb_usb_remove(struct udevice *dev) #endif clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+#ifdef CONFIG_MACH_SUNXI_H3_H5 +#ifdef CONFIG_USB_MUSB_HOST + clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_EHCI); + clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_EHCI); +#else + clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_DEVICE); + clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_DEVICE); +#endif +#endif free(host->host); host->host = NULL;
Like other Allwinner SoC, the H3 is missing the config register from the musb hardware block. Use a known working value for it like other SoC.
Signed-off-by: Jun Nie jun.nie@linaro.org --- drivers/usb/musb-new/musb_regs.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/musb-new/musb_regs.h b/drivers/usb/musb-new/musb_regs.h index a3cc38e..3e51003 100644 --- a/drivers/usb/musb-new/musb_regs.h +++ b/drivers/usb/musb-new/musb_regs.h @@ -432,7 +432,8 @@ static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase)
static inline u8 musb_read_configdata(void __iomem *mbase) { -#if defined CONFIG_MACH_SUN8I_A33 || defined CONFIG_MACH_SUN8I_A83T +#if defined(CONFIG_MACH_SUN8I_A33) || defined(CONFIG_MACH_SUN8I_A83T) || \ + defined(CONFIG_MACH_SUN8I_H3) /* <Sigh> allwinner saves a reg, and we need to hardcode this */ return 0xde; #else
PHYCTL register offset at 0x10 need to be cleared before it's written. Ported from below Linux patch. d699c1d phy: sun4i-usb: change PHYCTL register clearing code
Signed-off-by: Jun Nie jun.nie@linaro.org --- arch/arm/mach-sunxi/usb_phy.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c index 2f1cad1..1a6b4b4 100644 --- a/arch/arm/mach-sunxi/usb_phy.c +++ b/arch/arm/mach-sunxi/usb_phy.c @@ -156,8 +156,14 @@ __maybe_unused static void usb_phy_write(struct sunxi_usb_phy *phy, int addr, static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy) { #if defined CONFIG_MACH_SUNXI_H3_H5 - if (phy->id == 0) + if (phy->id == 0) { +#if defined(CONFIG_USB_MUSB_HOST) clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01); +#else + setbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01); + writel(0, SUNXI_USB0_BASE + SUNXI_USB_CSR); +#endif + } #endif clrbits_le32(phy->base + REG_PMU_UNK_H3, 0x02); }
Banana-Pi Zero is designed for IOT development using the Allwinner H2+ SOC.
Key features - Allwinner H2+, Quad-core Cortex-A7 - 512MB DRAM - microSD slot - Serial Debug Port - Combo WiFi/BT - HDMI
Signed-off-by: Jun Nie jun.nie@linaro.org --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 113 ++++++++++++++++++++++++ configs/bananapi_zero_defconfig | 17 ++++ 3 files changed, 131 insertions(+) create mode 100644 arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts create mode 100644 configs/bananapi_zero_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a895c70..80eec7e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -327,6 +327,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dts dtb-$(CONFIG_MACH_SUN8I_H3) += \ + sun8i-h2-plus-bananapi-m2-zero.dtb \ sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-orangepi-2.dtb \ diff --git a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts new file mode 100644 index 0000000..4d96c16 --- /dev/null +++ b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts @@ -0,0 +1,113 @@ +/* + * Copyright (C) 2017 Jun Nie jun.nie@linaro.org + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + model = "Banana Pi BPI-M2-Zero"; + compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + + pwr_led { + label = "bananapi-m2-zero:red:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ + default-state = "on"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + sw4 { + label = "power"; + linux,code = <BTN_0>; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + /* + * In different revisions the board have different card detect + * configuration. + */ + broken-cd; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ + /* USB OTG VBUS is directly connected to 5V without any regulators */ + status = "okay"; +}; diff --git a/configs/bananapi_zero_defconfig b/configs/bananapi_zero_defconfig new file mode 100644 index 0000000..9c78b21 --- /dev/null +++ b/configs/bananapi_zero_defconfig @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=408 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_MMC_BROKEN_CD=y +CONFIG_USB_MUSB_GADGET=y
Hi Jun,
On Fri, Jan 05, 2018 at 03:37:01PM +0800, Jun Nie wrote:
Banana-Pi Zero is designed for IOT development using the Allwinner H2+ SOC.
Key features
- Allwinner H2+, Quad-core Cortex-A7
- 512MB DRAM
- microSD slot
- Serial Debug Port
- Combo WiFi/BT
- HDMI
Signed-off-by: Jun Nie jun.nie@linaro.org
arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 113 ++++++++++++++++++++++++ configs/bananapi_zero_defconfig | 17 ++++ 3 files changed, 131 insertions(+) create mode 100644 arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts create mode 100644 configs/bananapi_zero_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a895c70..80eec7e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -327,6 +327,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dts dtb-$(CONFIG_MACH_SUN8I_H3) += \
- sun8i-h2-plus-bananapi-m2-zero.dtb \ sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-orangepi-2.dtb \
diff --git a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts new file mode 100644 index 0000000..4d96c16 --- /dev/null +++ b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts @@ -0,0 +1,113 @@ +/*
- Copyright (C) 2017 Jun Nie jun.nie@linaro.org
- This file is dual-licensed: you can use it either under the terms
- of the GPL or the X11 license, at your option. Note that this dual
- licensing only applies to this file, and not this project as a
- whole.
- a) This file is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation; either version 2 of the
License, or (at your option) any later version.
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
- Or, alternatively,
- b) Permission is hereby granted, free of charge, to any person
obtaining a copy of this software and associated documentation
files (the "Software"), to deal in the Software without
restriction, including without limitation the rights to use,
copy, modify, merge, publish, distribute, sublicense, and/or
sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following
conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.- */
+/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi"
+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h>
Where is that DT coming from?
Usually, we'll just merge a DT merged in Linux.
+/ {
- model = "Banana Pi BPI-M2-Zero";
- compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus";
- aliases {
serial0 = &uart0;- };
- chosen {
stdout-path = "serial0:115200n8";- };
- leds {
compatible = "gpio-leds";pinctrl-names = "default";pwr_led {label = "bananapi-m2-zero:red:pwr";gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */default-state = "on";};- };
- gpio_keys {
compatible = "gpio-keys";pinctrl-names = "default";sw4 {label = "power";linux,code = <BTN_0>;gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;};- };
+};
+&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>;
- vmmc-supply = <®_vcc3v3>;
- bus-width = <4>;
- /*
* In different revisions the board have different card detect* configuration.*/- broken-cd;
- status = "okay";
+};
+&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
- status = "okay";
+};
+&usb_otg {
- dr_mode = "otg";
- status = "okay";
+};
+&usbphy {
- usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
- /* USB OTG VBUS is directly connected to 5V without any regulators */
Then it cannot really do OTG, but rather only peripheral (or host, if the power is provided by the board).
- status = "okay";
+}; diff --git a/configs/bananapi_zero_defconfig b/configs/bananapi_zero_defconfig new file mode 100644 index 0000000..9c78b21 --- /dev/null +++ b/configs/bananapi_zero_defconfig @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=408 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_USB_MASS_STORAGE=y
This shouldn't be enabled in the defconfig.
The rest of the serie looks good, thanks! Maxime
+/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi"
+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h>
Where is that DT coming from?
Usually, we'll just merge a DT merged in Linux.
The DT come from Linux but modified with removing necessary nodes.
+/ {
model = "Banana Pi BPI-M2-Zero";compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus";aliases {serial0 = &uart0;};chosen {stdout-path = "serial0:115200n8";};leds {compatible = "gpio-leds";pinctrl-names = "default";pwr_led {label = "bananapi-m2-zero:red:pwr";gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */default-state = "on";};};gpio_keys {compatible = "gpio-keys";pinctrl-names = "default";sw4 {label = "power";linux,code = <BTN_0>;gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;};};+};
+&mmc0 {
pinctrl-names = "default";pinctrl-0 = <&mmc0_pins_a>;vmmc-supply = <®_vcc3v3>;bus-width = <4>;/** In different revisions the board have different card detect* configuration.*/broken-cd;status = "okay";+};
+&uart0 {
pinctrl-names = "default";pinctrl-0 = <&uart0_pins_a>;status = "okay";+};
+&usb_otg {
dr_mode = "otg";status = "okay";+};
+&usbphy {
usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 *//* USB OTG VBUS is directly connected to 5V without any regulators */Then it cannot really do OTG, but rather only peripheral (or host, if the power is provided by the board).
Right, and working mode in u-boot is decided in compile time, CONFIG_USB_MUSB_HOST.
status = "okay";+}; diff --git a/configs/bananapi_zero_defconfig b/configs/bananapi_zero_defconfig new file mode 100644 index 0000000..9c78b21 --- /dev/null +++ b/configs/bananapi_zero_defconfig @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=408 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_USB_MASS_STORAGE=y
This shouldn't be enabled in the defconfig.
Thanks for pointing out! Is there any guidance, where DTS should come from, what defconfig shall include, ...? I am new to u-boot :-)
The rest of the serie looks good, thanks! Maxime
Thanks for review! Jun
Hi Jun,
On Fri, Jan 05, 2018 at 04:51:11PM +0800, Jun Nie wrote:
+/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi"
+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h>
Where is that DT coming from?
Usually, we'll just merge a DT merged in Linux.
The DT come from Linux but modified with removing necessary nodes.
It seems weird, the pinctrl-names in your LED GPIOs nodes are unneeded. We shouldn't have merged that.
+&usb_otg {
dr_mode = "otg";status = "okay";+};
+&usbphy {
usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 *//* USB OTG VBUS is directly connected to 5V without any regulators */Then it cannot really do OTG, but rather only peripheral (or host, if the power is provided by the board).
Right, and working mode in u-boot is decided in compile time, CONFIG_USB_MUSB_HOST.
Yes, but then your dr_mode in your DT is wrong.
status = "okay";+}; diff --git a/configs/bananapi_zero_defconfig b/configs/bananapi_zero_defconfig new file mode 100644 index 0000000..9c78b21 --- /dev/null +++ b/configs/bananapi_zero_defconfig @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=408 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_USB_MASS_STORAGE=y
This shouldn't be enabled in the defconfig.
Thanks for pointing out! Is there any guidance, where DTS should come from, what defconfig shall include, ...? I am new to u-boot :-)
As a general basis, and that's more the policy we try to have for sunxi since we have so many boards, we try to have as less things as possible in the defconfig and have a consistent set of commands enabled by default. Therefore, you should have only the board specific stuff in there (so RAM parameters, SoC, device tree to use, etc.)
The rest should come from Kconfig itself.
Maxime
On Fri, Jan 5, 2018 at 1:06 PM, Jun Nie jun.nie@linaro.org wrote:
Add Bananapi Zero board defconfig and device tree. OTG device is supported with enabling clock and adding necessary controller configuration change. USB mass storage is tested as a test case.
Jun Nie (6): sunxi: h3: add usb_otg and OHCI/EHCI for usbc0 on H3 sunxi: musb: Add fifo config for H3 sunxi: musb: Enable OTG device clock for H3 sunxi: musb: Hack dynamic fifo support for H3 OTG sunxi: usb_phy: Clear PHYCTL register before writing
a64 on otg have in ML[1] check if any redundant otherwise it's OK., we will test these and send next version.
sunxi: Add initial Banana-Pi Zero support
similar patch is already in ML [2]
[1] https://patchwork.ozlabs.org/cover/847375/ [2] https://patchwork.ozlabs.org/patch/832937/
a64 on otg have in ML[1] check if any redundant otherwise it's OK., we will test these and send next version.
sunxi: Add initial Banana-Pi Zero support
similar patch is already in ML [2]
This serial patches in the link does not introduce any redundant change with my USB patches. So my patches 1-5 still deserve review. Conflict should be resolve of course because some change is made in the same line.
Two points for patches in the link: - SUNXI_MUSB_BASE is redefined with the patches in the link for H3 configuration in my test. - Some coding style conflict with u-boot, such as USBC_SelectPhyToDevice.
This patch can replace my patch 6 and please ignore my patch 6.
Jun
-- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
On Fri, Jan 5, 2018 at 5:04 PM, Jun Nie jun.nie@linaro.org wrote:
a64 on otg have in ML[1] check if any redundant otherwise it's OK., we will test these and send next version.
sunxi: Add initial Banana-Pi Zero support
similar patch is already in ML [2]
This serial patches in the link does not introduce any redundant change with my USB patches. So my patches 1-5 still deserve review. Conflict should be resolve of course because some change is made in the same line.
Two points for patches in the link:
- SUNXI_MUSB_BASE is redefined with the patches in the link for H3
configuration in my test.
- Some coding style conflict with u-boot, such as USBC_SelectPhyToDevice.
I have some similar patches here:
https://github.com/wens/u-boot-sunxi/commits/libretech-cc
ChenYu
This patch can replace my patch 6 and please ignore my patch 6.
Jun
-- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
2018-01-05 17:06 GMT+08:00 Chen-Yu Tsai wens@csie.org:
On Fri, Jan 5, 2018 at 5:04 PM, Jun Nie jun.nie@linaro.org wrote:
a64 on otg have in ML[1] check if any redundant otherwise it's OK., we will test these and send next version.
sunxi: Add initial Banana-Pi Zero support
similar patch is already in ML [2]
This serial patches in the link does not introduce any redundant change with my USB patches. So my patches 1-5 still deserve review. Conflict should be resolve of course because some change is made in the same line.
Two points for patches in the link:
- SUNXI_MUSB_BASE is redefined with the patches in the link for H3
configuration in my test.
- Some coding style conflict with u-boot, such as USBC_SelectPhyToDevice.
I have some similar patches here:
https://github.com/wens/u-boot-sunxi/commits/libretech-cc
ChenYu
ChenYu,
Are you patches are in review process or merge process? When do you expected they are merged?
Jun
This patch can replace my patch 6 and please ignore my patch 6.
Jun
-- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
On Fri, Jan 5, 2018 at 5:20 PM, Jun Nie jun.nie@linaro.org wrote:
2018-01-05 17:06 GMT+08:00 Chen-Yu Tsai wens@csie.org:
On Fri, Jan 5, 2018 at 5:04 PM, Jun Nie jun.nie@linaro.org wrote:
a64 on otg have in ML[1] check if any redundant otherwise it's OK., we will test these and send next version.
sunxi: Add initial Banana-Pi Zero support
similar patch is already in ML [2]
This serial patches in the link does not introduce any redundant change with my USB patches. So my patches 1-5 still deserve review. Conflict should be resolve of course because some change is made in the same line.
Two points for patches in the link:
- SUNXI_MUSB_BASE is redefined with the patches in the link for H3
configuration in my test.
- Some coding style conflict with u-boot, such as USBC_SelectPhyToDevice.
I have some similar patches here:
https://github.com/wens/u-boot-sunxi/commits/libretech-cc
ChenYu
ChenYu,
Are you patches are in review process or merge process? When do you expected they are merged?
So far only "musb: sunxi: Use base address from device tree" has been sent out and was already reviewed, but pending. The rest I've not sent as I was still trying to get it to work in peripheral mode.
Feel free to pick any of the patches if they suit your needs.
ChenYu
participants (4)
-
Chen-Yu Tsai -
Jagan Teki -
Jun Nie -
Maxime Ripard