Hi.

When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS. The boot flow is as follows: BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot)

My UniPhier LD20 SoC (primary CPU = CA72) hangs in U-Boot. The same boot sequence works fine on a similar SoC, LD11 (primary CPU = CA53).

I do not know why. Do you have a clue? A CA72-specific problem (errata)?

After a while, I found a solution to make it work for CA72.

Insert the following two lines in early boot stage of U-Boot.

mrs x0, sctlr_el1 msr sctlr_el1, x0

The code above seems no effect because it just reads sctlr_el1 register, then writes back the value immediately. Surprisingly enough, it fixes the problem. I do not know why.

I sent the following patch for my SoC: http://patchwork.ozlabs.org/patch/760988/ I am not sure if this is good.

Anybody who has a clue?

Thanks!