[U-Boot] [PATCH 1/2] pci: Add boundary check for hose->regions
From: Thierry Reding treding@nvidia.com
Make sure that we don't overflow the hose->regions array, otherwise we would end up overwriting the hose->region_count field and cause mayhem to ensue. Also print an error message when we'd be overflowing because it indicates that there aren't enough regions available and the number needs to be increased.
Signed-off-by: Thierry Reding treding@nvidia.com --- drivers/pci/pci-uclass.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 824fa1190747..cf1e7617ae35 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -918,6 +918,11 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, return;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { + if (hose->region_count == MAX_PCI_REGIONS) { + pr_err("maximum number of regions parsed, aborting\n"); + break; + } + if (bd->bi_dram[i].size) { pci_set_region(hose->regions + hose->region_count++, bd->bi_dram[i].start,
From: Thierry Reding treding@nvidia.com
If a platform defines CONFIG_NR_DRAM_BANKS, each DRAM bank will be added as a PCI region. The number of MAX_PCI_REGIONS therefore needs to scale with the number of DRAM banks, otherwise we will end up with too little space in the hose->regions array to store all system memory regions.
Signed-off-by: Thierry Reding treding@nvidia.com --- include/pci.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/pci.h b/include/pci.h index 936cfe975cbe..82ef2dbc6640 100644 --- a/include/pci.h +++ b/include/pci.h @@ -534,7 +534,11 @@ extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev, extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *);
-#define MAX_PCI_REGIONS 7 +#ifdef CONFIG_NR_DRAM_BANKS +#define MAX_PCI_REGIONS (CONFIG_NR_DRAM_BANKS + 7) +#else +#define MAX_PCI_REGIONS 7 +#endif
#define INDIRECT_TYPE_NO_PCIE_LINK 1
On Fri, 15 Mar 2019 at 23:32, Thierry Reding thierry.reding@gmail.com wrote:
From: Thierry Reding treding@nvidia.com
If a platform defines CONFIG_NR_DRAM_BANKS, each DRAM bank will be added as a PCI region. The number of MAX_PCI_REGIONS therefore needs to scale with the number of DRAM banks, otherwise we will end up with too little space in the hose->regions array to store all system memory regions.
Signed-off-by: Thierry Reding treding@nvidia.com
include/pci.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
Reviewed-by: Simon Glass sjg@chromium.org
On Fri, Mar 15, 2019 at 04:32:33PM +0100, Thierry Reding wrote:
From: Thierry Reding treding@nvidia.com
If a platform defines CONFIG_NR_DRAM_BANKS, each DRAM bank will be added as a PCI region. The number of MAX_PCI_REGIONS therefore needs to scale with the number of DRAM banks, otherwise we will end up with too little space in the hose->regions array to store all system memory regions.
Signed-off-by: Thierry Reding treding@nvidia.com Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot/master, thanks!
On Fri, 15 Mar 2019 at 23:32, Thierry Reding thierry.reding@gmail.com wrote:
From: Thierry Reding treding@nvidia.com
Make sure that we don't overflow the hose->regions array, otherwise we would end up overwriting the hose->region_count field and cause mayhem to ensue. Also print an error message when we'd be overflowing because it indicates that there aren't enough regions available and the number needs to be increased.
Signed-off-by: Thierry Reding treding@nvidia.com
drivers/pci/pci-uclass.c | 5 +++++ 1 file changed, 5 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
On Fri, Mar 15, 2019 at 04:32:32PM +0100, Thierry Reding wrote:
From: Thierry Reding treding@nvidia.com
Make sure that we don't overflow the hose->regions array, otherwise we would end up overwriting the hose->region_count field and cause mayhem to ensue. Also print an error message when we'd be overflowing because it indicates that there aren't enough regions available and the number needs to be increased.
Signed-off-by: Thierry Reding treding@nvidia.com
drivers/pci/pci-uclass.c | 5 +++++ 1 file changed, 5 insertions(+)
Hi Tom,
have you had a chance to look at these two patches? Simon's reviewed them and they are needed to restore PCI support on Jetson TX2 (P2771).
Thierry
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 824fa1190747..cf1e7617ae35 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -918,6 +918,11 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, return;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
if (hose->region_count == MAX_PCI_REGIONS) {pr_err("maximum number of regions parsed, aborting\n");break;}- if (bd->bi_dram[i].size) { pci_set_region(hose->regions + hose->region_count++, bd->bi_dram[i].start,
-- 2.20.1
On Tue, Apr 16, 2019 at 06:30:53PM +0200, Thierry Reding wrote:
On Fri, Mar 15, 2019 at 04:32:32PM +0100, Thierry Reding wrote:
From: Thierry Reding treding@nvidia.com
Make sure that we don't overflow the hose->regions array, otherwise we would end up overwriting the hose->region_count field and cause mayhem to ensue. Also print an error message when we'd be overflowing because it indicates that there aren't enough regions available and the number needs to be increased.
Signed-off-by: Thierry Reding treding@nvidia.com
drivers/pci/pci-uclass.c | 5 +++++ 1 file changed, 5 insertions(+)
Hi Tom,
have you had a chance to look at these two patches? Simon's reviewed them and they are needed to restore PCI support on Jetson TX2 (P2771).
They're on my list, thanks!
On Fri, Mar 15, 2019 at 04:32:32PM +0100, Thierry Reding wrote:
From: Thierry Reding treding@nvidia.com
Make sure that we don't overflow the hose->regions array, otherwise we would end up overwriting the hose->region_count field and cause mayhem to ensue. Also print an error message when we'd be overflowing because it indicates that there aren't enough regions available and the number needs to be increased.
Signed-off-by: Thierry Reding treding@nvidia.com Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot/master, thanks!
participants (3)
-
Simon Glass -
Thierry Reding -
Tom Rini