[U-Boot] [PATCH/RFC] mx28: print bootmode with cpuinfo

Hi,
while playing around with the mx28evk and differnet bootmedia I found it helpful to see the current bootmode without running to the board and checking it's switches. Also some other CPU (e.g. 440 PowerPCs) print some kind of bootstrap configuration during startup.
The patch probably needs some little cleanup. But the main issue might be the way how it passes the information from SPL to 2nd stage. I am note sure if those scratch registers are somehow holy :-)
BTW, I still did not figure out why current mx28evk u-boot cannot be bootet via USB download while MMC and SPI are working ...
Matthias
So here comes V1:
This patch add support for printing the currently selected bootmode within print_cpuinfo() for MX28 boards. The bootmode is read from the CPU's strapping balls before they are setup for thier later function (e.g. become an output or are used by the LCD controller).
Reading the pins is done from SPL stage and the information is passed in the SCRATCH1+2 registers together with the memory size.
Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- arch/arm/cpu/arm926ejs/mx28/mx28.c | 43 +++++++++++++++++++++++++-- arch/arm/cpu/arm926ejs/mx28/spl_boot.c | 7 ++++ arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 4 +- 3 files changed, 48 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index da90360..15a7c5b 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -43,6 +43,9 @@ DECLARE_GLOBAL_DATA_PTR; #define MX28_BLOCK_SFTRST (1 << 31) #define MX28_BLOCK_CLKGATE (1 << 30)
+#define HW_DIGCTRL_SCRATCH0 0x8001c280 +#define HW_DIGCTRL_SCRATCH1 0x8001c290 + /* Lowlevel init isn't used on i.MX28, so just have a dummy here */ inline void lowlevel_init(void) {}
@@ -169,7 +172,41 @@ int arch_cpu_init(void) #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo(void) { - printf("Freescale i.MX28 family\n"); + uint32_t bm = readl(HW_DIGCTRL_SCRATCH0) & 0xf; + char *bm_s; + + switch (bm & 0xf) { + case 0x0: + bm_s = "USB"; + break; + case 0x1: + bm_s = "I2C0"; + break; + case 0x2: + bm_s = "SPI2/flash"; + break; + case 0x3: + bm_s = "SPI3/flash"; + break; + case 0x4: + bm_s = "NAND"; + break; + case 0x8: + bm_s = "SPI3/eeprom"; + break; + case 0x9: + bm_s = "SSP0/MMC"; + break; + case 0xa: + bm_s = "SSP1/MMC"; + break; + case 0xf: + bm_s = "Test"; + break; + default: + bm_s = "Unknown"; + } + printf("Freescale i.MX28 family (bootmode:%s)\n", bm_s); return 0; } #endif @@ -260,8 +297,6 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) } #endif
-#define HW_DIGCTRL_SCRATCH0 0x8001c280 -#define HW_DIGCTRL_SCRATCH1 0x8001c290 int mx28_dram_init(void) { uint32_t sz[2]; @@ -277,7 +312,7 @@ int mx28_dram_init(void) hang(); }
- gd->ram_size = sz[0]; + gd->ram_size = sz[0] & ~0xf; return 0; }
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c index dfb8309..edb8ff7 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c @@ -46,9 +46,16 @@ void early_delay(int delay) ; }
+#define HW_DIGCTRL_SCRATCH0 0x8001c280 +#define HW_DIGCTRL_SCRATCH1 0x8001c290 + void mx28_common_spl_init(const iomux_cfg_t *iomux_setup, const unsigned int iomux_size) { + uint32_t bm = readl(0x80018910) & 0xf; + writel(bm, HW_DIGCTRL_SCRATCH0); + writel(bm, HW_DIGCTRL_SCRATCH1); + mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size); mx28_power_init(); mx28_mem_init(); diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c index 00493b8..15f094e 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c @@ -183,8 +183,8 @@ void mx28_mem_get_size(void) vt[4] = (uint32_t)&data_abort_memdetect_handler;
sz = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); - writel(sz, HW_DIGCTRL_SCRATCH0); - writel(sz, HW_DIGCTRL_SCRATCH1); + writel(sz | readl(HW_DIGCTRL_SCRATCH0), HW_DIGCTRL_SCRATCH0); + writel(sz | readl(HW_DIGCTRL_SCRATCH1), HW_DIGCTRL_SCRATCH1);
/* Restore the old DABT handler. */ vt[4] = da;

Hi Matthias,
On 1/18/12, Matthias Fuchs matthias.fuchs@esd.eu wrote:
Hi,
while playing around with the mx28evk and differnet bootmedia I found it helpful to see the current bootmode without running to the board and checking it's switches. Also some other CPU (e.g. 440 PowerPCs) print some kind of bootstrap configuration during startup.
The patch probably needs some little cleanup. But the main issue might be the way how it passes the information from SPL to 2nd stage. I am note sure if those scratch registers are somehow holy :-)
I tested your patch and it worked fine.
What I really liked about it is that it fixed a real issue that I was seeing: after booting the kernel and issuing a "reboot"command, kernel did shutdown, reset the system, but then U-boot got stuck showing "DRAM: 0 bytes".
So maybe you could split this patch in two parts:
- One patch that touches the HW_DIGCTRL_SCRATCH register (this part is what fixed the RAM size retrievel after a "reboot" in the kernel
- Another one to show the boot media
Thanks,
Fabio Estevam

On 23.01.2012 21:33, Fabio Estevam wrote:
Hi Matthias,
On 1/18/12, Matthias Fuchs matthias.fuchs@esd.eu wrote:
Hi,
while playing around with the mx28evk and differnet bootmedia I found it helpful to see the current bootmode without running to the board and checking it's switches. Also some other CPU (e.g. 440 PowerPCs) print some kind of bootstrap configuration during startup.
The patch probably needs some little cleanup. But the main issue might be the way how it passes the information from SPL to 2nd stage. I am note sure if those scratch registers are somehow holy :-)
I tested your patch and it worked fine.
What I really liked about it is that it fixed a real issue that I was seeing: after booting the kernel and issuing a "reboot"command, kernel did shutdown, reset the system, but then U-boot got stuck showing "DRAM: 0 bytes".
Hmm ...
So maybe you could split this patch in two parts:
- One patch that touches the HW_DIGCTRL_SCRATCH register (this part is
what fixed the RAM size retrievel after a "reboot" in the kernel
And what is this part? I was not aware of this issue. What exactly part of my patch fixes this issue?
And finally I am not sure if we should use the scratch registers for passing the boot mode at all.
Matthias

On 1/24/12, Matthias Fuchs matthias.fuchs@esd.eu wrote:
- One patch that touches the HW_DIGCTRL_SCRATCH register (this part is
what fixed the RAM size retrievel after a "reboot" in the kernel
And what is this part? I was not aware of this issue. What exactly part of my patch fixes this issue?
I started removing all the pieces of your patch and then I noticed that the part below was responsible for making the "reboot" command in Linux to work:
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup, const unsigned int iomux_size) { + uint32_t bm = readl(0x80018910) & 0xf; + writel(bm, HW_DIGCTRL_SCRATCH0); + writel(bm, HW_DIGCTRL_SCRATCH1); + mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size); mx28_power_init(); mx28_mem_init();
I also noticed that even if I replace these lines with a early_delay(1) it also makes "reboot" to work fine.
It looks like we need something to be executed before the mxs_iomux_setup_multiple_pads
The patch below works fine:
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c @@ -49,8 +49,8 @@ void early_delay(int delay) void mx28_common_spl_init(const iomux_cfg_t *iomux_setup, const unsigned int iomux_size) { - mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size); mx28_power_init(); + mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size); mx28_mem_init(); mx28_power_wait_pswitch(); }
,though I don't have a good explanation for it right now.
participants (2)
-
Fabio Estevam
-
Matthias Fuchs