Signed-off-by: Andre Heider a.heider@gmail.com --- board/sunxi/board.c | 105 ++++++++++++++++++++++++-------------------- 1 file changed, 58 insertions(+), 47 deletions(-)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c index b9450a0e36..42bec3a4d8 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -768,6 +768,38 @@ static void parse_spl_header(const uint32_t spl_addr) env_set_hex("fel_scriptaddr", spl->fel_script_address); }

+static bool get_unique_sid(unsigned int *sid) +{ + if (sunxi_get_sid(sid) != 0) + return false; + + if (!sid[0]) + return false; + + /* + * The single words 1 - 3 of the SID have quite a few bits + * which are the same on many models, so we take a crc32 + * of all 3 words, to get a more unique value. + * + * Note we only do this on newer SoCs as we cannot change + * the algorithm on older SoCs since those have been using + * fixed mac-addresses based on only using word 3 for a + * long time and changing a fixed mac-address with an + * u-boot update is not good. + */ +#if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I) && \ + !defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I) && \ + !defined(CONFIG_MACH_SUN8I_A23) && !defined(CONFIG_MACH_SUN8I_A33) + sid[3] = crc32(0, (unsigned char *)&sid[1], 12); +#endif + + /* Ensure the NIC specific bytes of the mac are not all 0 */ + if ((sid[3] & 0xffffff) == 0) + sid[3] |= 0x800000; + + return true; +} + /* * Note this function gets called multiple times. * It must not make any changes to env variables which already exist. @@ -778,61 +810,40 @@ static void setup_environment(const void *fdt) unsigned int sid[4]; uint8_t mac_addr[6]; char ethaddr[16]; - int i, ret; + int i;

- ret = sunxi_get_sid(sid); - if (ret == 0 && sid[0] != 0) { - /* - * The single words 1 - 3 of the SID have quite a few bits - * which are the same on many models, so we take a crc32 - * of all 3 words, to get a more unique value. - * - * Note we only do this on newer SoCs as we cannot change - * the algorithm on older SoCs since those have been using - * fixed mac-addresses based on only using word 3 for a - * long time and changing a fixed mac-address with an - * u-boot update is not good. - */ -#if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I) && \ - !defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I) && \ - !defined(CONFIG_MACH_SUN8I_A23) && !defined(CONFIG_MACH_SUN8I_A33) - sid[3] = crc32(0, (unsigned char *)&sid[1], 12); -#endif - - /* Ensure the NIC specific bytes of the mac are not all 0 */ - if ((sid[3] & 0xffffff) == 0) - sid[3] |= 0x800000; + if (!get_unique_sid(sid)) + return;

- for (i = 0; i < 4; i++) { - sprintf(ethaddr, "ethernet%d", i); - if (!fdt_get_alias(fdt, ethaddr)) - continue; + for (i = 0; i < 4; i++) { + sprintf(ethaddr, "ethernet%d", i); + if (!fdt_get_alias(fdt, ethaddr)) + continue;

- if (i == 0) - strcpy(ethaddr, "ethaddr"); - else - sprintf(ethaddr, "eth%daddr", i); + if (i == 0) + strcpy(ethaddr, "ethaddr"); + else + sprintf(ethaddr, "eth%daddr", i);

- if (env_get(ethaddr)) - continue; + if (env_get(ethaddr)) + continue;

- /* Non OUI / registered MAC address */ - mac_addr[0] = (i << 4) | 0x02; - mac_addr[1] = (sid[0] >> 0) & 0xff; - mac_addr[2] = (sid[3] >> 24) & 0xff; - mac_addr[3] = (sid[3] >> 16) & 0xff; - mac_addr[4] = (sid[3] >> 8) & 0xff; - mac_addr[5] = (sid[3] >> 0) & 0xff; + /* Non OUI / registered MAC address */ + mac_addr[0] = (i << 4) | 0x02; + mac_addr[1] = (sid[0] >> 0) & 0xff; + mac_addr[2] = (sid[3] >> 24) & 0xff; + mac_addr[3] = (sid[3] >> 16) & 0xff; + mac_addr[4] = (sid[3] >> 8) & 0xff; + mac_addr[5] = (sid[3] >> 0) & 0xff;

- eth_env_set_enetaddr(ethaddr, mac_addr); - } + eth_env_set_enetaddr(ethaddr, mac_addr); + }

- if (!env_get("serial#")) { - snprintf(serial_string, sizeof(serial_string), - "%08x%08x", sid[0], sid[3]); + if (!env_get("serial#")) { + snprintf(serial_string, sizeof(serial_string), + "%08x%08x", sid[0], sid[3]);

- env_set("serial#", serial_string); - } + env_set("serial#", serial_string); } }

Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3, ship with the controller default address.

Add a config option to fix it up so it can function properly.

Tested-by: Ondrej Jirman megous@megous.com Signed-off-by: Andre Heider a.heider@gmail.com --- arch/arm/mach-sunxi/Kconfig | 11 +++++++++++ board/sunxi/board.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 16d41b83af..4513c07ffb 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1009,4 +1009,15 @@ config PINE64_DT_SELECTION option, the device tree selection code specific to Pine64 which utilizes the DRAM size will be enabled.

+config FIXUP_BDADDR + string "Fixup the Bluetooth controller address" + default "" + help + This option specifies the DT compatible name of the Bluetooth + controller for which to set the "local-bd-address" property. + Set this option if your device ships with the Bluetooth controller + default address. + The used address is "bdaddr" if set, and "ethaddr" with the LSB + flipped elsewise. + endif diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 42bec3a4d8..4311d4cba2 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -876,6 +876,38 @@ int misc_init_r(void) return 0; }

+static void fixup_bd_address(void *blob) +{ + /* Some devices ship with a Bluetooth controller default address. + * Set a valid address through the device tree. + */ + uchar tmp[ETH_ALEN], bdaddr[ETH_ALEN]; + unsigned int sid[4]; + int i; + + if (!CONFIG_FIXUP_BDADDR[0]) + return; + + if (eth_env_get_enetaddr("bdaddr", tmp)) { + /* Convert between the binary formats of the corresponding stacks */ + for (i = 0; i < ETH_ALEN; ++i) + bdaddr[i] = tmp[ETH_ALEN - i - 1]; + } else { + if (!get_unique_sid(sid)) + return; + + bdaddr[0] = ((sid[3] >> 0) & 0xff) ^ 1; + bdaddr[1] = (sid[3] >> 8) & 0xff; + bdaddr[2] = (sid[3] >> 16) & 0xff; + bdaddr[3] = (sid[3] >> 24) & 0xff; + bdaddr[4] = (sid[0] >> 0) & 0xff; + bdaddr[5] = 0x02; + } + + do_fixup_by_compat(blob, CONFIG_FIXUP_BDADDR, + "local-bd-address", bdaddr, ETH_ALEN, 1); +} + int ft_board_setup(void *blob, bd_t *bd) { int __maybe_unused r; @@ -886,6 +918,8 @@ int ft_board_setup(void *blob, bd_t *bd) */ setup_environment(blob);

+ fixup_bd_address(blob); + #ifdef CONFIG_VIDEO_DT_SIMPLEFB r = sunxi_simplefb_setup(blob); if (r)

Taken from the kernel tag v5.4. Drop the /omit-if-no-ref/ keyword as it's not supported by u-boot.

Signed-off-by: Andre Heider a.heider@gmail.com --- arch/arm/dts/sun50i-h6-beelink-gs1.dts | 27 +++++ arch/arm/dts/sun50i-h6-orangepi.dtsi | 4 + arch/arm/dts/sun50i-h6-pine-h64.dts | 4 + arch/arm/dts/sun50i-h6.dtsi | 137 ++++++++++++++++++++++--- 4 files changed, 155 insertions(+), 17 deletions(-)

diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts index 0dc33c90dd..1d05d57014 100644 --- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts +++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts @@ -25,6 +25,7 @@ connector { compatible = "hdmi-connector"; type = "a"; + ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */

port { hdmi_con_in: endpoint { @@ -51,6 +52,24 @@ regulator-max-microvolt = <5000000>; regulator-always-on; }; + + sound-spdif { + compatible = "simple-audio-card"; + simple-audio-card,name = "sun50i-h6-spdif"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; };

&de { @@ -232,6 +251,10 @@ }; };

+&r_ir { + status = "okay"; +}; + &r_pio { /* * PL0 and PL1 are used for PMIC I2C @@ -243,6 +266,10 @@ vcc-pm-supply = <&reg_aldo1>; };

+&spdif { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_ph_pins>; diff --git a/arch/arm/dts/sun50i-h6-orangepi.dtsi b/arch/arm/dts/sun50i-h6-orangepi.dtsi index 62e27948a3..ec9b6a578e 100644 --- a/arch/arm/dts/sun50i-h6-orangepi.dtsi +++ b/arch/arm/dts/sun50i-h6-orangepi.dtsi @@ -189,6 +189,10 @@ }; };

+&r_ir { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_ph_pins>; diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts index 1898345183..30102daf83 100644 --- a/arch/arm/dts/sun50i-h6-pine-h64.dts +++ b/arch/arm/dts/sun50i-h6-pine-h64.dts @@ -255,6 +255,10 @@ }; };

+&r_ir { + status = "okay"; +}; + &r_pio { vcc-pm-supply = <&reg_aldo1>; }; diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi index a117f479ae..bdba221a67 100644 --- a/arch/arm/dts/sun50i-h6.dtsi +++ b/arch/arm/dts/sun50i-h6.dtsi @@ -56,14 +56,6 @@ status = "disabled"; };

- iosc: internal-osc-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <16000000>; - clock-accuracy = <300000000>; - clock-output-names = "iosc"; - }; - osc24M: osc24M_clk { #clock-cells = <0>; compatible = "fixed-clock"; @@ -71,11 +63,11 @@ clock-output-names = "osc24M"; };

- osc32k: osc32k_clk { + ext_osc32k: ext_osc32k_clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; - clock-output-names = "osc32k"; + clock-output-names = "ext_osc32k"; };

psci { @@ -197,7 +189,7 @@ ccu: clock@3001000 { compatible = "allwinner,sun50i-h6-ccu"; reg = <0x03001000 0x1000>; - clocks = <&osc24M>, <&osc32k>, <&iosc>; + clocks = <&osc24M>, <&rtc 0>, <&rtc 2>; clock-names = "hosc", "losc", "iosc"; #clock-cells = <1>; #reset-cells = <1>; @@ -215,7 +207,7 @@ #dma-cells = <1>; };

- sid: sid@3006000 { + sid: efuse@3006000 { compatible = "allwinner,sun50i-h6-sid"; reg = <0x03006000 0x400>; }; @@ -225,6 +217,7 @@ "allwinner,sun6i-a31-wdt"; reg = <0x030090a0 0x20>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc24M>; /* Broken on some H6 boards */ status = "disabled"; }; @@ -236,7 +229,7 @@ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_APB1>, <&osc24M>, <&osc32k>; + clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -256,6 +249,21 @@ function = "hdmi"; };

+ i2c0_pins: i2c0-pins { + pins = "PD25", "PD26"; + function = "i2c0"; + }; + + i2c1_pins: i2c1-pins { + pins = "PH5", "PH6"; + function = "i2c1"; + }; + + i2c2_pins: i2c2-pins { + pins = "PD23", "PD24"; + function = "i2c2"; + }; + mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; @@ -285,6 +293,11 @@ bias-pull-up; };

+ spdif_tx_pin: spdif-tx-pin { + pins = "PH7"; + function = "spdif"; + }; + uart0_ph_pins: uart0-ph-pins { pins = "PH0", "PH1"; function = "uart0"; @@ -394,6 +407,48 @@ status = "disabled"; };

+ i2c0: i2c@5002000 { + compatible = "allwinner,sun50i-h6-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x05002000 0x400>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C0>; + resets = <&ccu RST_BUS_I2C0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: i2c@5002400 { + compatible = "allwinner,sun50i-h6-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x05002400 0x400>; + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C1>; + resets = <&ccu RST_BUS_I2C1>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c2: i2c@5002800 { + compatible = "allwinner,sun50i-h6-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x05002800 0x400>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + emac: ethernet@5020000 { compatible = "allwinner,sun50i-h6-emac", "allwinner,sun50i-a64-emac"; @@ -414,6 +469,21 @@ }; };

+ spdif: spdif@5093000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-h6-spdif"; + reg = <0x05093000 0x400>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; + clock-names = "apb", "spdif"; + resets = <&ccu RST_BUS_SPDIF>; + dmas = <&dma 2>; + dma-names = "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; + status = "disabled"; + }; + usb2otg: usb@5100000 { compatible = "allwinner,sun50i-h6-musb", "allwinner,sun8i-a33-musb"; @@ -480,6 +550,7 @@ resets = <&ccu RST_BUS_OHCI3>, <&ccu RST_BUS_EHCI3>; phys = <&usb2phy 3>; + phy-names = "usb"; status = "disabled"; };

@@ -491,6 +562,7 @@ <&ccu CLK_USB_OHCI3>; resets = <&ccu RST_BUS_OHCI3>; phys = <&usb2phy 3>; + phy-names = "usb"; status = "disabled"; };

@@ -507,7 +579,7 @@ resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>; reset-names = "ctrl", "hdcp"; phys = <&hdmi_phy>; - phy-names = "hdmi-phy"; + phy-names = "phy"; pinctrl-names = "default"; pinctrl-0 = <&hdmi_pins>; status = "disabled"; @@ -636,10 +708,20 @@ }; };

+ rtc: rtc@7000000 { + compatible = "allwinner,sun50i-h6-rtc"; + reg = <0x07000000 0x400>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + clock-output-names = "osc32k", "osc32k-out", "iosc"; + clocks = <&ext_osc32k>; + #clock-cells = <1>; + }; + r_ccu: clock@7010000 { compatible = "allwinner,sun50i-h6-r-ccu"; reg = <0x07010000 0x400>; - clocks = <&osc24M>, <&osc32k>, <&iosc>, + clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; @@ -651,6 +733,7 @@ "allwinner,sun6i-a31-wdt"; reg = <0x07020400 0x20>; interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc24M>; };

r_intc: interrupt-controller@7021000 { @@ -667,7 +750,7 @@ reg = <0x07022000 0x400>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&osc32k>; + clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -678,10 +761,30 @@ pins = "PL0", "PL1"; function = "s_i2c"; }; + + r_ir_rx_pin: r-ir-rx-pin { + pins = "PL9"; + function = "s_cir_rx"; + }; + }; + + r_ir: ir@7040000 { + compatible = "allwinner,sun50i-h6-ir", + "allwinner,sun6i-a31-ir"; + reg = <0x07040000 0x400>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_R_APB1_IR>, + <&r_ccu CLK_IR>; + clock-names = "apb", "ir"; + resets = <&r_ccu RST_R_APB1_IR>; + pinctrl-names = "default"; + pinctrl-0 = <&r_ir_rx_pin>; + status = "disabled"; };

r_i2c: i2c@7081400 { - compatible = "allwinner,sun6i-a31-i2c"; + compatible = "allwinner,sun50i-h6-i2c", + "allwinner,sun6i-a31-i2c"; reg = <0x07081400 0x400>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_R_APB2_I2C>;

The dts is taken from kernel tag v5.4.

The Bluetooth controller of this device ships with a default adress, use the new CONFIG_FIXUP_BDADDR option to fix it up.

Signed-off-by: Andre Heider a.heider@gmail.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun50i-h6-orangepi-3.dts | 287 ++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 + configs/orangepi_3_defconfig | 18 ++ 4 files changed, 311 insertions(+) create mode 100644 arch/arm/dts/sun50i-h6-orangepi-3.dts create mode 100644 configs/orangepi_3_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d8846df1bd..5040d4f50d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -540,6 +540,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \ sun50i-h5-orangepi-zero-plus2.dtb dtb-$(CONFIG_MACH_SUN50I_H6) += \ sun50i-h6-beelink-gs1.dtb \ + sun50i-h6-orangepi-3.dtb \ sun50i-h6-orangepi-lite2.dtb \ sun50i-h6-orangepi-one-plus.dtb \ sun50i-h6-pine-h64.dtb diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts new file mode 100644 index 0000000000..eb379cd402 --- /dev/null +++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts @@ -0,0 +1,287 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Copyright (C) 2019 Ondřej Jirman megous@megous.com + */ + +/dts-v1/; + +#include "sun50i-h6.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "OrangePi 3"; + compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + connector { + compatible = "hdmi-connector"; + ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + power { + label = "orangepi:red:power"; + gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ + default-state = "on"; + }; + + status { + label = "orangepi:green:status"; + gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ + }; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the DC jack */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_vcc33_wifi: vcc33-wifi { + /* Always on 3.3V regulator for WiFi and BT */ + compatible = "regulator-fixed"; + regulator-name = "vcc33-wifi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <&reg_vcc5v>; + }; + + reg_vcc_wifi_io: vcc-wifi-io { + /* Always on 1.8V/300mA regulator for WiFi and BT IO */ + compatible = "regulator-fixed"; + regulator-name = "vcc-wifi-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + vin-supply = <&reg_vcc33_wifi>; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc 1>; + clock-names = "ext_clock"; + reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ + post-power-on-delay-ms = <200>; + }; +}; + +&cpu0 { + cpu-supply = <&reg_dcdca>; +}; + +&de { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&mmc0 { + vmmc-supply = <&reg_cldo1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + status = "okay"; +}; + +&mmc1 { + vmmc-supply = <&reg_vcc33_wifi>; + vqmmc-supply = <&reg_vcc_wifi_io>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + brcm: sdio-wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&r_pio>; + interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ + interrupt-names = "host-wake"; + }; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&pio { + vcc-pc-supply = <&reg_bldo2>; + vcc-pd-supply = <&reg_cldo1>; + vcc-pg-supply = <&reg_vcc_wifi_io>; +}; + +&r_i2c { + status = "okay"; + + axp805: pmic@36 { + compatible = "x-powers,axp805", "x-powers,axp806"; + reg = <0x36>; + interrupt-parent = <&r_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <1>; + x-powers,self-working-mode; + vina-supply = <&reg_vcc5v>; + vinb-supply = <&reg_vcc5v>; + vinc-supply = <&reg_vcc5v>; + vind-supply = <&reg_vcc5v>; + vine-supply = <&reg_vcc5v>; + aldoin-supply = <&reg_vcc5v>; + bldoin-supply = <&reg_vcc5v>; + cldoin-supply = <&reg_vcc5v>; + + regulators { + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pl-led-ir"; + }; + + reg_aldo2: aldo2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33-audio-tv-ephy-mac"; + }; + + /* ALDO3 is shorted to CLDO1 */ + reg_aldo3: aldo3 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1"; + }; + + reg_bldo1: bldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18-dram-bias-pll"; + }; + + reg_bldo2: bldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-efuse-pcie-hdmi-pc"; + }; + + bldo3 { + /* unused */ + }; + + bldo4 { + /* unused */ + }; + + reg_cldo1: cldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2"; + }; + + cldo2 { + /* unused */ + }; + + cldo3 { + /* unused */ + }; + + reg_dcdca: dcdca { + regulator-always-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1160000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdcc: dcdcc { + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1080000>; + regulator-name = "vdd-gpu"; + }; + + reg_dcdcd: dcdcd { + regulator-always-on; + regulator-min-microvolt = <960000>; + regulator-max-microvolt = <960000>; + regulator-name = "vdd-sys"; + }; + + reg_dcdce: dcdce { + regulator-always-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vcc-dram"; + }; + + sw { + /* unused */ + }; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +&usb2otg { + /* + * This board doesn't have a controllable VBUS even though it + * does have an ID pin. Using it as anything but a USB host is + * unsafe. + */ + dr_mode = "host"; + status = "okay"; +}; + +&usb2phy { + usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */ + usb0_vbus-supply = <&reg_vcc5v>; + usb3_vbus-supply = <&reg_vcc5v>; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index a2adf89b5d..3c0fd0cae8 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -375,6 +375,11 @@ M: Icenowy Zheng icenowy@aosc.io S: Maintained F: configs/teres_i_defconfig

+ORANGEPI 3 BOARD +M: Andre Heider a.heider@gmail.com +S: Maintained +F: configs/orangepi_3_defconfig + ORANGEPI LITE2 BOARD M: Jagan Teki jagan@amarulasolutions.com S: Maintained diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig new file mode 100644 index 0000000000..c9db0abb77 --- /dev/null +++ b/configs/orangepi_3_defconfig @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_MACH_SUN50I_H6=y +CONFIG_SUNXI_DRAM_H6_LPDDR3=y +CONFIG_MMC0_CD_PIN="PF6" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_FIXUP_BDADDR="brcm,bcm4345c5" +# CONFIG_PSCI_RESET is not set +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_USE_PREBOOT=y +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3" +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y