On Thu, Jun 27, 2013 at 9:33 PM, Zhang Haijun-B42677 B42677@freescale.comwrote:

Hi, Fleming****

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I found the root cause.****

Our driver didn’t make a distinction between different board for this register. (Just distinguish by esdhc version)****

On p1025 board watermark level was used both for watermark level and burst length.

Be careful in such descriptions. It's the SoC that defines things differently, not the board. P1025 is a chip (SoC). P1025RDB is a board. All P1025s have this difference.

esdhc version should be enough to distinguish between these two. 3041/4240 use esdhc 2.3, while 1025 still uses 2.2. Clearly, we need to add support for distinguishing between those two.

However, what is also clear is that the code, as it is, is currently broken. WML needs to be properly configured under *both* polling and DMA modes, and *that* is the change that needs to be made.

Andy