[U-Boot-Users] Memory Banks & Flash Mapping
Hello u-boot users,
in the README-file you can read this:
- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CFG_REMAP_OR_AM, CFG_PRELIM_OR_AM, CFG_OR_TIMING_FLASH, CFG_OR0_REMAP, CFG_OR0_PRELIM, CFG_BR0_PRELIM, CFG_OR1_REMAP, CFG_OR1_PRELIM, CFG_BR1_PRELIM: Memory Controller Definitions: BR0/1 and OR0/1 (FLASH)
So memory bank 1 shouldn't get used for SDRAM, but bank 2 and 3 ? *_PRELIM is the address before u-boot relocation to RAM, isn't it ? But *_REMAP after that ?
Whats CFG_FLASH_BASE good for, if i have to configure the memory bank base register value of my MPC875-board anyway with CFG_BR0_* ?
Further, i am now facing the problem, that my BR1 SDRAM-memory bank gets changed correctly at u-boot runtime, but the BR0-flash-memory-bank keeps its PRELIM-value when reaching the command shell.
I now wonder, if i misconfigured my board header file, or if not, where i shall add the new memory bank reprogramming code for flash space - in drivers/cfi_flash.c:flash_init() ?
One last question: I am porting u-boot to a not yet very popular developer board with a MPC875. Shall i add my changes although to your CVS repository ?
Thanks in advance
Josef
In message 20060214073113.GA2319@false you wrote:
So memory bank 1 shouldn't get used for SDRAM, but bank 2 and 3 ?
You design the hardware, you it's your choice.
*_PRELIM is the address before u-boot relocation to RAM, isn't it ? But *_REMAP after that ?
Wrong. Please read the README.
Whats CFG_FLASH_BASE good for, if i have to configure the memory bank base register value of my MPC875-board anyway with CFG_BR0_* ?
There is more than just one architecture...
Further, i am now facing the problem, that my BR1 SDRAM-memory bank gets changed correctly at u-boot runtime, but the BR0-flash-memory-bank keeps its PRELIM-value when reaching the command shell.
Misconfigured system?
I now wonder, if i misconfigured my board header file, or if not,
Yes.
where i shall add the new memory bank reprogramming code for flash space
- in drivers/cfi_flash.c:flash_init() ?
??? There should be no need to add anything.
One last question: I am porting u-boot to a not yet very popular developer board with a MPC875. Shall i add my changes although to your CVS repository ?
CVS is dead. We use git now.
Best regards,
Wolfgang Denk
Hello
Further, i am now facing the problem, that my BR1 SDRAM-memory bank gets changed correctly at u-boot runtime, but the BR0-flash-memory-bank keeps its PRELIM-value when reaching the command shell.
Misconfigured system?
from README:
"Because of the reset configuration for CS0# this is a mirror of the onboard Flash memory. To be able to re-map memory U-Boot then jumps to its link address."
I don't get the second sentence. Flash is executed near the beginning of address space, exactly where the SDRAM shall get mapped. How is this possible ?
As far as i understand my (working) u-boot code, relocation just works for my MPC875 board just because SDRAM is 64MB and Flash is 16MB in size. So when both are mapped to 0x0 just the first 16MB overlap and u-boot can be successfully copied at the 64th MB and executed there. But how could it be done if i just got 16MB of SDRAM ?
One last question: I am porting u-boot to a not yet very popular developer board with a MPC875. Shall i add my changes although to your CVS repository ?
CVS is dead. We use git now.
My concern was, if you are interested in my extensions.
Best regards,
Wolfgang Denk
Thanks again Wolfgang
Josef Angermeier
In message 20060217092048.GA4381@false you wrote:
"Because of the reset configuration for CS0# this is a mirror of the onboard Flash memory. To be able to re-map memory U-Boot then jumps to its link address."
I don't get the second sentence. Flash is executed near the beginning of address space, exactly where the SDRAM shall get mapped. How is this possible ?
How is what possible? Jumping to the link addresses? Because the flash gets mirrores many times. Mapping of SDRAM? Because we change the flash mapping from the reset configuration via a pre,liminary into the final mapping.
As far as i understand my (working) u-boot code, relocation just works for my MPC875 board just because SDRAM is 64MB and Flash is 16MB in size. So when both are mapped to 0x0 just the first 16MB overlap and
RAM gets mapped only long after flash has been reconfigured, and then it's out of the way.
My concern was, if you are interested in my extensions.
Yes, of course.
Best regards,
Wolfgang Denk
Hello again!
As far as i understand my (working) u-boot code, relocation just works for my MPC875 board just because SDRAM is 64MB and Flash is 16MB in size. So when both are mapped to 0x0 just the first 16MB overlap and
RAM gets mapped only long after flash has been reconfigured, and then it's out of the way.
I see. Which files hold the sourcecode to map the flash away ? - I'd like to understand that one!
Thanks Wolfang
Best regards, Josef
In message 20060217114421.GB13280@false you wrote:
I see. Which files hold the sourcecode to map the flash away ? - I'd like to understand that one!
That's the memory controller initialization - function cpu_init_f() in "cpu/mpc8xx/cpu_init.c"
Best regards,
Wolfgang Denk
Hello Wolfgang
I see. Which files hold the sourcecode to map the flash away ? - I'd like to understand that one!
That's the memory controller initialization - function cpu_init_f() in "cpu/mpc8xx/cpu_init.c"
AAAHH! Thanks, i think i finally understood it!
My flash memory space gets now fully initialized in cpu_init_f. Changed TEXT_BASE to 0x40f00000 and BR0_PRELIM to 0x40000001.
So MPC875 starts execution at 0xfff00100, because of ignoring the upper 8 address bits and CS0 default usage after reset, u-boot is executed anyway. When jumping to 0x40fXXXXX, the CPU is aware of the flash destination and br0 is updated to 0x40000000 to stop aliasing and keep execution in flash working... :-))) big thanks goes to Wolfgang!
Best regards,
Wolfgang Denk
byebye Josef
participants (2)
-
Josef Angermeier -
Wolfgang Denk