[U-Boot] [PATCHv2 1/2] ARMv8/fsl-layerscape: Correct the OCRAM size
From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
The real size of OCRAM is 128KiB, so correct the size of OCRAM. And OCRAM reserved 2MiB space, then add a new macro to describe it, which is used for MMU setup.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- V2: - New patch
arch/arm/include/asm/arch-fsl-layerscape/config.h | 8 +++++--- arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 8 ++++---- 2 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index c50894a..8e2eea3 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -28,8 +28,9 @@ #define CONFIG_FSL_TZASC_400 #endif
-#define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ -#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00200000 /* 2M */ +#define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ +#define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */ +#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00020000 /* Real size 128K */
/* DDR */ #define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) @@ -137,7 +138,8 @@ #elif defined(CONFIG_FSL_LSCH2) #define CONFIG_SYS_FSL_SEC_COMPAT 5 #define CONFIG_SYS_FSL_OCRAM_BASE 0x10000000 /* initial RAM */ -#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00200000 /* 2M */ +#define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */ +#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00020000 /* Real size 128K */
#define CONFIG_SYS_FSL_CCSR_SCFG_BE #define CONFIG_SYS_FSL_ESDHC_BE diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index a97be5c..4ea4aea 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -93,7 +93,7 @@ static struct mm_region early_map[] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE, - CONFIG_SYS_FSL_OCRAM_SIZE, + SYS_FSL_OCRAM_SPACE_SIZE, PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE }, { CONFIG_SYS_FSL_QSPI_BASE1, CONFIG_SYS_FSL_QSPI_BASE1, @@ -140,7 +140,7 @@ static struct mm_region early_map[] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE, - CONFIG_SYS_FSL_OCRAM_SIZE, + SYS_FSL_OCRAM_SPACE_SIZE, PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE }, { CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_BASE, @@ -178,7 +178,7 @@ static struct mm_region final_map[] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE, - CONFIG_SYS_FSL_OCRAM_SIZE, + SYS_FSL_OCRAM_SPACE_SIZE, PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE }, { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1, @@ -280,7 +280,7 @@ static struct mm_region final_map[] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE, - CONFIG_SYS_FSL_OCRAM_SIZE, + SYS_FSL_OCRAM_SPACE_SIZE, PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE }, { CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_BASE,
From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
Clear the content to zero and the ECC error bit of OCRAM1/2.
The OCRAM must be initialized to ZERO by the unit of 8-Byte before accessing it, or else it will generate ECC error. And the IBR has accessed the OCRAM before this initialization, so the ECC error status bit should to be cleared.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com Signed-off-by: Pratiyush Srivastava pratiyush.srivastava@nxp.com Signed-off-by: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com --- V2: - No change
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 37 +++++++++++++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 ++ 2 files changed, 40 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 72f2c11..bd5cb4e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -209,10 +209,47 @@ ENTRY(lowlevel_init) isb #endif
+#if defined(CONFIG_FSL_LSCH2) && !defined(CONFIG_SPL_BUILD) + bl fsl_ocram_init +#endif + mov lr, x29 /* Restore LR */ ret ENDPROC(lowlevel_init)
+#if defined(CONFIG_FSL_LSCH2) && !defined(CONFIG_SPL_BUILD) +ENTRY(fsl_ocram_init) + mov x28, lr /* Save LR */ + bl fsl_clear_ocram + bl fsl_ocram_clear_ecc_err + mov lr, x28 /* Restore LR */ + ret +ENDPROC(fsl_ocram_init) + +ENTRY(fsl_clear_ocram) +/* Clear OCRAM */ + ldr x0, =CONFIG_SYS_FSL_OCRAM_BASE + ldr x1, =(CONFIG_SYS_FSL_OCRAM_BASE + CONFIG_SYS_FSL_OCRAM_SIZE) + mov x2, #0 +clear_loop: + str x2, [x0] + add x0, x0, #8 + cmp x0, x1 + b.lo clear_loop + ret +ENDPROC(fsl_clear_ocram) + +ENTRY(fsl_ocram_clear_ecc_err) + /* OCRAM1/2 ECC status bit */ + mov w1, #0x60 + ldr x0, =DCSR_DCFG_SBEESR2 + str w1, [x0] + ldr x0, =DCSR_DCFG_MBEESR2 + str w1, [x0] + ret +ENDPROC(fsl_ocram_init) +#endif + #ifdef CONFIG_FSL_LSCH3 .globl get_svr get_svr: diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 8e2eea3..9a1edba 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -141,6 +141,9 @@ #define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */ #define CONFIG_SYS_FSL_OCRAM_SIZE 0x00020000 /* Real size 128K */
+#define DCSR_DCFG_SBEESR2 0x20140534 +#define DCSR_DCFG_MBEESR2 0x20140544 + #define CONFIG_SYS_FSL_CCSR_SCFG_BE #define CONFIG_SYS_FSL_ESDHC_BE #define CONFIG_SYS_FSL_WDOG_BE
On 12/16/2016 01:29 AM, Zhiqiang Hou wrote:
From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
The real size of OCRAM is 128KiB, so correct the size of OCRAM. And OCRAM reserved 2MiB space, then add a new macro to describe it, which is used for MMU setup.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com
V2:
- New patch
arch/arm/include/asm/arch-fsl-layerscape/config.h | 8 +++++--- arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 8 ++++---- 2 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index c50894a..8e2eea3 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -28,8 +28,9 @@ #define CONFIG_FSL_TZASC_400 #endif
-#define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ -#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00200000 /* 2M */ +#define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ +#define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */ +#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00020000 /* Real size 128K */
/* DDR */ #define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) @@ -137,7 +138,8 @@ #elif defined(CONFIG_FSL_LSCH2) #define CONFIG_SYS_FSL_SEC_COMPAT 5 #define CONFIG_SYS_FSL_OCRAM_BASE 0x10000000 /* initial RAM */ -#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00200000 /* 2M */ +#define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */
Zhiqiang,
The history behind the OCRAM size is page table size. We started from fixed table. 2MB was the page granule size to avoid too many tables. With now MMU code, we can use 4KB page granule to get rid of this macro, but I'd rather not to create a new table just for this purpose.
I see you want to use the real OCRAM size to initialize it. Why don't you use a new macro like SYS_FSL_OCRAM_REAL_SIZE so you don't have to change other code. Or better use Kconfig option for the new macro.
York
Hi York,
Thanks a lot for your comments!
-----Original Message----- From: york sun Sent: 2016年12月17日 0:39 To: Z.Q. Hou zhiqiang.hou@nxp.com; u-boot@lists.denx.de; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; Mingkai Hu mingkai.hu@nxp.com; Pratiyush Srivastava pratiyush.srivastava@nxp.com Subject: Re: [PATCHv2 1/2] ARMv8/fsl-layerscape: Correct the OCRAM size
On 12/16/2016 01:29 AM, Zhiqiang Hou wrote:
From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
The real size of OCRAM is 128KiB, so correct the size of OCRAM. And OCRAM reserved 2MiB space, then add a new macro to describe it, which is used for MMU setup.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com
V2:
- New patch
arch/arm/include/asm/arch-fsl-layerscape/config.h | 8 +++++--- arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 8 ++++---- 2 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index c50894a..8e2eea3 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -28,8 +28,9 @@ #define CONFIG_FSL_TZASC_400 #endif
-#define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ -#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00200000 /* 2M */ +#define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ +#define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */ +#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00020000 /* Real size 128K */
/* DDR */ #define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) @@ -137,7 +138,8 @@ #elif defined(CONFIG_FSL_LSCH2) #define CONFIG_SYS_FSL_SEC_COMPAT 5 #define CONFIG_SYS_FSL_OCRAM_BASE 0x10000000 /* initial
RAM */
-#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00200000 /* 2M */ +#define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */
Zhiqiang,
The history behind the OCRAM size is page table size. We started from fixed table. 2MB was the page granule size to avoid too many tables. With now MMU code, we can use 4KB page granule to get rid of this macro, but I'd rather not to create a new table just for this purpose.
I see you want to use the real OCRAM size to initialize it. Why don't you use a new macro like SYS_FSL_OCRAM_REAL_SIZE so you don't have to change other code. Or better use Kconfig option for the new macro.
The OCRAM_SIZE and OCRAM_REAL_SIZE, I afraid it is confusing. I think the OCRAM size and OCRAM base are hardware attributes and it's better to stay them in the config.h.
Thanks, Zhiqiang
On 12/16/2016 01:29 AM, Zhiqiang Hou wrote:
From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
The real size of OCRAM is 128KiB, so correct the size of OCRAM. And OCRAM reserved 2MiB space, then add a new macro to describe it, which is used for MMU setup.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com
V2:
- New patch
This set is applied to fsl-qoriq master, awaiting upstream. Thanks.
York
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Zhiqiang Hou