Canaan Kendryte K230 SoC instantiates a dwc2 v4.30a core. This patch adds the compatible for it.

Signed-off-by: Junhui Liu junhui.liu@pigmoral.tech

--- The USB function on K230 currently relies on patch [1], which updates the core reset flow of dwc2 in version 4.20a and newer. However, the USB PHY drivers is not supported for now, and that will be a separate patch.

[1] https://lore.kernel.org/u-boot/20250110-dwc2-dev-v4-0-987f4fd6f8b2@pigmoral.... --- doc/device-tree-bindings/usb/dwc2.txt | 1 + 1 file changed, 1 insertion(+)

diff --git a/doc/device-tree-bindings/usb/dwc2.txt b/doc/device-tree-bindings/usb/dwc2.txt index 7a533f6593435a9ac23833584cdd0adc14690d14..9a87202d4b9e5f4ac829c8d9e4b7ba4a1583965e 100644 --- a/doc/device-tree-bindings/usb/dwc2.txt +++ b/doc/device-tree-bindings/usb/dwc2.txt @@ -4,6 +4,7 @@ Platform DesignWare HS OTG USB 2.0 controller Required properties: - compatible : One of: - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC. + - canaan,k230-otg: The DWC2 USB controller instance in the K230 SoC. - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC. - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs; - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;

Add initial dts for K230-CanMV powered by Canaan Kendryte K230 SoC, which has two RISC-V C908 cores, a big core with vector 1.0 extension and a small core without vector extension.

This patch is basically comes from Linux Kernel [1] and it assumes u-boot is running on the big core. Additionally, bootctl and reboot nodes are added to support sysreset [2] and an clk_dummy node is added to satisfy dependencies for usb [3].

Currently, u-boot is booted by the vendor's u-boot-spl. To meet the requirements [4][5] of vendor's u-boot-spl for u-boot, a binman node with mkimage child node is added here, which will compress u-boot.bin with gzip and generate an image named "uboot" in the file u-boot-gz.img.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=k230-... [2] https://github.com/kendryte/k230_sdk/blob/v1.8/src/big/rt-smart/kernel/bsp/m... [3] https://lore.kernel.org/linux-riscv/tencent_AD84B436C2F31108B66B4739D6E306C5... [4] https://github.com/kendryte/k230_sdk/blob/v1.8/src/little/uboot/board/canaan... [5] https://github.com/kendryte/k230_sdk/blob/v1.8/src/little/uboot/board/canaan...

Signed-off-by: Junhui Liu junhui.liu@pigmoral.tech --- arch/riscv/dts/Makefile | 1 + arch/riscv/dts/k230-canmv.dts | 31 +++++++ arch/riscv/dts/k230-u-boot.dtsi | 25 ++++++ arch/riscv/dts/k230.dtsi | 175 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 232 insertions(+)

diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index b64fc0daf3cb8223737561c3c2221aeff687b45f..cf1872f3fdc397e6c1ccf533ebfea8421dd967d1 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -2,6 +2,7 @@

dtb-$(CONFIG_TARGET_ANDES_AE350) += ae350_32.dtb ae350_64.dtb dtb-$(CONFIG_TARGET_BANANAPI_F3) += k1-bananapi-f3.dtb +dtb-$(CONFIG_TARGET_K230_CANMV) += k230-canmv.dtb dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += mpfs-icicle-kit.dtb dtb-$(CONFIG_TARGET_MILKV_DUO) += cv1800b-milkv-duo.dtb dtb-$(CONFIG_TARGET_LICHEERV_NANO) += sg2002-licheerv-nano-b.dtb diff --git a/arch/riscv/dts/k230-canmv.dts b/arch/riscv/dts/k230-canmv.dts new file mode 100644 index 0000000000000000000000000000000000000000..ced9c457cc24b35343c1d51569bc7d947840b5fa --- /dev/null +++ b/arch/riscv/dts/k230-canmv.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2024 Yangyu Chen cyy@cyyself.name + * Copyright (C) 2025 Junhui Liu junhui.liu@pigmoral.tech + */ + +/dts-v1/; +#include "k230.dtsi" + +/ { + model = "Canaan CanMV-K230"; + compatible = "canaan,canmv-k230", "canaan,kendryte-k230"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x20000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +/* onboard RTL8152 */ +&usb1 { + status = "okay"; +}; diff --git a/arch/riscv/dts/k230-u-boot.dtsi b/arch/riscv/dts/k230-u-boot.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..bb66ad3c153df8655b4540760d95b4bc708c0036 --- /dev/null +++ b/arch/riscv/dts/k230-u-boot.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2025 Junhui Liu junhui.liu@pigmoral.tech + */ + +#include <linux/stringify.h> + +/ { + binman: binman { + }; +}; + +&binman { + mkimage { + filename = "u-boot-gz.img"; + args = "-A", "riscv", "-T", "firmware", "-O", "u-boot", + "-C", "gzip", "-n", "uboot", + "-a", __stringify(CONFIG_TEXT_BASE), + "-e", __stringify(CONFIG_TEXT_BASE); + blob { + filename = "u-boot.bin"; + compress = "gzip"; + }; + }; +}; diff --git a/arch/riscv/dts/k230.dtsi b/arch/riscv/dts/k230.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..cf596677de18a4d984d5f5f973dca61a86fe66cb --- /dev/null +++ b/arch/riscv/dts/k230.dtsi @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2024 Yangyu Chen cyy@cyyself.name + * Copyright (C) 2025 Junhui Liu junhui.liu@pigmoral.tech + */ + +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + #address-cells = <2>; + #size-cells = <2>; + compatible = "canaan,kendryte-k230"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <27000000>; + + cpu@0 { + compatible = "thead,c908", "riscv"; + device_type = "cpu"; + reg = <0>; + riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zfh_zba_zbb_zbc_zbs_zvfh_svpbmt"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", + "zicbop", "zicboz", "zicntr", "zicsr", "zifencei", + "zihpm", "zfh", "zba", "zbb", "zbc", "zbs", "zvfh", + "svpbmt"; + riscv,cbom-block-size = <64>; + riscv,cbop-block-size = <64>; + riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu0_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + }; + + apb_clk: apb-clk-clock { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + clock-output-names = "apb_clk"; + #clock-cells = <0>; + }; + + clk_dummy: clock-dummy { + compatible = "fixed-clock"; + clock-frequency = <0>; + clock-output-names = "clk_dummy"; + #clock-cells = <0>; + }; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&bootctl>; + offset = <0x60>; + mask = <0x10001>; + value = <0x10001>; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&plic>; + #address-cells = <2>; + #size-cells = <2>; + dma-noncoherent; + ranges; + + bootctl: syscon@0x91102000 { + compatible = "syscon"; + reg = <0x0 0x91102000 0x0 0x1000>; + }; + + plic: interrupt-controller@f00000000 { + compatible = "canaan,k230-plic" ,"thead,c900-plic"; + reg = <0xf 0x00000000 0x0 0x04000000>; + interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + riscv,ndev = <208>; + }; + + clint: timer@f04000000 { + compatible = "canaan,k230-clint", "thead,c900-clint"; + reg = <0xf 0x04000000 0x0 0x00010000>; + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; + }; + + uart0: serial@91400000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91400000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart1: serial@91401000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91401000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart2: serial@91402000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91402000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart3: serial@91403000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91403000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart4: serial@91404000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91404000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + usb0: usb@91500000 { + compatible = "canaan,k230-otg", "snps,dwc2"; + reg = <0x0 0x91500000 0x0 0x40000>; + interrupts = <173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_dummy>; + clock-names = "otg"; + g-rx-fifo-size = <512>; + g-np-tx-fifo-size = <64>; + g-tx-fifo-size = <512 1024 64 64 64 64>; + status = "disabled"; + }; + + usb1: usb@91540000 { + compatible = "canaan,k230-otg", "snps,dwc2"; + reg = <0x0 0x91540000 0x0 0x40000>; + interrupts = <174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_dummy>; + clock-names = "otg"; + g-rx-fifo-size = <512>; + g-np-tx-fifo-size = <64>; + g-tx-fifo-size = <512 1024 64 64 64 64>; + status = "disabled"; + }; + }; +};

Add Canaan K230 SoC with sysreset support, running without cache enabled.

Signed-off-by: Junhui Liu junhui.liu@pigmoral.tech --- arch/riscv/Kconfig | 5 +++++ arch/riscv/cpu/k230/Kconfig | 14 ++++++++++++++ arch/riscv/cpu/k230/Makefile | 6 ++++++ arch/riscv/cpu/k230/cpu.c | 9 +++++++++ arch/riscv/cpu/k230/dram.c | 21 +++++++++++++++++++++ 5 files changed, 55 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a160d24fb033eafeee70971a1bff12b545d23a2e..faf70cb5d4c7987b40f46234a26276bc10d270bb 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -14,6 +14,9 @@ config TARGET_ANDES_AE350 config TARGET_BANANAPI_F3 bool "Support BananaPi F3 Board"

+config TARGET_K230_CANMV + bool "Support K230 CanMV Board" + config TARGET_LICHEERV_NANO bool "Support LicheeRV Nano Board"

@@ -91,6 +94,7 @@ config SPL_ZERO_MEM_BEFORE_USE # board-specific options below source "board/andestech/ae350/Kconfig" source "board/aspeed/ibex_ast2700/Kconfig" +source "board/canaan/k230_canmv/Kconfig" source "board/emulation/qemu-riscv/Kconfig" source "board/microchip/mpfs_icicle/Kconfig" source "board/openpiton/riscv64/Kconfig" @@ -113,6 +117,7 @@ source "arch/riscv/cpu/ast2700/Kconfig" source "arch/riscv/cpu/generic/Kconfig" source "arch/riscv/cpu/jh7110/Kconfig" source "arch/riscv/cpu/k1/Kconfig" +source "arch/riscv/cpu/k230/Kconfig"

# architecture-specific options below

diff --git a/arch/riscv/cpu/k230/Kconfig b/arch/riscv/cpu/k230/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..d76ad92a04908f1be3002ce95f13637ce9e96722 --- /dev/null +++ b/arch/riscv/cpu/k230/Kconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2025, Junhui Liu junhui.liu@pigmoral.tech + +config CANAAN_K230 + bool + select ARCH_EARLY_INIT_R + select BINMAN + imply CPU + imply CPU_RISCV + imply RISCV_TIMER + imply CMD_CPU + imply SYSRESET + imply SYSRESET_SYSCON diff --git a/arch/riscv/cpu/k230/Makefile b/arch/riscv/cpu/k230/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..6e321cf3ed19525656efa2c58270e7a9800c9002 --- /dev/null +++ b/arch/riscv/cpu/k230/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2025, Junhui Liu junhui.liu@pigmoral.tech + +obj-y += dram.o +obj-y += cpu.o diff --git a/arch/riscv/cpu/k230/cpu.c b/arch/riscv/cpu/k230/cpu.c new file mode 100644 index 0000000000000000000000000000000000000000..417a25f0a8ba33e3ed288860a27c64a4a584cc6b --- /dev/null +++ b/arch/riscv/cpu/k230/cpu.c @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2025, Junhui Liu junhui.liu@pigmoral.tech + */ + +int cleanup_before_linux(void) +{ + return 0; +} diff --git a/arch/riscv/cpu/k230/dram.c b/arch/riscv/cpu/k230/dram.c new file mode 100644 index 0000000000000000000000000000000000000000..b2d3e4fd6a96d7fc6ca8b8507f4eba85f7e9c9b5 --- /dev/null +++ b/arch/riscv/cpu/k230/dram.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018, Bin Meng bmeng.cn@gmail.com + */ + +#include <asm/global_data.h> +#include <fdtdec.h> +#include <init.h> +#include <linux/sizes.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +}

Add support for K230 CanMV board with serial console and usb otg support. It can boot via vendor's u-boot-spl and boot into Linux via tftp through the onboard RTL8152.

Signed-off-by: Junhui Liu junhui.liu@pigmoral.tech --- board/canaan/k230_canmv/Kconfig | 19 +++++++++++++++++++ board/canaan/k230_canmv/MAINTAINERS | 6 ++++++ board/canaan/k230_canmv/Makefile | 5 +++++ board/canaan/k230_canmv/board.c | 9 +++++++++ configs/k230_canmv_defconfig | 19 +++++++++++++++++++ 5 files changed, 58 insertions(+)

diff --git a/board/canaan/k230_canmv/Kconfig b/board/canaan/k230_canmv/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..e793e9993e8e72de43931f3a40b1020c43b7160b --- /dev/null +++ b/board/canaan/k230_canmv/Kconfig @@ -0,0 +1,19 @@ +if TARGET_K230_CANMV + +config SYS_BOARD + default "k230_canmv" + +config SYS_VENDOR + default "canaan" + +config SYS_CPU + default "k230" + +config TEXT_BASE + default 0x0 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select CANAAN_K230 + +endif diff --git a/board/canaan/k230_canmv/MAINTAINERS b/board/canaan/k230_canmv/MAINTAINERS new file mode 100644 index 0000000000000000000000000000000000000000..fb925e1b16748754e289ce28a29b7acb890b2e2f --- /dev/null +++ b/board/canaan/k230_canmv/MAINTAINERS @@ -0,0 +1,6 @@ +K230 CANMV +M: Junhui Liu junhui.liu@pigmoral.tech +S: Maintained +F: board/canaan/k230_canmv/ +F: configs/k230_canmv_defconfig +F: doc/board/canaan/k230_canmv.rst diff --git a/board/canaan/k230_canmv/Makefile b/board/canaan/k230_canmv/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..acab631106ab17db04d2e98b0a7fa2a00b4f7d2f --- /dev/null +++ b/board/canaan/k230_canmv/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2025, Junhui Liu junhui.liu@pigmoral.tech + +obj-y += board.o diff --git a/board/canaan/k230_canmv/board.c b/board/canaan/k230_canmv/board.c new file mode 100644 index 0000000000000000000000000000000000000000..a705ee8f67be5ae5b1b3e7e4371a71f82da1b4c3 --- /dev/null +++ b/board/canaan/k230_canmv/board.c @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2025, Junhui Liu junhui.liu@pigmoral.tech + */ + +int board_init(void) +{ + return 0; +} diff --git a/configs/k230_canmv_defconfig b/configs/k230_canmv_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..47fa1add2a9c5a80bb613216bd4b7363b486ae29 --- /dev/null +++ b/configs/k230_canmv_defconfig @@ -0,0 +1,19 @@ +CONFIG_RISCV=y +CONFIG_SYS_MALLOC_F_LEN=0x40000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 +CONFIG_DEFAULT_DEVICE_TREE="k230-canmv" +CONFIG_SYS_LOAD_ADDR=0xc000000 +CONFIG_TARGET_K230_CANMV=y +CONFIG_ARCH_RV64I=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="K230# " +CONFIG_CMD_USB=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_NS16550=y +CONFIG_SYS_NS16550_MEM32=y +CONFIG_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_RTL8152=y

Add description of compiling u-boot for K230 CanMV.

Since the vendor's u-boot-spl verifies u-boot header [1], it is necessary to use the Python script from vendor to add the header to the u-boot image.

[1] https://github.com/kendryte/k230_sdk/blob/v1.8/src/little/uboot/board/canaan...

Signed-off-by: Junhui Liu junhui.liu@pigmoral.tech --- doc/board/canaan/index.rst | 8 ++++ doc/board/canaan/k230_canmv.rst | 88 +++++++++++++++++++++++++++++++++++++++++ doc/board/index.rst | 1 + 3 files changed, 97 insertions(+)

diff --git a/doc/board/canaan/index.rst b/doc/board/canaan/index.rst new file mode 100644 index 0000000000000000000000000000000000000000..e2892d2a7f342f507516a11eb81cd26181ecf66b --- /dev/null +++ b/doc/board/canaan/index.rst @@ -0,0 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Canaan +====== +.. toctree:: + :maxdepth: 1 + + k230_canmv diff --git a/doc/board/canaan/k230_canmv.rst b/doc/board/canaan/k230_canmv.rst new file mode 100644 index 0000000000000000000000000000000000000000..534ad7cb7a89ad1de2b18bcac64c120cdaec5003 --- /dev/null +++ b/doc/board/canaan/k230_canmv.rst @@ -0,0 +1,88 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +K230 CanMV +========== + +K230 RISC-V SoC +------------------ +The K230 chip is the latest generation SoC product in Canaan Technology's +Kendryte series of AIOT chips. + +Mainline support +---------------- + +The support for following drivers are already enabled: + +1. ns16550 UART +2. DWC2 OTG USB controller + +Building +~~~~~~~~ + +1. Get the RISC-V toolchain. +2. Setup cross compilation environment variable: +3. Get the `firmware_gen.py`_ from vendor. + +.. code-block:: console + + export CROSS_COMPILE=riscv64-linux-gnu- + cd <U-Boot-dir> + make k230_canmv_defconfig + make + cp u-boot-gz.img u-boot-gz.img.tmp + pip install gmssl pycryptodome + python3 firmware_gen.py -i u-boot-gz.img.tmp -o u-boot-head.img -n + +This will generate u-boot-head.img. + +.. _firmware_gen.py: https://raw.githubusercontent.com/kendryte/k230_sdk/refs/tags/v1.8/src/littl... + +Booting +~~~~~~~ + +Currently, we rely on vendor u-boot-spl to initialize the +ddr and load the u-boot image, then bootup from it. + +1. Prepare a SD card with the `vendor image`_ burned on it. + +2. Write the U-Boot image to the SD card at offset 2MB. + +.. code-block:: console + + dd if=u-boot-head.img of=/dev/sd[x] bs=1M seek=2 + +3. Insert the SD card into the board and power it on. + +.. _vendor image: https://kendryte-download.canaan-creative.com/developer/k230/CanMV-K230_debi... + +Sample boot log from K230 CanMV board +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. code-block:: none + + U-Boot 2025.01-00645-g2d81c4788455 (Jan 14 2025 - 23:15:07 +0800) + + DRAM: 512 MiB + Core: 15 devices, 11 uclasses, devicetree: separate + Loading Environment from nowhere... OK + In: serial@91400000 + Out: serial@91400000 + Err: serial@91400000 + Net: No ethernet found. + K230# cpu list + 0: cpu@0 thead,c908 + K230# usb start + starting USB... + Bus usb@91540000: USB DWC2 + scanning bus usb@91540000 for devices... + Warning: r8152_eth (eth0) using random MAC address - 1e:33:97:47:e6:32 + 2 USB Device(s) found + K230# usb tree + USB device tree: + 1 Hub (480 Mb/s, 0mA) + | U-Boot Root Hub + | + +-2 Vendor specific (480 Mb/s, 100mA) + Realtek USB 10/100 LAN 000000000000 + + K230# diff --git a/doc/board/index.rst b/doc/board/index.rst index b1c470eb2cbb1c07f907eb2282039520c219c72a..74c4dd1f42d7e6a6d877020a79cb0a4f9c7c5335 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -21,6 +21,7 @@ Board-specific doc beagle/index broadcom/index bsh/index + canaan/index cloos/index congatec/index coolpi/index