Hi Eric,

On Sun, Aug 28, 2016 at 6:04 PM, Eric Nelson eric@nelint.com wrote:

On 08/28/2016 01:59 PM, Eric Nelson wrote:

...

Hi Fabio, Peng, and all.

I just ran into a problem with bus frequency switching on the EVK and there appears to be a U-Boot component.

Using the 4.1.15 kernel from git.freescale.com (commit a4d2a08) and the latest U-Boot from Stefano's imx tree (commit a3e5519) causes the EVK to hang during a bus frequency switch to LOW_POWER mode.

The last gasp is this: Bus freq set to 24000000 start...

And the code block in question is here: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/ma...

When using the binary U-Boot 2015.07 from the EVK package (commit d7d7c43 from git.freescale.com), the kernel gets through the frequency switch and produces this message.

  Bus freq set to 24000000 done!

I first saw this problem with u-boot-fslc branch v2016.07 and linux-fslc (4.1.29 and 4.1.30).

Has anybody else experienced this?

I forgot to mention it, but this is easy to reproduce by downing both ethernet interfaces and blanking the display.

    ifconfig eth0 down
    ifconfig eth1 down
    echo 1 > /sys/class/graphics/fb0/blank

I was able to reproduce this problem here.

The major difference between mainline U-Boot and NXP U-Boot is that mainline U-Boot uses SPL and NXP U-Boot uses imximage.cfg to configure the DDR.

I have just created and tested the patch below against Stefano's tree: http://pastebin.com/crAe1Yr1

, which basically uses imximage.cfg from NXP U-Boot instead of SPL and the hang does not occur.

It seems to me that we need to carefully review the SPL DDR init code in mainline in order to fix this problem.

I will try to take a look at it tomorrow, but if anyone spots the DDR problem in the SPL code, then feel free to submit the patch :-)

Thanks,

Fabio Estevam

Hi Fabio,

On 08/28/2016 07:47 PM, Fabio Estevam wrote:

On Sun, Aug 28, 2016 at 6:04 PM, Eric Nelson eric@nelint.com wrote:

...

On 08/28/2016 01:59 PM, Eric Nelson wrote:

...

Hi Fabio, Peng, and all.

I just ran into a problem with bus frequency switching on the EVK and there appears to be a U-Boot component.

Using the 4.1.15 kernel from git.freescale.com (commit a4d2a08) and the latest U-Boot from Stefano's imx tree (commit a3e5519) causes the EVK to hang during a bus frequency switch to LOW_POWER mode.

The last gasp is this: Bus freq set to 24000000 start...

<snip>

Has anybody else experienced this?

<snip>

I was able to reproduce this problem here.

The major difference between mainline U-Boot and NXP U-Boot is that mainline U-Boot uses SPL and NXP U-Boot uses imximage.cfg to configure the DDR.

Right, and unfortunately, walking the differences can be time consuming.

I have just created and tested the patch below against Stefano's tree: http://pastebin.com/crAe1Yr1

, which basically uses imximage.cfg from NXP U-Boot instead of SPL and the hang does not occur.

Cool. That narrows things down a lot.

It seems to me that we need to carefully review the SPL DDR init code in mainline in order to fix this problem.

Or clock tree.

I will try to take a look at it tomorrow, but if anyone spots the DDR problem in the SPL code, then feel free to submit the patch :-)

Will do.

Regards,

Eric