[U-Boot] [PATCH V2 RESEND] nand: fix buffer alignment in new verification feature
From: Stephen Warren swarren@nvidia.com
On systems with caches enabled, NAND I/O may need to flush/invalidate the cache during read/write operations. For this to work correctly, all buffers must be cache-aligned. Fix nand_verify*() to allocate aligned buffers.
This prevents cache alignment warnings from being spewed when using U-Boot to write an updated version of itself to flash on NVIDIA Tegra Seaboard (after perturbation of stack/data layout in current u-boot-dm/next branch).
I have validatd (executed) nand_verify(), but I don't think I've executed nand_verify_page_oob(); testing of that would be useful.
Cc: Peter Tyser ptyser@xes-inc.com Cc: Heiko Schocher hs@denx.de Cc: Scott Wood scottwood@freescale.com Fixes: 59b5a2ad83df ("nand: Add verification functions") Signed-off-by: Stephen Warren swarren@nvidia.com Reviewed-by: Simon Glass sjg@chromium.org Acked-by: Scott Wood scottwood@freescale.com --- Resending to Tom for direct application, including reviewed-/acked-by tags from others.
As an aside, I think this patch demonstrates why new features shouldn't be merged just a couple weeks before the release; there's not enough time to detect regressions and patch them. The merge window is for new features.
v2: Use memalign() rather than ALLOC_CACHE_ALIGN_BUFFER() so that the buffer is allocated from the heap not on the stack, to reduce stack usage.
drivers/mtd/nand/nand_util.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index 12dd26a33fac..ee2c24df3b85 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -483,7 +483,7 @@ int nand_verify_page_oob(nand_info_t *nand, struct mtd_oob_ops *ops, loff_t ofs)
memcpy(&vops, ops, sizeof(vops));
- vops.datbuf = malloc(verlen); + vops.datbuf = memalign(ARCH_DMA_MINALIGN, verlen);
if (!vops.datbuf) return -ENOMEM; @@ -520,7 +520,7 @@ int nand_verify(nand_info_t *nand, loff_t ofs, size_t len, u_char *buf) int rval = 0; size_t verofs; size_t verlen = nand->writesize; - uint8_t *verbuf = malloc(verlen); + uint8_t *verbuf = memalign(ARCH_DMA_MINALIGN, verlen);
if (!verbuf) return -ENOMEM;
Hello Stephen,
Am 06.05.2015 18:01, schrieb Stephen Warren:
From: Stephen Warren swarren@nvidia.com
On systems with caches enabled, NAND I/O may need to flush/invalidate the cache during read/write operations. For this to work correctly, all buffers must be cache-aligned. Fix nand_verify*() to allocate aligned buffers.
This prevents cache alignment warnings from being spewed when using U-Boot to write an updated version of itself to flash on NVIDIA Tegra Seaboard (after perturbation of stack/data layout in current u-boot-dm/next branch).
I have validatd (executed) nand_verify(), but I don't think I've executed nand_verify_page_oob(); testing of that would be useful.
Cc: Peter Tyser ptyser@xes-inc.com Cc: Heiko Schocher hs@denx.de Cc: Scott Wood scottwood@freescale.com Fixes: 59b5a2ad83df ("nand: Add verification functions") Signed-off-by: Stephen Warren swarren@nvidia.com Reviewed-by: Simon Glass sjg@chromium.org Acked-by: Scott Wood scottwood@freescale.com
Resending to Tom for direct application, including reviewed-/acked-by tags from others.
As an aside, I think this patch demonstrates why new features shouldn't be merged just a couple weeks before the release; there's not enough time to detect regressions and patch them. The merge window is for new features.
Yes, with new features we should be more conservative.
v2: Use memalign() rather than ALLOC_CACHE_ALIGN_BUFFER() so that the buffer is allocated from the heap not on the stack, to reduce stack usage.
drivers/mtd/nand/nand_util.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Thanks for detecting this.
Acked-by: Heiko Schocher hs@denx.de
bye, Heiko
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index 12dd26a33fac..ee2c24df3b85 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -483,7 +483,7 @@ int nand_verify_page_oob(nand_info_t *nand, struct mtd_oob_ops *ops, loff_t ofs)
memcpy(&vops, ops, sizeof(vops));
- vops.datbuf = malloc(verlen);
vops.datbuf = memalign(ARCH_DMA_MINALIGN, verlen);
if (!vops.datbuf) return -ENOMEM;
@@ -520,7 +520,7 @@ int nand_verify(nand_info_t *nand, loff_t ofs, size_t len, u_char *buf) int rval = 0; size_t verofs; size_t verlen = nand->writesize;
- uint8_t *verbuf = malloc(verlen);
uint8_t *verbuf = memalign(ARCH_DMA_MINALIGN, verlen);
if (!verbuf) return -ENOMEM;
On 05/06/2015 09:54 PM, Heiko Schocher wrote:
Hello Stephen,
Am 06.05.2015 18:01, schrieb Stephen Warren:
From: Stephen Warren swarren@nvidia.com
On systems with caches enabled, NAND I/O may need to flush/invalidate the cache during read/write operations. For this to work correctly, all buffers must be cache-aligned. Fix nand_verify*() to allocate aligned buffers.
This prevents cache alignment warnings from being spewed when using U-Boot to write an updated version of itself to flash on NVIDIA Tegra Seaboard (after perturbation of stack/data layout in current u-boot-dm/next branch).
I have validatd (executed) nand_verify(), but I don't think I've executed nand_verify_page_oob(); testing of that would be useful.
Is there any chance of this being applied? It's been 5 weeks since it was first sent.
Cc: Peter Tyser ptyser@xes-inc.com Cc: Heiko Schocher hs@denx.de Cc: Scott Wood scottwood@freescale.com Fixes: 59b5a2ad83df ("nand: Add verification functions") Signed-off-by: Stephen Warren swarren@nvidia.com Reviewed-by: Simon Glass sjg@chromium.org Acked-by: Scott Wood scottwood@freescale.com
Resending to Tom for direct application, including reviewed-/acked-by tags from others.
As an aside, I think this patch demonstrates why new features shouldn't be merged just a couple weeks before the release; there's not enough time to detect regressions and patch them. The merge window is for new features.
Yes, with new features we should be more conservative.
v2: Use memalign() rather than ALLOC_CACHE_ALIGN_BUFFER() so that the buffer is allocated from the heap not on the stack, to reduce stack usage.
drivers/mtd/nand/nand_util.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Thanks for detecting this.
Acked-by: Heiko Schocher hs@denx.de
bye, Heiko
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index 12dd26a33fac..ee2c24df3b85 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -483,7 +483,7 @@ int nand_verify_page_oob(nand_info_t *nand, struct mtd_oob_ops *ops, loff_t ofs)
memcpy(&vops, ops, sizeof(vops));
- vops.datbuf = malloc(verlen);
vops.datbuf = memalign(ARCH_DMA_MINALIGN, verlen);
if (!vops.datbuf) return -ENOMEM;
@@ -520,7 +520,7 @@ int nand_verify(nand_info_t *nand, loff_t ofs, size_t len, u_char *buf) int rval = 0; size_t verofs; size_t verlen = nand->writesize;
- uint8_t *verbuf = malloc(verlen);
uint8_t *verbuf = memalign(ARCH_DMA_MINALIGN, verlen);
if (!verbuf) return -ENOMEM;
On Thu, 2015-05-21 at 13:02 -0600, Stephen Warren wrote:
On 05/06/2015 09:54 PM, Heiko Schocher wrote:
Hello Stephen,
Am 06.05.2015 18:01, schrieb Stephen Warren:
From: Stephen Warren swarren@nvidia.com
On systems with caches enabled, NAND I/O may need to flush/invalidate the cache during read/write operations. For this to work correctly, all buffers must be cache-aligned. Fix nand_verify*() to allocate aligned buffers.
This prevents cache alignment warnings from being spewed when using U-Boot to write an updated version of itself to flash on NVIDIA Tegra Seaboard (after perturbation of stack/data layout in current u-boot-dm/next branch).
I have validatd (executed) nand_verify(), but I don't think I've executed nand_verify_page_oob(); testing of that would be useful.
Is there any chance of this being applied? It's been 5 weeks since it was first sent.
Sorry about the delay. I'll send a pull request soon.
-Scott
participants (3)
-
Heiko Schocher -
Scott Wood -
Stephen Warren