[PATCH] arm: mach-k3: arm64-mmu: do not map ATF and OPTEE regions in A53 MMU
From: Kamlesh Gurudasani kamlesh@ti.com
Do not include ATF and OPTEE regions in MMU table for am64, am62, am62a as access to those regions is not allowed anyway.
Create separate table as ATF region are at different location for am64 and am62/am62a.
Signed-off-by: Kamlesh Gurudasani kamlesh@ti.com --- arch/arm/mach-k3/arm64-mmu.c | 64 +++++++++++++++++++++++++++++++++--- 1 file changed, 59 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c index 88687c2d09..f8087d2421 100644 --- a/arch/arm/mach-k3/arm64-mmu.c +++ b/arch/arm/mach-k3/arm64-mmu.c @@ -222,14 +222,13 @@ struct mm_region *mem_map = j721s2_mem_map;
#endif /* CONFIG_SOC_K3_J721S2 */
-#if defined(CONFIG_SOC_K3_AM642) || defined(CONFIG_SOC_K3_AM625) || \ - defined(CONFIG_SOC_K3_AM62A7) +#if defined(CONFIG_SOC_K3_AM625) || defined(CONFIG_SOC_K3_AM62A7)
/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */ -#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3) +#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
/* ToDo: Add 64bit IO */ -struct mm_region am64_mem_map[NR_MMU_REGIONS] = { +struct mm_region am62_mem_map[NR_MMU_REGIONS] = { { .virt = 0x0UL, .phys = 0x0UL, @@ -240,9 +239,64 @@ struct mm_region am64_mem_map[NR_MMU_REGIONS] = { }, { .virt = 0x80000000UL, .phys = 0x80000000UL, + .size = 0x1E780000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0xA0000000UL, + .phys = 0xA0000000UL, + .size = 0x60000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + + }, { + .virt = 0x880000000UL, + .phys = 0x880000000UL, .size = 0x80000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x500000000UL, + .phys = 0x500000000UL, + .size = 0x400000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = am62_mem_map; +#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */ + +#ifdef CONFIG_SOC_K3_AM642 + +/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */ +#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4) + +/* ToDo: Add 64bit IO */ +struct mm_region am64_mem_map[NR_MMU_REGIONS] = { + { + .virt = 0x0UL, + .phys = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0x1E800000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0xA0000000UL, + .phys = 0xA0000000UL, + .size = 0x60000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE }, { .virt = 0x880000000UL, .phys = 0x880000000UL, @@ -263,4 +317,4 @@ struct mm_region am64_mem_map[NR_MMU_REGIONS] = { };
struct mm_region *mem_map = am64_mem_map; -#endif /* CONFIG_SOC_K3_AM642 || CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */ +#endif /* CONFIG_SOC_K3_AM642 */
On 5/11/23 4:58 AM, kamlesh@ti.com wrote:
From: Kamlesh Gurudasani kamlesh@ti.com
Do not include ATF and OPTEE regions in MMU table for am64, am62, am62a as access to those regions is not allowed anyway.
Commit messages should include the "why" we are doing this.
Create separate table as ATF region are at different location for am64 and am62/am62a.
We should find a way to get the reserved regions from DT, this table is growing unmaintainable.
Andrew
Signed-off-by: Kamlesh Gurudasani kamlesh@ti.com
arch/arm/mach-k3/arm64-mmu.c | 64 +++++++++++++++++++++++++++++++++--- 1 file changed, 59 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c index 88687c2d09..f8087d2421 100644 --- a/arch/arm/mach-k3/arm64-mmu.c +++ b/arch/arm/mach-k3/arm64-mmu.c @@ -222,14 +222,13 @@ struct mm_region *mem_map = j721s2_mem_map;
#endif /* CONFIG_SOC_K3_J721S2 */
-#if defined(CONFIG_SOC_K3_AM642) || defined(CONFIG_SOC_K3_AM625) || \
- defined(CONFIG_SOC_K3_AM62A7)
+#if defined(CONFIG_SOC_K3_AM625) || defined(CONFIG_SOC_K3_AM62A7)
/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */ -#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3) +#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
/* ToDo: Add 64bit IO */ -struct mm_region am64_mem_map[NR_MMU_REGIONS] = { +struct mm_region am62_mem_map[NR_MMU_REGIONS] = { { .virt = 0x0UL, .phys = 0x0UL, @@ -240,9 +239,64 @@ struct mm_region am64_mem_map[NR_MMU_REGIONS] = { }, { .virt = 0x80000000UL, .phys = 0x80000000UL,
.size = 0x1E780000UL,.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |PTE_BLOCK_INNER_SHARE- }, {
.virt = 0xA0000000UL,.phys = 0xA0000000UL,.size = 0x60000000UL,.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |PTE_BLOCK_INNER_SHARE- }, {
.virt = 0x880000000UL,.phys = 0x880000000UL,- }, {
.virt = 0x500000000UL,.phys = 0x500000000UL,.size = 0x400000000UL,.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |PTE_BLOCK_NON_SHARE |PTE_BLOCK_PXN | PTE_BLOCK_UXN- }, {
/* List terminator */0,- }
+};
+struct mm_region *mem_map = am62_mem_map; +#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
+#ifdef CONFIG_SOC_K3_AM642
+/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */ +#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
+/* ToDo: Add 64bit IO */ +struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
- {
.virt = 0x0UL,.phys = 0x0UL,.size = 0x80000000UL,.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |PTE_BLOCK_NON_SHARE |PTE_BLOCK_PXN | PTE_BLOCK_UXN- }, {
.virt = 0x80000000UL,.phys = 0x80000000UL,.size = 0x1E800000UL,.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |PTE_BLOCK_INNER_SHARE- }, {
.virt = 0xA0000000UL,.phys = 0xA0000000UL,.size = 0x60000000UL,.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |PTE_BLOCK_INNER_SHARE@@ -263,4 +317,4 @@ struct mm_region am64_mem_map[NR_MMU_REGIONS] = { };
struct mm_region *mem_map = am64_mem_map; -#endif /* CONFIG_SOC_K3_AM642 || CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */ +#endif /* CONFIG_SOC_K3_AM642 */
participants (2)
-
Andrew Davis -
kamlesh＠ti.com