[PATCH v2] clk: zynqmp: enable topsw_lsbus clock
Display port is using topsw_lsbus clock, it is failing while enabling the clock, so enable the topsw_lsbus clock.
Signed-off-by: Sreekanth Sunnam sreekanth.sunnam@amd.com Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com --- Changes in v2: - Fixed the name to Sreekanth Sunnam. --- drivers/clk/clk_zynqmp.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c index 1cfe0e25b1..c059b9e8e6 100644 --- a/drivers/clk/clk_zynqmp.c +++ b/drivers/clk/clk_zynqmp.c @@ -844,6 +844,7 @@ static int zynqmp_clk_enable(struct clk *clk) break; case qspi_ref ... can1_ref: case lpd_lsbus: + case topsw_lsbus: clkact_shift = 24; mask = 0x1; break;
On 12/4/23 09:45, Venkatesh Yadav Abbarapu wrote:
Display port is using topsw_lsbus clock, it is failing while enabling the clock, so enable the topsw_lsbus clock.
Signed-off-by: Sreekanth Sunnam sreekanth.sunnam@amd.com Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com
Changes in v2:
- Fixed the name to Sreekanth Sunnam.
drivers/clk/clk_zynqmp.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c index 1cfe0e25b1..c059b9e8e6 100644 --- a/drivers/clk/clk_zynqmp.c +++ b/drivers/clk/clk_zynqmp.c @@ -844,6 +844,7 @@ static int zynqmp_clk_enable(struct clk *clk) break; case qspi_ref ... can1_ref: case lpd_lsbus:
- case topsw_lsbus: clkact_shift = 24; mask = 0x1; break;
Applied. M
participants (2)
-
Michal Simek -
Venkatesh Yadav Abbarapu