[U-Boot] [PATCH] cm-t35: fix incorrect NAND_ECC layout selection
The current configuration selects an incorrect NAND ECC layout, which causes u-boot to write HW ECC data incorrectly. This patch selects the right layout.
Signed-off-by: Nikita Kiryanov nikita@compulab.co.il --- include/configs/cm_t35.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 1419f06..e0dd3fb 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -174,7 +174,7 @@ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ -#define GPMC_NAND_ECC_LP_x16_LAYOUT +#define GPMC_NAND_ECC_LP_x8_LAYOUT
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */
On Mon, Jul 02, 2012 at 03:27:59PM +0300, Nikita Kiryanov wrote:
The current configuration selects an incorrect NAND ECC layout, which causes u-boot to write HW ECC data incorrectly. This patch selects the right layout.
Signed-off-by: Nikita Kiryanov nikita@compulab.co.il
This change is correct on all boards and not due to a change in NAND parts used in newer revisions or anything, correct?
On 07/02/2012 07:06 PM, Tom Rini wrote:
On Mon, Jul 02, 2012 at 03:27:59PM +0300, Nikita Kiryanov wrote:
The current configuration selects an incorrect NAND ECC layout, which causes u-boot to write HW ECC data incorrectly. This patch selects the right layout.
Signed-off-by: Nikita Kiryanov nikita@compulab.co.il
This change is correct on all boards and not due to a change in NAND parts used in newer revisions or anything, correct?
Yes. All our boards have 8 bit NAND chips.
participants (2)
-
Nikita Kiryanov -
Tom Rini