[U-Boot] [PATCH 1/3] fsl_esdhc: Always stop clock before changing frequency
We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx.
Signed-off-by: Kumar Gala galak@kernel.crashing.org --- drivers/mmc/fsl_esdhc.c | 11 +++-------- include/fsl_esdhc.h | 3 +-- 2 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index e665b5e..85354e8 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -1,5 +1,5 @@ /* - * Copyright 2007, Freescale Semiconductor, Inc + * Copyright 2007,2010 Freescale Semiconductor, Inc * Andy Fleming * * Based vaguely on the pxa mmc code: @@ -265,18 +265,13 @@ void set_sysctl(struct mmc *mmc, uint clock)
clk = (pre_div << 8) | (div << 4);
- /* On imx the clock must be stopped before changing frequency */ - if (cfg->clk_enable) - esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); + esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk);
udelay(10000);
- clk = SYSCTL_PEREN; - /* On imx systems the clock must be explicitely enabled */ - if (cfg->clk_enable) - clk |= SYSCTL_CKEN; + clk = SYSCTL_PEREN | SYSCTL_CKEN;
esdhc_setbits32(®s->sysctl, clk); } diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 01b7dec..57a08cd 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -2,7 +2,7 @@ * FSL SD/MMC Defines *------------------------------------------------------------------- * - * Copyright 2007-2008, Freescale Semiconductor, Inc + * Copyright 2007-2008,2010 Freescale Semiconductor, Inc * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -148,7 +148,6 @@ struct fsl_esdhc_cfg { u32 esdhc_base; u32 no_snoop; - u32 clk_enable; };
/* Select the correct accessors depending on endianess */
From: Jerry Huang Chang-Ming.Huang@freescale.com
To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function.
Signed-off-by: Jerry Huang Chang-Ming.Huang@freescale.com Signed-off-by: Roy Zang tie-fei.zang@freescale.com --- drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++ include/fsl_esdhc.h | 1 + 2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 85354e8..999b581 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -344,6 +344,20 @@ static int esdhc_init(struct mmc *mmc) return ret; }
+static void esdhc_reset(struct fsl_esdhc *regs) +{ + unsigned long timeout = 100; /* wait max 100 ms */ + + /* reset the controller */ + esdhc_write32(®s->sysctl, SYSCTL_RSTA); + + /* hardware clears the bit when it is done */ + while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout) + udelay(1000); + if (!timeout) + printf("MMC/SD: Reset never completed.\n"); +} + int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) { struct fsl_esdhc *regs; @@ -358,6 +372,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) sprintf(mmc->name, "FSL_ESDHC"); regs = (struct fsl_esdhc *)cfg->esdhc_base;
+ /* First reset the eSDHC controller */ + esdhc_reset(regs); + mmc->priv = cfg; mmc->send_cmd = esdhc_send_cmd; mmc->set_ios = esdhc_set_ios; diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 57a08cd..5f02018 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -39,6 +39,7 @@ #define SYSCTL_PEREN 0x00000004 #define SYSCTL_HCKEN 0x00000002 #define SYSCTL_IPGEN 0x00000001 +#define SYSCTL_RSTA 0x01000000
#define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000)
From: Roy Zang tie-fei.zang@freescale.com
Maintain the value of the reset of wml register rather than hard coding it
Signed-off-by: Roy Zang tie-fei.zang@freescale.com --- drivers/mmc/fsl_esdhc.c | 7 ++++--- include/fsl_esdhc.h | 2 ++ 2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 999b581..b3d99dc 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -110,8 +110,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) if (wml_value > 0x10) wml_value = 0x10;
- wml_value = 0x100000 | wml_value; - + wml_value |= in_be32(®s->wml) & ~WML_RD_WML_MASK; esdhc_write32(®s->dsaddr, (u32)data->dest); } else { if (wml_value > 0x80) @@ -120,7 +119,9 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); return TIMEOUT; } - wml_value = wml_value << 16 | 0x10; + + esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); + esdhc_write32(®s->dsaddr, (u32)data->src); }
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 5f02018..f9ae15a 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -133,6 +133,8 @@
#define WML 0x2e044 #define WML_WRITE 0x00010000 +#define WML_RD_WML_MASK 0xff +#define WML_WR_WML_MASK 0xff0000
#define BLKATTR 0x2e004 #define BLKATTR_CNT(x) ((x & 0xffff) << 16)
On Mar 19, 2010, at 10:38 AM, Kumar Gala wrote:
From: Roy Zang tie-fei.zang@freescale.com
Maintain the value of the reset of wml register rather than hard coding it
Signed-off-by: Roy Zang tie-fei.zang@freescale.com
drivers/mmc/fsl_esdhc.c | 7 ++++--- include/fsl_esdhc.h | 2 ++ 2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 999b581..b3d99dc 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -110,8 +110,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) if (wml_value > 0x10) wml_value = 0x10;
wml_value = 0x100000 | wml_value;
wml_value |= in_be32(®s->wml) & ~WML_RD_WML_MASK;
oops, should be esdhc_read32() instead of in_be32().
esdhc_write32(®s->dsaddr, (u32)data->dest);} else { if (wml_value > 0x80) @@ -120,7 +119,9 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); return TIMEOUT; }
wml_value = wml_value << 16 | 0x10;
esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16);- esdhc_write32(®s->dsaddr, (u32)data->src); }
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 5f02018..f9ae15a 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -133,6 +133,8 @@
#define WML 0x2e044 #define WML_WRITE 0x00010000 +#define WML_RD_WML_MASK 0xff +#define WML_WR_WML_MASK 0xff0000
#define BLKATTR 0x2e004
#define BLKATTR_CNT(x) ((x & 0xffff) << 16)
1.6.0.6
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Kumar Gala wrote:
From: Jerry Huang Chang-Ming.Huang@freescale.com
To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function.
Signed-off-by: Jerry Huang Chang-Ming.Huang@freescale.com Signed-off-by: Roy Zang tie-fei.zang@freescale.com
Tested successfully on mx51evk.
Acked-by: Stefano Babic sbabic@denx.de
Regards, Stefano
On Mar 20, 2010, at 12:56 PM, Stefano Babic wrote:
Kumar Gala wrote:
From: Jerry Huang Chang-Ming.Huang@freescale.com
To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function.
Signed-off-by: Jerry Huang Chang-Ming.Huang@freescale.com Signed-off-by: Roy Zang tie-fei.zang@freescale.com
Tested successfully on mx51evk.
Acked-by: Stefano Babic sbabic@denx.de
applied to 85xx-next.
- k
Kumar Gala wrote:
We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx.
Signed-off-by: Kumar Gala galak@kernel.crashing.org
drivers/mmc/fsl_esdhc.c | 11 +++-------- include/fsl_esdhc.h | 3 +-- 2 files changed, 4 insertions(+), 10 deletions(-)
Agree, but please remove clk_enable from the mx51evk.c, too.
Tested successfully on mx51evk.
Acked-by: Stefano Babic sbabic@denx.de
Regards, Stefano
On Mar 20, 2010, at 12:54 PM, Stefano Babic wrote:
Kumar Gala wrote:
We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx.
Signed-off-by: Kumar Gala galak@kernel.crashing.org
drivers/mmc/fsl_esdhc.c | 11 +++-------- include/fsl_esdhc.h | 3 +-- 2 files changed, 4 insertions(+), 10 deletions(-)
Agree, but please remove clk_enable from the mx51evk.c, too.
Tested successfully on mx51evk.
Acked-by: Stefano Babic sbabic@denx.de
applied to 85xx-next.
- k
participants (2)
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Kumar Gala -
Stefano Babic