[PATCH 00/16] Refactor the architecture parts of mt7628

This patch series are divided into two parts:
The main part is to rewrite the whole architecture code of mt7628: 1. Lock parts of the d-cache for initial stack so the rest of the code can be reimplemented in C. 2. Memory controller & DDR initialization have been fully written to support detecting DDR size automatically. 3. DDR calibration has also been reimplemented with a clear logic. 4. Implemented a new sysreset driver to take advantage of the reset controller so we can drop the use of syscon-based sysreset to reduce size.
The second part is to add SPL support for mt7628: 1. With SPL enabled we can build the ROM-bootable and RAM-bootable binary simultaneously, and we can drop RAM boot related configs and defconfig files. 2. Generate compressed u-boot.bin image for SPL to reduce size of final combined binary. 3. Add a demo board (mt7628_rfb) to make use of the compressed image.
Weijie Gao (16): configs: mtmips: add missing board selection for gardena-smart-gateway-mt7688 mips: add support to restore exception vector base before booting linux mips: mtmips: add predefined i-cache/d-cache size and linesize mips: add an option to support customized get_tbclk() mips: add an option to support initialize SRAM for initial stack mips: start.S: avoid overwriting outside gd when clearing global data in stack sysreset: add reset controller based reboot driver mips: mtmips: rewrite lowlevel codes of mt7628 mips: dts: rename mt7628a.dtsi to mt7628.dtsi mips: unconditionally enable u_boot_list section in u-boot-spl.lds lib: enable lzma decompression support for SPL build Makefile: add support to generate LZMA compressed u-boot image tools: binman: add etype file for u-boot-lzma-img mips: mtmips: add SPL support mips: mtmips: enable SPL for all boards mips: mtmips: add support for mt7628-rfb
Makefile | 22 ++ arch/mips/Kconfig | 32 ++ arch/mips/cpu/start.S | 10 +- arch/mips/cpu/time.c | 2 + arch/mips/cpu/u-boot-spl.lds | 2 - arch/mips/dts/Makefile | 1 + .../mips/dts/gardena-smart-gateway-mt7688.dts | 2 +- arch/mips/dts/linkit-smart-7688.dts | 2 +- arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi | 24 ++ arch/mips/dts/mediatek,mt7628-rfb.dts | 67 ++++ arch/mips/dts/mt7628-u-boot.dtsi | 25 ++ arch/mips/dts/{mt7628a.dtsi => mt7628.dtsi} | 78 +---- arch/mips/include/asm/global_data.h | 3 + arch/mips/lib/bootm.c | 9 + arch/mips/mach-mtmips/Kconfig | 122 ++----- arch/mips/mach-mtmips/Makefile | 8 +- arch/mips/mach-mtmips/cpu.c | 58 +--- arch/mips/mach-mtmips/ddr_cal.c | 211 +++++++++++ arch/mips/mach-mtmips/ddr_calibrate.c | 309 ----------------- arch/mips/mach-mtmips/ddr_init.c | 194 +++++++++++ arch/mips/mach-mtmips/include/mach/ddr.h | 52 +++ arch/mips/mach-mtmips/include/mach/mc.h | 180 ++++++++++ arch/mips/mach-mtmips/lowlevel_init.S | 328 ------------------ arch/mips/mach-mtmips/mt7628/Makefile | 5 + arch/mips/mach-mtmips/mt7628/ddr.c | 173 +++++++++ arch/mips/mach-mtmips/mt7628/init.c | 109 ++++++ arch/mips/mach-mtmips/mt7628/lowlevel_init.S | 155 +++++++++ arch/mips/mach-mtmips/mt7628/mt7628.h | 90 +++++ arch/mips/mach-mtmips/mt76xx.h | 32 -- arch/mips/mach-mtmips/spl.c | 23 ++ board/gardena/smart-gateway-mt7688/board.c | 2 + board/mediatek/mt7628/Kconfig | 12 + board/mediatek/mt7628/MAINTAINERS | 8 + board/mediatek/mt7628/Makefile | 4 + board/mediatek/mt7628/board.c | 25 ++ board/mediatek/mt7628/spl_load.c | 102 ++++++ ...gardena-smart-gateway-mt7688-ram_defconfig | 74 ---- .../gardena-smart-gateway-mt7688_defconfig | 12 +- configs/linkit-smart-7688-ram_defconfig | 65 ---- configs/linkit-smart-7688_defconfig | 11 +- configs/mt7628_rfb_defconfig | 47 +++ drivers/sysreset/Kconfig | 6 + drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_resetctl.c | 48 +++ .../configs/gardena-smart-gateway-mt7688.h | 18 +- include/configs/linkit-smart-7688.h | 18 +- include/configs/mt7628.h | 57 +++ lib/Kconfig | 5 + lib/Makefile | 1 + tools/binman/etype/u_boot_lzma_img.py | 27 ++ 50 files changed, 1826 insertions(+), 1045 deletions(-) create mode 100644 arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi create mode 100644 arch/mips/dts/mediatek,mt7628-rfb.dts create mode 100644 arch/mips/dts/mt7628-u-boot.dtsi rename arch/mips/dts/{mt7628a.dtsi => mt7628.dtsi} (81%) create mode 100644 arch/mips/mach-mtmips/ddr_cal.c delete mode 100644 arch/mips/mach-mtmips/ddr_calibrate.c create mode 100644 arch/mips/mach-mtmips/ddr_init.c create mode 100644 arch/mips/mach-mtmips/include/mach/ddr.h create mode 100644 arch/mips/mach-mtmips/include/mach/mc.h delete mode 100644 arch/mips/mach-mtmips/lowlevel_init.S create mode 100644 arch/mips/mach-mtmips/mt7628/Makefile create mode 100644 arch/mips/mach-mtmips/mt7628/ddr.c create mode 100644 arch/mips/mach-mtmips/mt7628/init.c create mode 100644 arch/mips/mach-mtmips/mt7628/lowlevel_init.S create mode 100644 arch/mips/mach-mtmips/mt7628/mt7628.h delete mode 100644 arch/mips/mach-mtmips/mt76xx.h create mode 100644 arch/mips/mach-mtmips/spl.c create mode 100644 board/mediatek/mt7628/Kconfig create mode 100644 board/mediatek/mt7628/MAINTAINERS create mode 100644 board/mediatek/mt7628/Makefile create mode 100644 board/mediatek/mt7628/board.c create mode 100644 board/mediatek/mt7628/spl_load.c delete mode 100644 configs/gardena-smart-gateway-mt7688-ram_defconfig delete mode 100644 configs/linkit-smart-7688-ram_defconfig create mode 100644 configs/mt7628_rfb_defconfig create mode 100644 drivers/sysreset/sysreset_resetctl.c create mode 100644 include/configs/mt7628.h create mode 100644 tools/binman/etype/u_boot_lzma_img.py

Hi Weijie,
On 08.01.20 03:59, Weijie Gao wrote:
This patch series are divided into two parts:
The main part is to rewrite the whole architecture code of mt7628:
- Lock parts of the d-cache for initial stack so the rest of the code can be reimplemented in C.
- Memory controller & DDR initialization have been fully written to support detecting DDR size automatically.
- DDR calibration has also been reimplemented with a clear logic.
- Implemented a new sysreset driver to take advantage of the reset controller so we can drop the use of syscon-based sysreset to reduce size.
The second part is to add SPL support for mt7628:
- With SPL enabled we can build the ROM-bootable and RAM-bootable binary simultaneously, and we can drop RAM boot related configs and defconfig files.
- Generate compressed u-boot.bin image for SPL to reduce size of final combined binary.
- Add a demo board (mt7628_rfb) to make use of the compressed image.
Many thanks for working on this. Unfortunately I didn't receive these patches directly (I remember that you had problems sending patches to me before).
I did a quick test on the LinkIt board and have a few questions before I start reviewing the patches in more detail:
I don't see any serial output from the SPL. I assume that the muxing for UART2 is missing here in the SPL image (see board_debug_uart_init)?
Did you compare the boot speed with using SPL + main U-Boot vs U-Boot only?
In the current combined image the non-compressed U-Boot proper is included. Why did you not include the LZMA compressed image per default? Is the decompression too slow?
More comments / questions will follow in a few days.
Weijie Gao (16): configs: mtmips: add missing board selection for gardena-smart-gateway-mt7688 mips: add support to restore exception vector base before booting linux mips: mtmips: add predefined i-cache/d-cache size and linesize mips: add an option to support customized get_tbclk() mips: add an option to support initialize SRAM for initial stack mips: start.S: avoid overwriting outside gd when clearing global data in stack sysreset: add reset controller based reboot driver mips: mtmips: rewrite lowlevel codes of mt7628 mips: dts: rename mt7628a.dtsi to mt7628.dtsi mips: unconditionally enable u_boot_list section in u-boot-spl.lds lib: enable lzma decompression support for SPL build Makefile: add support to generate LZMA compressed u-boot image tools: binman: add etype file for u-boot-lzma-img mips: mtmips: add SPL support mips: mtmips: enable SPL for all boards mips: mtmips: add support for mt7628-rfb
Makefile | 22 ++ arch/mips/Kconfig | 32 ++ arch/mips/cpu/start.S | 10 +- arch/mips/cpu/time.c | 2 + arch/mips/cpu/u-boot-spl.lds | 2 - arch/mips/dts/Makefile | 1 + .../mips/dts/gardena-smart-gateway-mt7688.dts | 2 +- arch/mips/dts/linkit-smart-7688.dts | 2 +- arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi | 24 ++ arch/mips/dts/mediatek,mt7628-rfb.dts | 67 ++++ arch/mips/dts/mt7628-u-boot.dtsi | 25 ++ arch/mips/dts/{mt7628a.dtsi => mt7628.dtsi} | 78 +---- arch/mips/include/asm/global_data.h | 3 + arch/mips/lib/bootm.c | 9 + arch/mips/mach-mtmips/Kconfig | 122 ++----- arch/mips/mach-mtmips/Makefile | 8 +- arch/mips/mach-mtmips/cpu.c | 58 +--- arch/mips/mach-mtmips/ddr_cal.c | 211 +++++++++++ arch/mips/mach-mtmips/ddr_calibrate.c | 309 ----------------- arch/mips/mach-mtmips/ddr_init.c | 194 +++++++++++ arch/mips/mach-mtmips/include/mach/ddr.h | 52 +++ arch/mips/mach-mtmips/include/mach/mc.h | 180 ++++++++++ arch/mips/mach-mtmips/lowlevel_init.S | 328 ------------------ arch/mips/mach-mtmips/mt7628/Makefile | 5 + arch/mips/mach-mtmips/mt7628/ddr.c | 173 +++++++++ arch/mips/mach-mtmips/mt7628/init.c | 109 ++++++ arch/mips/mach-mtmips/mt7628/lowlevel_init.S | 155 +++++++++ arch/mips/mach-mtmips/mt7628/mt7628.h | 90 +++++ arch/mips/mach-mtmips/mt76xx.h | 32 -- arch/mips/mach-mtmips/spl.c | 23 ++ board/gardena/smart-gateway-mt7688/board.c | 2 + board/mediatek/mt7628/Kconfig | 12 + board/mediatek/mt7628/MAINTAINERS | 8 + board/mediatek/mt7628/Makefile | 4 + board/mediatek/mt7628/board.c | 25 ++ board/mediatek/mt7628/spl_load.c | 102 ++++++ ...gardena-smart-gateway-mt7688-ram_defconfig | 74 ---- .../gardena-smart-gateway-mt7688_defconfig | 12 +- configs/linkit-smart-7688-ram_defconfig | 65 ---- configs/linkit-smart-7688_defconfig | 11 +- configs/mt7628_rfb_defconfig | 47 +++ drivers/sysreset/Kconfig | 6 + drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_resetctl.c | 48 +++ .../configs/gardena-smart-gateway-mt7688.h | 18 +- include/configs/linkit-smart-7688.h | 18 +- include/configs/mt7628.h | 57 +++ lib/Kconfig | 5 + lib/Makefile | 1 + tools/binman/etype/u_boot_lzma_img.py | 27 ++ 50 files changed, 1826 insertions(+), 1045 deletions(-) create mode 100644 arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi create mode 100644 arch/mips/dts/mediatek,mt7628-rfb.dts create mode 100644 arch/mips/dts/mt7628-u-boot.dtsi rename arch/mips/dts/{mt7628a.dtsi => mt7628.dtsi} (81%) create mode 100644 arch/mips/mach-mtmips/ddr_cal.c delete mode 100644 arch/mips/mach-mtmips/ddr_calibrate.c create mode 100644 arch/mips/mach-mtmips/ddr_init.c create mode 100644 arch/mips/mach-mtmips/include/mach/ddr.h create mode 100644 arch/mips/mach-mtmips/include/mach/mc.h delete mode 100644 arch/mips/mach-mtmips/lowlevel_init.S create mode 100644 arch/mips/mach-mtmips/mt7628/Makefile create mode 100644 arch/mips/mach-mtmips/mt7628/ddr.c create mode 100644 arch/mips/mach-mtmips/mt7628/init.c create mode 100644 arch/mips/mach-mtmips/mt7628/lowlevel_init.S create mode 100644 arch/mips/mach-mtmips/mt7628/mt7628.h delete mode 100644 arch/mips/mach-mtmips/mt76xx.h create mode 100644 arch/mips/mach-mtmips/spl.c create mode 100644 board/mediatek/mt7628/Kconfig create mode 100644 board/mediatek/mt7628/MAINTAINERS create mode 100644 board/mediatek/mt7628/Makefile create mode 100644 board/mediatek/mt7628/board.c create mode 100644 board/mediatek/mt7628/spl_load.c delete mode 100644 configs/gardena-smart-gateway-mt7688-ram_defconfig delete mode 100644 configs/linkit-smart-7688-ram_defconfig create mode 100644 configs/mt7628_rfb_defconfig create mode 100644 drivers/sysreset/sysreset_resetctl.c create mode 100644 include/configs/mt7628.h create mode 100644 tools/binman/etype/u_boot_lzma_img.py
Viele Grüße, Stefan

Hi Stefan,
On Thu, 2020-01-09 at 08:52 +0100, Stefan Roese wrote:
Hi Weijie,
On 08.01.20 03:59, Weijie Gao wrote:
This patch series are divided into two parts:
The main part is to rewrite the whole architecture code of mt7628:
- Lock parts of the d-cache for initial stack so the rest of the code can be reimplemented in C.
- Memory controller & DDR initialization have been fully written to support detecting DDR size automatically.
- DDR calibration has also been reimplemented with a clear logic.
- Implemented a new sysreset driver to take advantage of the reset controller so we can drop the use of syscon-based sysreset to reduce size.
The second part is to add SPL support for mt7628:
- With SPL enabled we can build the ROM-bootable and RAM-bootable binary simultaneously, and we can drop RAM boot related configs and defconfig files.
- Generate compressed u-boot.bin image for SPL to reduce size of final combined binary.
- Add a demo board (mt7628_rfb) to make use of the compressed image.
Many thanks for working on this. Unfortunately I didn't receive these patches directly (I remember that you had problems sending patches to me before).
I did a quick test on the LinkIt board and have a few questions before I start reviewing the patches in more detail:
I don't see any serial output from the SPL. I assume that the muxing for UART2 is missing here in the SPL image (see board_debug_uart_init)?
I'll do further test for this.
Did you compare the boot speed with using SPL + main U-Boot vs U-Boot only?
As far as I tested the difference of boot time should be less than 1s.
In the current combined image the non-compressed U-Boot proper is included. Why did you not include the LZMA compressed image per default? Is the decompression too slow?
I just kept these two boards untouched. I can switch them to compressed mode if you have no concern.
More comments / questions will follow in a few days.
Weijie Gao (16): configs: mtmips: add missing board selection for gardena-smart-gateway-mt7688 mips: add support to restore exception vector base before booting linux mips: mtmips: add predefined i-cache/d-cache size and linesize mips: add an option to support customized get_tbclk() mips: add an option to support initialize SRAM for initial stack mips: start.S: avoid overwriting outside gd when clearing global data in stack sysreset: add reset controller based reboot driver mips: mtmips: rewrite lowlevel codes of mt7628 mips: dts: rename mt7628a.dtsi to mt7628.dtsi mips: unconditionally enable u_boot_list section in u-boot-spl.lds lib: enable lzma decompression support for SPL build Makefile: add support to generate LZMA compressed u-boot image tools: binman: add etype file for u-boot-lzma-img mips: mtmips: add SPL support mips: mtmips: enable SPL for all boards mips: mtmips: add support for mt7628-rfb
Makefile | 22 ++ arch/mips/Kconfig | 32 ++ arch/mips/cpu/start.S | 10 +- arch/mips/cpu/time.c | 2 + arch/mips/cpu/u-boot-spl.lds | 2 - arch/mips/dts/Makefile | 1 + .../mips/dts/gardena-smart-gateway-mt7688.dts | 2 +- arch/mips/dts/linkit-smart-7688.dts | 2 +- arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi | 24 ++ arch/mips/dts/mediatek,mt7628-rfb.dts | 67 ++++ arch/mips/dts/mt7628-u-boot.dtsi | 25 ++ arch/mips/dts/{mt7628a.dtsi => mt7628.dtsi} | 78 +---- arch/mips/include/asm/global_data.h | 3 + arch/mips/lib/bootm.c | 9 + arch/mips/mach-mtmips/Kconfig | 122 ++----- arch/mips/mach-mtmips/Makefile | 8 +- arch/mips/mach-mtmips/cpu.c | 58 +--- arch/mips/mach-mtmips/ddr_cal.c | 211 +++++++++++ arch/mips/mach-mtmips/ddr_calibrate.c | 309 ----------------- arch/mips/mach-mtmips/ddr_init.c | 194 +++++++++++ arch/mips/mach-mtmips/include/mach/ddr.h | 52 +++ arch/mips/mach-mtmips/include/mach/mc.h | 180 ++++++++++ arch/mips/mach-mtmips/lowlevel_init.S | 328 ------------------ arch/mips/mach-mtmips/mt7628/Makefile | 5 + arch/mips/mach-mtmips/mt7628/ddr.c | 173 +++++++++ arch/mips/mach-mtmips/mt7628/init.c | 109 ++++++ arch/mips/mach-mtmips/mt7628/lowlevel_init.S | 155 +++++++++ arch/mips/mach-mtmips/mt7628/mt7628.h | 90 +++++ arch/mips/mach-mtmips/mt76xx.h | 32 -- arch/mips/mach-mtmips/spl.c | 23 ++ board/gardena/smart-gateway-mt7688/board.c | 2 + board/mediatek/mt7628/Kconfig | 12 + board/mediatek/mt7628/MAINTAINERS | 8 + board/mediatek/mt7628/Makefile | 4 + board/mediatek/mt7628/board.c | 25 ++ board/mediatek/mt7628/spl_load.c | 102 ++++++ ...gardena-smart-gateway-mt7688-ram_defconfig | 74 ---- .../gardena-smart-gateway-mt7688_defconfig | 12 +- configs/linkit-smart-7688-ram_defconfig | 65 ---- configs/linkit-smart-7688_defconfig | 11 +- configs/mt7628_rfb_defconfig | 47 +++ drivers/sysreset/Kconfig | 6 + drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_resetctl.c | 48 +++ .../configs/gardena-smart-gateway-mt7688.h | 18 +- include/configs/linkit-smart-7688.h | 18 +- include/configs/mt7628.h | 57 +++ lib/Kconfig | 5 + lib/Makefile | 1 + tools/binman/etype/u_boot_lzma_img.py | 27 ++ 50 files changed, 1826 insertions(+), 1045 deletions(-) create mode 100644 arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi create mode 100644 arch/mips/dts/mediatek,mt7628-rfb.dts create mode 100644 arch/mips/dts/mt7628-u-boot.dtsi rename arch/mips/dts/{mt7628a.dtsi => mt7628.dtsi} (81%) create mode 100644 arch/mips/mach-mtmips/ddr_cal.c delete mode 100644 arch/mips/mach-mtmips/ddr_calibrate.c create mode 100644 arch/mips/mach-mtmips/ddr_init.c create mode 100644 arch/mips/mach-mtmips/include/mach/ddr.h create mode 100644 arch/mips/mach-mtmips/include/mach/mc.h delete mode 100644 arch/mips/mach-mtmips/lowlevel_init.S create mode 100644 arch/mips/mach-mtmips/mt7628/Makefile create mode 100644 arch/mips/mach-mtmips/mt7628/ddr.c create mode 100644 arch/mips/mach-mtmips/mt7628/init.c create mode 100644 arch/mips/mach-mtmips/mt7628/lowlevel_init.S create mode 100644 arch/mips/mach-mtmips/mt7628/mt7628.h delete mode 100644 arch/mips/mach-mtmips/mt76xx.h create mode 100644 arch/mips/mach-mtmips/spl.c create mode 100644 board/mediatek/mt7628/Kconfig create mode 100644 board/mediatek/mt7628/MAINTAINERS create mode 100644 board/mediatek/mt7628/Makefile create mode 100644 board/mediatek/mt7628/board.c create mode 100644 board/mediatek/mt7628/spl_load.c delete mode 100644 configs/gardena-smart-gateway-mt7688-ram_defconfig delete mode 100644 configs/linkit-smart-7688-ram_defconfig create mode 100644 configs/mt7628_rfb_defconfig create mode 100644 drivers/sysreset/sysreset_resetctl.c create mode 100644 include/configs/mt7628.h create mode 100644 tools/binman/etype/u_boot_lzma_img.py
Viele Grüße, Stefan

Hi Weijie,
On 09.01.20 09:49, Weijie Gao wrote:
On Thu, 2020-01-09 at 08:52 +0100, Stefan Roese wrote:
Hi Weijie,
On 08.01.20 03:59, Weijie Gao wrote:
This patch series are divided into two parts:
The main part is to rewrite the whole architecture code of mt7628:
- Lock parts of the d-cache for initial stack so the rest of the code can be reimplemented in C.
- Memory controller & DDR initialization have been fully written to support detecting DDR size automatically.
- DDR calibration has also been reimplemented with a clear logic.
- Implemented a new sysreset driver to take advantage of the reset controller so we can drop the use of syscon-based sysreset to reduce size.
The second part is to add SPL support for mt7628:
- With SPL enabled we can build the ROM-bootable and RAM-bootable binary simultaneously, and we can drop RAM boot related configs and defconfig files.
- Generate compressed u-boot.bin image for SPL to reduce size of final combined binary.
- Add a demo board (mt7628_rfb) to make use of the compressed image.
Many thanks for working on this. Unfortunately I didn't receive these patches directly (I remember that you had problems sending patches to me before).
I did a quick test on the LinkIt board and have a few questions before I start reviewing the patches in more detail:
I don't see any serial output from the SPL. I assume that the muxing for UART2 is missing here in the SPL image (see board_debug_uart_init)?
I'll do further test for this.
I also did some tests and here is a WIP patch that fixes this issue for the LinkIt board. Please feel free to integrate it into your next patch set version:
diff --git a/arch/mips/mach-mtmips/spl.c b/arch/mips/mach-mtmips/spl.c index 37172abadf..33b4485be2 100644 --- a/arch/mips/mach-mtmips/spl.c +++ b/arch/mips/mach-mtmips/spl.c @@ -7,10 +7,25 @@
#include <common.h> #include <spl.h> +#include <asm/io.h> + +#define MT76XX_GPIO1_MODE 0x10000060 + +static void uart2_mux_init(void) +{ + void __iomem *gpio_mode; + + /* Select UART2 mode instead of GPIO mode (default) */ + gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100); + clrbits_le32(gpio_mode, GENMASK(27, 26)); +}
void __noreturn board_init_f(ulong dummy) { #ifdef CONFIG_SPL_SERIAL_SUPPORT +#if CONFIG_CONS_INDEX == 3 + uart2_mux_init(); +#endif preloader_console_init(); #endif
diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 01705ee2a5..b4bba9dcc5 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -32,8 +32,10 @@ #define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_CLK 40000000 #define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_COM1 0xb0000e00 -#define CONFIG_CONS_INDEX 1 +/* Console index starts with 1 -> UART2 = IDX 3 */ +#define CONFIG_SYS_NS16550_COM3 0xb0000e00 +#undef CONFIG_CONS_INDEX +#define CONFIG_CONS_INDEX 3 #endif
/* UART */
Did you compare the boot speed with using SPL + main U-Boot vs U-Boot only?
As far as I tested the difference of boot time should be less than 1s.
1 second is quite a lot of time. I prefer to stay with the non compressed boot configuration then. Testing shows that the new SPL based version also boots pretty fast, when the main U-Boot proper is not compressed.
In the current combined image the non-compressed U-Boot proper is included. Why did you not include the LZMA compressed image per default? Is the decompression too slow?
I just kept these two boards untouched. I can switch them to compressed mode if you have no concern.
I did not test yet. If its really a difference in time of 1 second (or similar), then let stay with uncompressed for these board please.
Thanks, Stefan

On Thu, 2020-01-09 at 13:36 +0100, Stefan Roese wrote:
Hi Weijie,
On 09.01.20 09:49, Weijie Gao wrote:
On Thu, 2020-01-09 at 08:52 +0100, Stefan Roese wrote:
Hi Weijie,
On 08.01.20 03:59, Weijie Gao wrote:
This patch series are divided into two parts:
The main part is to rewrite the whole architecture code of mt7628:
- Lock parts of the d-cache for initial stack so the rest of the code can be reimplemented in C.
- Memory controller & DDR initialization have been fully written to support detecting DDR size automatically.
- DDR calibration has also been reimplemented with a clear logic.
- Implemented a new sysreset driver to take advantage of the reset controller so we can drop the use of syscon-based sysreset to reduce size.
The second part is to add SPL support for mt7628:
- With SPL enabled we can build the ROM-bootable and RAM-bootable binary simultaneously, and we can drop RAM boot related configs and defconfig files.
- Generate compressed u-boot.bin image for SPL to reduce size of final combined binary.
- Add a demo board (mt7628_rfb) to make use of the compressed image.
Many thanks for working on this. Unfortunately I didn't receive these patches directly (I remember that you had problems sending patches to me before).
I did a quick test on the LinkIt board and have a few questions before I start reviewing the patches in more detail:
I don't see any serial output from the SPL. I assume that the muxing for UART2 is missing here in the SPL image (see board_debug_uart_init)?
I'll do further test for this.
I also did some tests and here is a WIP patch that fixes this issue for the LinkIt board. Please feel free to integrate it into your next patch set version:
diff --git a/arch/mips/mach-mtmips/spl.c b/arch/mips/mach-mtmips/spl.c index 37172abadf..33b4485be2 100644 --- a/arch/mips/mach-mtmips/spl.c +++ b/arch/mips/mach-mtmips/spl.c @@ -7,10 +7,25 @@
#include <common.h> #include <spl.h> +#include <asm/io.h>
+#define MT76XX_GPIO1_MODE 0x10000060
+static void uart2_mux_init(void) +{
void __iomem *gpio_mode;
/* Select UART2 mode instead of GPIO mode (default) */
gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
clrbits_le32(gpio_mode, GENMASK(27, 26));
+}
void __noreturn board_init_f(ulong dummy) { #ifdef CONFIG_SPL_SERIAL_SUPPORT +#if CONFIG_CONS_INDEX == 3
uart2_mux_init();
+#endif preloader_console_init(); #endif
diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 01705ee2a5..b4bba9dcc5 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -32,8 +32,10 @@ #define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_CLK 40000000 #define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_COM1 0xb0000e00 -#define CONFIG_CONS_INDEX 1 +/* Console index starts with 1 -> UART2 = IDX 3 */ +#define CONFIG_SYS_NS16550_COM3 0xb0000e00 +#undef CONFIG_CONS_INDEX +#define CONFIG_CONS_INDEX 3 #endif
/* UART */
Did you compare the boot speed with using SPL + main U-Boot vs U-Boot only?
As far as I tested the difference of boot time should be less than 1s.
1 second is quite a lot of time. I prefer to stay with the non compressed boot configuration then. Testing shows that the new SPL based version also boots pretty fast, when the main U-Boot proper is not compressed.
In the current combined image the non-compressed U-Boot proper is included. Why did you not include the LZMA compressed image per default? Is the decompression too slow?
I just kept these two boards untouched. I can switch them to compressed mode if you have no concern.
I did not test yet. If its really a difference in time of 1 second (or similar), then let stay with uncompressed for these board please.
Thanks, Stefan
I did a precise measurement, and this is the result:
type | spl load/decompression time | boot to shell (total time) spl + lzma | 75ms | 563ms spl + none | 139ms | 627ms non-spl | N/A | 626ms
Actually spl+lzma is the fastest. I think this is because it has the smallest binary size.
It's OK to switch all of them to compressed mode.
Best Regards,

Hi Weijie,
On 10.01.20 11:48, Weijie Gao wrote:
<snip>
Did you compare the boot speed with using SPL + main U-Boot vs U-Boot only?
As far as I tested the difference of boot time should be less than 1s.
1 second is quite a lot of time. I prefer to stay with the non compressed boot configuration then. Testing shows that the new SPL based version also boots pretty fast, when the main U-Boot proper is not compressed.
In the current combined image the non-compressed U-Boot proper is included. Why did you not include the LZMA compressed image per default? Is the decompression too slow?
I just kept these two boards untouched. I can switch them to compressed mode if you have no concern.
I did not test yet. If its really a difference in time of 1 second (or similar), then let stay with uncompressed for these board please.
Thanks, Stefan
I did a precise measurement, and this is the result:
type | spl load/decompression time | boot to shell (total time) spl + lzma | 75ms | 563ms spl + none | 139ms | 627ms non-spl | N/A | 626ms
Great. Thanks for doing these tests and reporting here.
Actually spl+lzma is the fastest. I think this is because it has the smallest binary size.
Makes sense. SPI NOR load time savage is bigger than the added decompression time.
It's OK to switch all of them to compressed mode.
Yes, please do so. This might be a nice boot time increase for other boards as well. I'll do some tests on i.MX6 soon. :)
Thanks, Stefan
participants (2)
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Stefan Roese
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Weijie Gao