On 10/08/20, Oliver Graute wrote:

On 05/08/20, Anatolij Gustschin wrote:

...

Hi Oliver,

On Wed, 5 Aug 2020 15:47:07 +0200 Oliver Graute oliver.graute@gmail.com wrote:

...

Hello,

I try to get my I2C working on imx8qm. But I run into this issue:

=> i2c bus Bus 3: i2c@5a830000 => i2c dev 3 Setting bus to 3 Failed to enable ipg clk Failure changing bus number (-524)

Some idea how to fix that?

I'am using U-Boot 2020.04

I think the clock driver (in drivers/clk/imx/clk-imx8qm.c) does not have support for IMX8QM_I2C*_IPG_CLK clocks yet.

ok, what I have to do to add support for it? just adding IMX8QM_I2C*_IPG_CLK to the imx8_clk_names[]?

ok I solved this issue this way:

diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c index 54fb09fda4..7e466d630a 100644 --- a/drivers/clk/imx/clk-imx8qm.c +++ b/drivers/clk/imx/clk-imx8qm.c @@ -53,19 +53,27 @@ ulong imx8_clk_get_rate(struct clk *clk) resource = SC_R_A53; pm_clk = SC_PM_CLK_CPU; break; + case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: + case IMX8QM_I2C0_DIV: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C1_IPG_CLK: case IMX8QM_I2C1_CLK: + case IMX8QM_I2C1_DIV: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C2_IPG_CLK: case IMX8QM_I2C2_CLK: + case IMX8QM_I2C2_DIV: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C3_IPG_CLK: case IMX8QM_I2C3_CLK: + case IMX8QM_I2C3_DIV: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break; @@ -148,19 +156,27 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);

switch (clk->id) { + case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: + case IMX8QM_I2C0_DIV: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C1_IPG_CLK: case IMX8QM_I2C1_CLK: + case IMX8QM_I2C1_DIV: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C2_IPG_CLK: case IMX8QM_I2C2_CLK: + case IMX8QM_I2C2_DIV: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C3_IPG_CLK: case IMX8QM_I2C3_CLK: + case IMX8QM_I2C3_DIV: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break; @@ -242,19 +258,27 @@ int __imx8_clk_enable(struct clk *clk, bool enable) debug("%s(#%lu)\n", __func__, clk->id);

switch (clk->id) { + case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: + case IMX8QM_I2C0_DIV: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C1_IPG_CLK: case IMX8QM_I2C1_CLK: + case IMX8QM_I2C1_DIV: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C2_IPG_CLK: case IMX8QM_I2C2_CLK: + case IMX8QM_I2C2_DIV: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C3_IPG_CLK: case IMX8QM_I2C3_CLK: + case IMX8QM_I2C3_DIV: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break;

Best regards,

Oliver