[U-Boot] [PATCH] ppc/85xx: Make L2 support more robust

From: Dave Liu daveliu@freescale.com
According the user manual, we need loop-check the L2 enable bit set.
Signed-off-by: Dave Liu daveliu@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org --- cpu/mpc85xx/cpu_init.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 5336934..0041a60 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -360,8 +360,11 @@ int cpu_init_r(void) /* enable the cache */ mtspr(SPRN_L2CSR0, CONFIG_SYS_INIT_L2CSR0);
- if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) + if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) { + while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E)) + ; printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64); + } #else puts("disabled\n"); #endif

On Oct 26, 2009, at 9:25 PM, Kumar Gala wrote:
From: Dave Liu daveliu@freescale.com
According the user manual, we need loop-check the L2 enable bit set.
Signed-off-by: Dave Liu daveliu@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org
cpu/mpc85xx/cpu_init.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)
applied to 85xx.
- k
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Kumar Gala