[U-Boot] [PATCH 1/6] mx35 iomux: Remove unused macro
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de --- .../arch/arm/cpu/arm1136/mx35/iomux.c | 2 -- 1 file changed, 2 deletions(-)
diff --git u-boot-4d3c95f.orig/arch/arm/cpu/arm1136/mx35/iomux.c u-boot-4d3c95f/arch/arm/cpu/arm1136/mx35/iomux.c index f93191d..a302575 100644 --- u-boot-4d3c95f.orig/arch/arm/cpu/arm1136/mx35/iomux.c +++ u-boot-4d3c95f/arch/arm/cpu/arm1136/mx35/iomux.c @@ -44,8 +44,6 @@ enum iomux_reg_addr { #define MUX_INPUT_NUM_MUX \ (((IOMUXSW_INPUT_END - IOMUXSW_INPUT_CTL) >> 2) + 1)
-#define PIN_TO_IOMUX_INDEX(pin) ((PIN_TO_IOMUX_PAD(pin) - 0x328) >> 2) - /* * Request ownership for an IO pin. This function has to be the first one * being called before that pin is used.
mxc_gpio.c uses a 'gpio_' prefix for the dr and dir registers, so use it for the other gpio registers too.
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de --- .../arch/arm/include/asm/arch-mx35/gpio.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/gpio.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/gpio.h index 7bcc3e8..0caca70 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/gpio.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/gpio.h @@ -27,14 +27,14 @@
/* GPIO registers */ struct gpio_regs { - u32 gpio_dr; /* data */ - u32 gpio_dir; /* direction */ - u32 psr; /* pad satus */ - u32 icr1; /* interrupt config 1 */ - u32 icr2; /* interrupt config 2 */ - u32 imr; /* interrupt mask */ - u32 isr; /* interrupt status */ - u32 edge_sel; /* edge select */ + u32 gpio_dr; /* data */ + u32 gpio_dir; /* direction */ + u32 gpio_psr; /* pad satus */ + u32 gpio_icr1; /* interrupt config 1 */ + u32 gpio_icr2; /* interrupt config 2 */ + u32 gpio_imr; /* interrupt mask */ + u32 gpio_isr; /* interrupt status */ + u32 gpio_edge_sel; /* edge select */ };
#endif
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de --- .../arch/arm/include/asm/arch-mx35/mx35_pins.h | 3 --- .../board/CarMediaLab/flea3/flea3.c | 4 ++-- 2 files changed, 2 insertions(+), 5 deletions(-)
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/mx35_pins.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/mx35_pins.h index 8c38139..00e5e75 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/mx35_pins.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/mx35_pins.h @@ -347,9 +347,6 @@ typedef enum iomux_pins { MX35_PIN_FEC_TDATA2 = _MXC_BUILD_GPIO_PIN(2, 21, 0x31C, 0x780), MX35_PIN_FEC_RDATA3 = _MXC_BUILD_GPIO_PIN(2, 22, 0x320, 0x784), MX35_PIN_FEC_TDATA3 = _MXC_BUILD_GPIO_PIN(2, 23, 0x324, 0x788), - - MX35_PIN_RTS2_UART3_RXD_MUX = _MXC_BUILD_NON_GPIO_PIN(0x1a0, 0x5e4), - MX35_PIN_CTS2_UART3_TXD_MUX = _MXC_BUILD_NON_GPIO_PIN(0x1a4, 0x5e8), } iomux_pin_name_t;
#endif diff --git u-boot-4d3c95f.orig/board/CarMediaLab/flea3/flea3.c u-boot-4d3c95f/board/CarMediaLab/flea3/flea3.c index 34ede87..5015a1a 100644 --- u-boot-4d3c95f.orig/board/CarMediaLab/flea3/flea3.c +++ u-boot-4d3c95f/board/CarMediaLab/flea3/flea3.c @@ -165,8 +165,8 @@ static void board_setup_sdram(void)
static void setup_iomux_uart3(void) { - mxc_request_iomux(MX35_PIN_RTS2_UART3_RXD_MUX, MUX_CONFIG_ALT7); - mxc_request_iomux(MX35_PIN_CTS2_UART3_TXD_MUX, MUX_CONFIG_ALT7); + mxc_request_iomux(MX35_PIN_RTS2, MUX_CONFIG_ALT7); + mxc_request_iomux(MX35_PIN_CTS2, MUX_CONFIG_ALT7); }
static void setup_iomux_i2c(void)
On 14/08/2012 21:39, Benoît Thébaudeau wrote:
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de
.../arch/arm/include/asm/arch-mx35/mx35_pins.h | 3 --- .../board/CarMediaLab/flea3/flea3.c | 4 ++-- 2 files changed, 2 insertions(+), 5 deletions(-)
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/mx35_pins.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/mx35_pins.h index 8c38139..00e5e75 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/mx35_pins.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/mx35_pins.h @@ -347,9 +347,6 @@ typedef enum iomux_pins { MX35_PIN_FEC_TDATA2 = _MXC_BUILD_GPIO_PIN(2, 21, 0x31C, 0x780), MX35_PIN_FEC_RDATA3 = _MXC_BUILD_GPIO_PIN(2, 22, 0x320, 0x784), MX35_PIN_FEC_TDATA3 = _MXC_BUILD_GPIO_PIN(2, 23, 0x324, 0x788),
- MX35_PIN_RTS2_UART3_RXD_MUX = _MXC_BUILD_NON_GPIO_PIN(0x1a0, 0x5e4),
- MX35_PIN_CTS2_UART3_TXD_MUX = _MXC_BUILD_NON_GPIO_PIN(0x1a4, 0x5e8),
} iomux_pin_name_t;
#endif diff --git u-boot-4d3c95f.orig/board/CarMediaLab/flea3/flea3.c u-boot-4d3c95f/board/CarMediaLab/flea3/flea3.c index 34ede87..5015a1a 100644 --- u-boot-4d3c95f.orig/board/CarMediaLab/flea3/flea3.c +++ u-boot-4d3c95f/board/CarMediaLab/flea3/flea3.c @@ -165,8 +165,8 @@ static void board_setup_sdram(void)
static void setup_iomux_uart3(void) {
- mxc_request_iomux(MX35_PIN_RTS2_UART3_RXD_MUX, MUX_CONFIG_ALT7);
- mxc_request_iomux(MX35_PIN_CTS2_UART3_TXD_MUX, MUX_CONFIG_ALT7);
- mxc_request_iomux(MX35_PIN_RTS2, MUX_CONFIG_ALT7);
- mxc_request_iomux(MX35_PIN_CTS2, MUX_CONFIG_ALT7);
}
That is correct, the pin was already defined.
Acked-by: Stefano Babic sbabic@denx.de
Best regards, Stefano Babic
On 14/08/2012 21:39, Benoît Thébaudeau wrote:
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
On 14/08/2012 21:39, Benoît Thébaudeau wrote:
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de --- .../arch/arm/include/asm/arch-mx35/sys_proto.h | 1 - 1 file changed, 1 deletion(-)
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/sys_proto.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/sys_proto.h index 422eb52..9c0d513 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/sys_proto.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/sys_proto.h @@ -26,6 +26,5 @@
u32 get_cpu_rev(void); #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) -void sdelay(unsigned long);
#endif
On 14/08/2012 21:40, Benoît Thébaudeau wrote:
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de
.../arch/arm/include/asm/arch-mx35/sys_proto.h | 1 - 1 file changed, 1 deletion(-)
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/sys_proto.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/sys_proto.h index 422eb52..9c0d513 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/sys_proto.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/sys_proto.h @@ -26,6 +26,5 @@
u32 get_cpu_rev(void); #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) -void sdelay(unsigned long);
#endif
Acked-by: Stefano Babic sbabic@denx.de
Best regards, Stefano Babic
On 14/08/2012 21:40, Benoît Thébaudeau wrote:
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de
.../arch/arm/include/asm/arch-mx35/sys_proto.h | 1 - 1 file changed, 1 deletion(-)
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/sys_proto.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/sys_proto.h index 422eb52..9c0d513 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/sys_proto.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/sys_proto.h @@ -26,6 +26,5 @@
u32 get_cpu_rev(void); #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) -void sdelay(unsigned long);
#endif
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
Create default pin initialization functions for the default iomux function assignments of the main peripherals.
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de --- .../arch/arm/cpu/arm1136/mx35/generic.c | 206 ++++++++++++++++++++ .../arch/arm/include/asm/arch-mx35/sys_proto.h | 8 + 2 files changed, 214 insertions(+)
diff --git u-boot-4d3c95f.orig/arch/arm/cpu/arm1136/mx35/generic.c u-boot-4d3c95f/arch/arm/cpu/arm1136/mx35/generic.c index 986b1f9..37187ad 100644 --- u-boot-4d3c95f.orig/arch/arm/cpu/arm1136/mx35/generic.c +++ u-boot-4d3c95f/arch/arm/cpu/arm1136/mx35/generic.c @@ -28,6 +28,8 @@ #include <asm/errno.h> #include <asm/arch/imx-regs.h> #include <asm/arch/crm_regs.h> +#include <asm/arch/mx35_pins.h> +#include <asm/arch/iomux.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> #include <netdev.h> @@ -389,7 +391,211 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return -1; }
+#ifdef CONFIG_MXC_UART +#if CONFIG_MXC_UART_BASE == UART1_BASE +void mx35_uart1_init_pins(void) +{ + int in_pad, out_pad; + + /* Set up pins for UART1. */ + mxc_request_iomux(MX35_PIN_RXD1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_TXD1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_RTS1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CTS1, MUX_CONFIG_FUNC); + + in_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + out_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_CMOS | PAD_CTL_PKE_NONE | + PAD_CTL_ODE_CMOS | PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + + mxc_iomux_set_pad(MX35_PIN_RXD1, in_pad); + mxc_iomux_set_pad(MX35_PIN_TXD1, out_pad); + mxc_iomux_set_pad(MX35_PIN_RTS1, in_pad); + mxc_iomux_set_pad(MX35_PIN_CTS1, out_pad); +} +#endif +#endif + +#ifdef CONFIG_I2C_MXC +#if CONFIG_SYS_I2C_BASE == I2C1_BASE_ADDR +void mx35_i2c1_init_pins(void) +{ + int io_pad; + + /* Set up pins for I2C1. */ + mxc_request_iomux(MX35_PIN_I2C1_CLK, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_I2C1_DAT, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + + io_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU | PAD_CTL_ODE_OpenDrain | + PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + + mxc_iomux_set_pad(MX35_PIN_I2C1_CLK, io_pad); + mxc_iomux_set_pad(MX35_PIN_I2C1_DAT, io_pad); +} +#endif + +#if CONFIG_SYS_I2C_BASE == I2C2_BASE_ADDR +void mx35_i2c2_init_pins(void) +{ + int io_pad; + + /* Set up pins for I2C2. */ + mxc_request_iomux(MX35_PIN_I2C2_CLK, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_I2C2_DAT, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + + io_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU | PAD_CTL_ODE_OpenDrain | + PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + + mxc_iomux_set_pad(MX35_PIN_I2C2_CLK, io_pad); + mxc_iomux_set_pad(MX35_PIN_I2C2_DAT, io_pad); +} +#endif + +u32 imx_get_i2cclk(void) +{ + return mxc_get_clock(MXC_IPG_PERCLK); +} +#endif + +#ifdef CONFIG_MXC_SPI +void mx35_cspi1_init_pins(void) +{ + int act_lo_pad, act_hi_pad; + + /* Set up pins for CSPI1. */ + mxc_request_iomux(MX35_PIN_CSPI1_SCLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_SPI_RDY, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_MOSI, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_MISO, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_SS0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_SS1, MUX_CONFIG_FUNC); + + act_lo_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU | + PAD_CTL_ODE_CMOS | PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + act_hi_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | PAD_CTL_100K_PD | + PAD_CTL_ODE_CMOS | PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + + mxc_iomux_set_pad(MX35_PIN_CSPI1_SCLK, act_hi_pad); + mxc_iomux_set_pad(MX35_PIN_CSPI1_SPI_RDY, act_lo_pad); + mxc_iomux_set_pad(MX35_PIN_CSPI1_MOSI, act_hi_pad); + mxc_iomux_set_pad(MX35_PIN_CSPI1_MISO, act_hi_pad); + mxc_iomux_set_pad(MX35_PIN_CSPI1_SS0, act_lo_pad); + mxc_iomux_set_pad(MX35_PIN_CSPI1_SS1, act_lo_pad); +} +#endif + +#ifdef CONFIG_USB_EHCI_MXC +#if CONFIG_MXC_USB_PORT == 0 +void mx35_usbotg_init_pins(void) +{ + int in_pad, out_pad; + + /* Set up pins for USBOTG. */ + mxc_request_iomux(MX35_PIN_USBOTG_PWR, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_USBOTG_OC, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + + in_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + out_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_CMOS | PAD_CTL_PKE_NONE | + PAD_CTL_ODE_CMOS | PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + + mxc_iomux_set_pad(MX35_PIN_USBOTG_PWR, out_pad); + mxc_iomux_set_pad(MX35_PIN_USBOTG_OC, in_pad); +} +#endif +#endif + +#ifdef CONFIG_FSL_ESDHC +#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC1_BASE_ADDR +void mx35_esdhc1_init_pins(void) +{ + int out_pad, io_pad; + + /* Set up pins for eSDHC1. */ + mxc_request_iomux(MX35_PIN_SD1_CMD, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_DATA0, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_DATA1, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_DATA2, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_DATA3, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + + out_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_CMOS | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_47K_PU | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST; + io_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_47K_PU | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST; + + mxc_iomux_set_pad(MX35_PIN_SD1_CMD, io_pad); + mxc_iomux_set_pad(MX35_PIN_SD1_CLK, out_pad); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA0, io_pad); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA1, io_pad); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA2, io_pad); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA3, io_pad); +} +#endif +#endif + #ifdef CONFIG_FEC_MXC +void mx35_fec_init_pins(void) +{ + int in_pad, out_pad, io_pad; + + /* Set up pins for FEC. */ + mxc_request_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_FUNC); + + in_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + out_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_CMOS | PAD_CTL_PKE_NONE | + PAD_CTL_ODE_CMOS | PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + io_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_22K_PU | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + + mxc_iomux_set_pad(MX35_PIN_FEC_TX_CLK, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_RX_CLK, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_RX_DV, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_COL, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_RDATA0, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_TDATA0, out_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_TX_EN, out_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_MDC, out_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_MDIO, io_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_TX_ERR, out_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_RX_ERR, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_CRS, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_RDATA1, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_TDATA1, out_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_RDATA2, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_TDATA2, out_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_RDATA3, in_pad); + mxc_iomux_set_pad(MX35_PIN_FEC_TDATA3, out_pad); +} + /* * The MX35 has no fuse for MAC, return a NULL MAC */ diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/sys_proto.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/sys_proto.h index 9c0d513..3c46106 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/sys_proto.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/sys_proto.h @@ -27,4 +27,12 @@ u32 get_cpu_rev(void); #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev)
+void mx35_uart1_init_pins(void); +void mx35_i2c1_init_pins(void); +void mx35_i2c2_init_pins(void); +void mx35_cspi1_init_pins(void); +void mx35_usbotg_init_pins(void); +void mx35_esdhc1_init_pins(void); +void mx35_fec_init_pins(void); + #endif
On 14/08/2012 21:40, Benoît Thébaudeau wrote:
Create default pin initialization functions for the default iomux function assignments of the main peripherals.
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de
Hi Benoît,
.../arch/arm/cpu/arm1136/mx35/generic.c | 206 ++++++++++++++++++++ .../arch/arm/include/asm/arch-mx35/sys_proto.h | 8 + 2 files changed, 214 insertions(+)
For this I remark the same comments I did for MX5. I fwe want to change here, we should do in the same way we discussed for MX5.
Best regards, Stefano Babic
Use the newly created mx35 default pin initialization functions in mx35 board files.
Note that this disables the init of i2c1 pins on flea3 because i2c1 is not enabled in flea3.h. This should not be an issue if the kernel sets up pins properly.
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de --- .../board/CarMediaLab/flea3/flea3.c | 57 +++--------- .../board/freescale/mx35pdk/mx35pdk.c | 96 +------------------- 2 files changed, 14 insertions(+), 139 deletions(-)
diff --git u-boot-4d3c95f.orig/board/CarMediaLab/flea3/flea3.c u-boot-4d3c95f/board/CarMediaLab/flea3/flea3.c index 5015a1a..54bc513 100644 --- u-boot-4d3c95f.orig/board/CarMediaLab/flea3/flea3.c +++ u-boot-4d3c95f/board/CarMediaLab/flea3/flea3.c @@ -169,60 +169,20 @@ static void setup_iomux_uart3(void) mxc_request_iomux(MX35_PIN_CTS2, MUX_CONFIG_ALT7); }
-static void setup_iomux_i2c(void) +static void setup_iomux_i2c3(void) { int pad;
- mxc_request_iomux(MX35_PIN_I2C1_CLK, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_I2C1_DAT, MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_TX3_RX2, MUX_CONFIG_ALT1); + mxc_request_iomux(MX35_PIN_TX2_RX3, MUX_CONFIG_ALT1);
pad = (PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE \ | PAD_CTL_PUE_PUD | PAD_CTL_ODE_OpenDrain);
- mxc_iomux_set_pad(MX35_PIN_I2C1_CLK, pad); - mxc_iomux_set_pad(MX35_PIN_I2C1_DAT, pad); - - mxc_request_iomux(MX35_PIN_TX3_RX2, MUX_CONFIG_ALT1); - mxc_request_iomux(MX35_PIN_TX2_RX3, MUX_CONFIG_ALT1); - mxc_iomux_set_pad(MX35_PIN_TX3_RX2, pad); mxc_iomux_set_pad(MX35_PIN_TX2_RX3, pad); }
- -static void setup_iomux_spi(void) -{ - mxc_request_iomux(MX35_PIN_CSPI1_MOSI, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_CSPI1_MISO, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_CSPI1_SS0, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_CSPI1_SS1, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_CSPI1_SCLK, MUX_CONFIG_SION); -} - -static void setup_iomux_fec(void) -{ - /* setup pins for FEC */ - mxc_request_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_FUNC); - -} - int board_early_init_f(void) { struct ccm_regs *ccm = @@ -266,9 +226,14 @@ int board_early_init_f(void)
/* Set pinmux for the required peripherals */ setup_iomux_uart3(); - setup_iomux_i2c(); - setup_iomux_fec(); - setup_iomux_spi(); +#ifdef CONFIG_I2C_MXC +#if CONFIG_SYS_I2C_BASE == I2C1_BASE_ADDR + mx35_i2c1_init_pins(); +#endif +#endif + setup_iomux_i2c3(); + mx35_fec_init_pins(); + mx35_cspi1_init_pins();
return 0; } diff --git u-boot-4d3c95f.orig/board/freescale/mx35pdk/mx35pdk.c u-boot-4d3c95f/board/freescale/mx35pdk/mx35pdk.c index bc415b8..bdfdf32 100644 --- u-boot-4d3c95f.orig/board/freescale/mx35pdk/mx35pdk.c +++ u-boot-4d3c95f/board/freescale/mx35pdk/mx35pdk.c @@ -70,96 +70,6 @@ void dram_init_banksize(void) gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; }
-static void setup_iomux_i2c(void) -{ - int pad; - - /* setup pins for I2C1 */ - mxc_request_iomux(MX35_PIN_I2C1_CLK, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_I2C1_DAT, MUX_CONFIG_SION); - - pad = (PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE \ - | PAD_CTL_PUE_PUD | PAD_CTL_ODE_OpenDrain); - - mxc_iomux_set_pad(MX35_PIN_I2C1_CLK, pad); - mxc_iomux_set_pad(MX35_PIN_I2C1_DAT, pad); -} - - -static void setup_iomux_spi(void) -{ - mxc_request_iomux(MX35_PIN_CSPI1_MOSI, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_CSPI1_MISO, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_CSPI1_SS0, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_CSPI1_SS1, MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_CSPI1_SCLK, MUX_CONFIG_SION); -} - -static void setup_iomux_fec(void) -{ - int pad; - - /* setup pins for FEC */ - mxc_request_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_FUNC); - - pad = (PAD_CTL_DRV_3_3V | PAD_CTL_PUE_PUD | PAD_CTL_ODE_CMOS | \ - PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW); - - mxc_iomux_set_pad(MX35_PIN_FEC_TX_CLK, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_RX_CLK, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_RX_DV, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_COL, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_RDATA0, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_TDATA0, pad | PAD_CTL_HYS_CMOS | \ - PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_TX_EN, pad | PAD_CTL_HYS_CMOS | \ - PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_MDC, pad | PAD_CTL_HYS_CMOS | \ - PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_MDIO, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_22K_PU); - mxc_iomux_set_pad(MX35_PIN_FEC_TX_ERR, pad | PAD_CTL_HYS_CMOS | \ - PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_RX_ERR, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_CRS, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_RDATA1, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_TDATA1, pad | PAD_CTL_HYS_CMOS | \ - PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_RDATA2, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_TDATA2, pad | PAD_CTL_HYS_CMOS | \ - PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_RDATA3, pad | PAD_CTL_HYS_SCHMITZ | \ - PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); - mxc_iomux_set_pad(MX35_PIN_FEC_TDATA3, pad | PAD_CTL_HYS_CMOS | \ - PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); -} - int board_early_init_f(void) { struct ccm_regs *ccm = @@ -185,9 +95,9 @@ int board_early_init_f(void) /* Setup NAND */ __raw_writel(readl(&ccm->rcsr) | MXC_CCM_RCSR_NFC_FMS, &ccm->rcsr);
- setup_iomux_i2c(); - setup_iomux_fec(); - setup_iomux_spi(); + mx35_i2c1_init_pins(); + mx35_fec_init_pins(); + mx35_cspi1_init_pins();
return 0; }
On 14/08/2012 21:39, Benoît Thébaudeau wrote:
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de
.../arch/arm/cpu/arm1136/mx35/iomux.c | 2 -- 1 file changed, 2 deletions(-)
diff --git u-boot-4d3c95f.orig/arch/arm/cpu/arm1136/mx35/iomux.c u-boot-4d3c95f/arch/arm/cpu/arm1136/mx35/iomux.c index f93191d..a302575 100644 --- u-boot-4d3c95f.orig/arch/arm/cpu/arm1136/mx35/iomux.c +++ u-boot-4d3c95f/arch/arm/cpu/arm1136/mx35/iomux.c @@ -44,8 +44,6 @@ enum iomux_reg_addr { #define MUX_INPUT_NUM_MUX \ (((IOMUXSW_INPUT_END - IOMUXSW_INPUT_CTL) >> 2) + 1)
-#define PIN_TO_IOMUX_INDEX(pin) ((PIN_TO_IOMUX_PAD(pin) - 0x328) >> 2)
/*
- Request ownership for an IO pin. This function has to be the first one
- being called before that pin is used.
Acked-by: Stefano Babic sbabic@denx.de
Best regards, Strefano Babic
participants (2)
-
Benoît Thébaudeau -
Stefano Babic