[U-Boot] [PATCH 1/3] mp2usb: remove board support
this board was cancelled long time ago so remove it as it won't be maintained anymore
Signed-off-by: Eric Bénard eric@eukrea.com --- board/mp2usb/Makefile | 50 ----- board/mp2usb/config.mk | 3 - board/mp2usb/flash.c | 552 ---------------------------------------------- board/mp2usb/mp2usb.c | 98 -------- boards.cfg | 1 - include/configs/mp2usb.h | 242 -------------------- 6 files changed, 0 insertions(+), 946 deletions(-) delete mode 100644 board/mp2usb/Makefile delete mode 100644 board/mp2usb/config.mk delete mode 100644 board/mp2usb/flash.c delete mode 100644 board/mp2usb/mp2usb.c delete mode 100644 include/configs/mp2usb.h
diff --git a/board/mp2usb/Makefile b/board/mp2usb/Makefile deleted file mode 100644 index 335734a..0000000 --- a/board/mp2usb/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2003-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := mp2usb.o flash.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) - $(call cmd_link_o_target, $(OBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/mp2usb/config.mk b/board/mp2usb/config.mk deleted file mode 100644 index 948e4ff..0000000 --- a/board/mp2usb/config.mk +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x27F00000 -## For testing: load at 0x20100000 and "go" at 0x201000A4 -#CONFIG_SYS_TEXT_BASE = 0x20100000 diff --git a/board/mp2usb/flash.c b/board/mp2usb/flash.c deleted file mode 100644 index 21a8ef9..0000000 --- a/board/mp2usb/flash.c +++ /dev/null @@ -1,552 +0,0 @@ -/* - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Modified for the MP2USB by (C) Copyright 2005 Eric Benard - * ebenard@eukrea.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <linux/byteorder/swab.h> - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -#define FLASH_PORT_WIDTH ushort -#define FLASH_PORT_WIDTHV vu_short -#define SWAP(x) __swab16(x) - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define mb() __asm__ __volatile__ ("" : : : "memory") - -/* Intel-compatible flash commands */ -#define INTEL_PROGRAM 0x00100010 -#define INTEL_ERASE 0x00200020 -#define INTEL_PROG 0x00400040 -#define INTEL_CLEAR 0x00500050 -#define INTEL_LOCKBIT 0x00600060 -#define INTEL_PROTECT 0x00010001 -#define INTEL_STATUS 0x00700070 -#define INTEL_READID 0x00900090 -#define INTEL_SUSPEND 0x00B000B0 -#define INTEL_CONFIRM 0x00D000D0 -#define INTEL_RESET 0xFFFFFFFF - -/* Intel-compatible flash status bits */ -#define INTEL_FINISHED 0x00800080 -#define INTEL_OK 0x00800080 - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size (FPW *addr, flash_info_t *info); -static int write_data (flash_info_t *info, ulong dest, FPW data); -static void flash_get_offsets (ulong base, flash_info_t *info); -void inline spin_wheel (void); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init (void) -{ - int i; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - switch (i) { - case 0: - flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); - break; - default: - panic ("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect ( FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0] ); - - flash_protect ( FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] ); - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t *info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - return; - } - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t *info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: - printf ("INTEL "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F640J3A: - printf ("28F640J3A\n"); - break; - case FLASH_28F128J3A: - printf ("28F128J3A\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], - info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (FPW *addr, flash_info_t *info) -{ - volatile FPW value; - - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = (FPW) 0x00AA00AA; - addr[0x2AAA] = (FPW) 0x00550055; - addr[0x5555] = (FPW) 0x00900090; - - mb (); - value = addr[0]; - - switch (value) { - - case (FPW) INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = (FPW) INTEL_RESET; /* restore read mode */ - return (0); /* no or unknown flash */ - } - - mb (); - value = addr[1]; /* device ID */ - - switch (value) { - - case (FPW) INTEL_ID_28F640J3A: - info->flash_id += FLASH_28F640J3A; - info->sector_count = 64; - info->size = 0x00800000; - break; /* => 8 MB */ - - case (FPW) INTEL_ID_28F128J3A: - info->flash_id += FLASH_28F128J3A; - info->sector_count = 128; - info->size = 0x01000000; - break; /* => 16 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - addr[0] = (FPW) INTEL_RESET; /* restore read mode */ - - return (info->size); -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - int prot, sect; - ulong type, start, last; - int rcode = 0; - int cflag, iflag; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - start = get_timer (0); - last = start; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - cflag = icache_status (); - icache_disable (); - /* Disable interrupts which might cause a timeout here */ - iflag = disable_interrupts (); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - FPWV *addr = (FPWV *) (info->start[sect]); - FPW status; - - printf ("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); - - *addr = (FPW) INTEL_CLEAR; /* clear status register */ - *addr = (FPW) INTEL_ERASE; /* erase setup */ - *addr = (FPW) INTEL_CONFIRM; /* erase confirm */ - - while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) { - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - *addr = (FPW) INTEL_SUSPEND; /* suspend erase */ - *addr = (FPW) INTEL_RESET; /* reset to read mode */ - rcode = 1; - break; - } - } - - *addr = (FPWV)INTEL_CLEAR; /* clear status register cmd. */ - *addr = (FPWV)INTEL_RESET; /* resest to read mode */ - - printf (" done\n"); - } - } - - if (iflag) - enable_interrupts (); - - if (cflag) - icache_enable (); - - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) { - return 4; - } - - /* get lower word aligned address */ - wp = (addr & ~1); - port_width = 2; - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < port_width && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i = 0; i < port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) { - spin_wheel (); - count = 0; - } - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return (write_data (info, wp, SWAP (data))); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t *info, ulong dest, FPW data) -{ - FPWV *addr = (FPWV *) dest; - ulong status; - int cflag, iflag; - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf ("not erased at %08lx (%lx)\n", (ulong) addr, (ulong) *addr); - return (2); - } - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - cflag = icache_status (); - icache_disable (); - /* Disable interrupts which might cause a timeout here */ - iflag = disable_interrupts (); - - *addr = (FPW) INTEL_PROG; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); - - /* wait while polling the status register */ - while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = (FPW) INTEL_RESET; /* restore read mode */ - return (1); - } - } - - *addr = (FPW) INTEL_RESET; /* restore read mode */ - - if (iflag) - enable_interrupts (); - - if (cflag) - icache_enable (); - - return (0); -} - -void inline spin_wheel (void) -{ - static int p = 0; - static char w[] = "\/-"; - - printf ("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} - -/*----------------------------------------------------------------------- - * Set/Clear sector's lock bit, returns: - * 0 - OK - * 1 - Error (timeout, voltage problems, etc.) - */ -int flash_real_protect(flash_info_t *info, long sector, int prot) -{ - int i; - int rc = 0; - FPWV *addr = (FPWV *)(info->start[sector]); - int flag = disable_interrupts(); - - *addr = (FPW) INTEL_CLEAR; /* Clear status register */ - if (prot) { /* Set sector lock bit */ - *addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */ - *addr = (FPW) INTEL_PROTECT; /* set */ - } - else { /* Clear sector lock bit */ - *addr = (FPW) INTEL_LOCKBIT; /* All sectors lock bits */ - *addr = (FPW) INTEL_CONFIRM; /* clear */ - } - - reset_timer_masked (); - - while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) { - if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT) { - printf("Flash lock bit operation timed out\n"); - rc = 1; - break; - } - } - - if (*addr != (FPW) INTEL_OK) { - printf("Flash lock bit operation failed at %08X, CSR=%08X\n", - (uint)addr, (uint)*addr); - rc = 1; - } - - if (!rc) - info->protect[sector] = prot; - - /* - * Clear lock bit command clears all sectors lock bits, so - * we have to restore lock bits of protected sectors. - */ - if (!prot) - { - for (i = 0; i < info->sector_count; i++) - { - if (info->protect[i]) - { - reset_timer_masked (); - addr = (FPWV *) (info->start[i]); - *addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */ - *addr = (FPW) INTEL_PROTECT; /* set */ - while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) - { - if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT) - { - printf("Flash lock bit operation timed out\n"); - rc = 1; - break; - } - } - } - } - } - - if (flag) - enable_interrupts(); - - *addr = (FPW) INTEL_RESET; /* Reset to read array mode */ - - return rc; -} diff --git a/board/mp2usb/mp2usb.c b/board/mp2usb/mp2usb.c deleted file mode 100644 index e5eba6b..0000000 --- a/board/mp2usb/mp2usb.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger mgroeger@sysgo.de - * - * Modified for the MP2USB by (C) Copyright 2005 Eric Benard - * ebenard@eukrea.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/AT91RM9200.h> -#include <netdev.h> -#include <asm/io.h> -#if defined(CONFIG_DRIVER_ETHER) -#include <at91rm9200_net.h> -#include <dm9161.h> -#endif -#include <asm/mach-types.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* Enable Ctrlc */ - console_init_f (); - - /* memory and cpu-speed are setup before relocation */ - /* so we do _nothing_ here */ - - /* arch number of MP2USB-Board. */ - gd->bd->bi_arch_number = MACH_TYPE_MP2USB; - /* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM; - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; - return 0; -} - -#ifdef CONFIG_DRIVER_ETHER -#if defined(CONFIG_CMD_NET) - -/* - * Name: - * at91rm9200_GetPhyInterface - * Description: - * Initialise the interface functions to the PHY - * Arguments: - * None - * Return value: - * None - */ -void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) -{ - p_phyops->Init = dm9161_InitPhy; - p_phyops->IsPhyConnected = dm9161_IsPhyConnected; - p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed; - p_phyops->AutoNegotiate = dm9161_AutoNegotiate; -} - -#endif -#endif /* CONFIG_DRIVER_ETHER */ - -#ifdef CONFIG_DRIVER_AT91EMAC -int board_eth_init(bd_t *bis) -{ - int rc = 0; - rc = at91emac_register(bis, 0); - return rc; -} -#endif diff --git a/boards.cfg b/boards.cfg index 45c3102..105c748 100644 --- a/boards.cfg +++ b/boards.cfg @@ -56,7 +56,6 @@ cmc_pu2 arm arm920t - - csb637 arm arm920t - - at91rm9200 kb9202 arm arm920t - - at91rm9200 m501sk arm arm920t - - at91rm9200 -mp2usb arm arm920t - - at91rm9200 at91rm9200dk arm arm920t - atmel at91rm9200 mx1ads arm arm920t - - imx mx1fs2 arm arm920t - - imx diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h deleted file mode 100644 index 8e398d7..0000000 --- a/include/configs/mp2usb.h +++ /dev/null @@ -1,242 +0,0 @@ -/* - * 2004-2005 Gary Jennejohn garyj@denx.de - * - * Modified for the MP2USB by (C) Copyright 2005 Eric Benard - * ebenard@eukrea.com - * - * Configuration settings for the MP2USB board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_AT91_LEGACY - -/* ARM asynchronous clock */ -#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */ -#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK/3) /* peripheral clock */ - -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - -#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ -#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ -#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */ -#define CONFIG_MP2USB 1 /* on an MP2USB Board */ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define USE_920T_MMU 1 - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -#define CONFIG_SYS_ATMEL_PLL_INIT_BUG 1 -#ifndef CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 -/* flash */ -#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 -#define CONFIG_SYS_SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */ - -/* clocks */ -#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */ -#define CONFIG_SYS_PLLBR_VAL 0x1048bE0E /* 48 MHz (divider by 2 for USB) */ -#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */ - -/* sdram */ -#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 -#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 -#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ -#define CONFIG_SYS_SDRC_CR_VAL 0x3211295A /* set up the CONFIG_SYS_SDRAM */ -#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ -#define CONFIG_SYS_SDRAM1 0x20000020 /* address of the CONFIG_SYS_SDRAM */ -#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ -#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ -#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_SYS_AT91C_BRGR_DIVISOR 33 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */ - -/* - * Hardware drivers - */ - -/* define one of these to choose the DBGU, USART0 or USART1 as console */ -#define CONFIG_AT91RM9200_USART -#define CONFIG_DBGU -#undef CONFIG_USART0 -#undef CONFIG_USART1 - -#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */ - -#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ - -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_USB_KEYBOARD 1 -#define CONFIG_USB_STORAGE 1 -#define CONFIG_DOS_PARTITION 1 -#define CONFIG_AT91C_PQFP_UHPBUG 1 - -#undef CONFIG_SYS_USB_OHCI_BOARD_INIT -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 -#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 - -#undef CONFIG_HARD_I2C - -#ifdef CONFIG_HARD_I2C -#define CONFIG_SYS_I2C_SPEED 0 /* not used */ -#define CONFIG_SYS_I2C_SLAVE 0 /* not used */ -#define CONFIG_RTC_RS5C372A /* RICOH I2C RTC */ -#define CONFIG_SYS_I2C_RTC_ADDR 0x32 -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW -#endif -/* still about 20 kB free with this defined */ -#define CONFIG_SYS_LONGHELP - -#define CONFIG_BOOTDELAY 3 - -#if !defined(CONFIG_HARD_I2C) -#define CONFIG_TIMESTAMP -#endif - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_NFS -#define CONFIG_CMD_SNTP - -#if defined(CONFIG_HARD_I2C) - - #define CONFIG_CMD_DATE - #define CONFIG_CMD_EEPROM - #define CONFIG_CMD_I2C - #define CONFIG_CMD_MISC - -#else - - #define CONFIG_CMD_CACHE - #define CONFIG_CMD_USB - - #undef CONFIG_CMD_BDI - #undef CONFIG_CMD_FPGA - #undef CONFIG_CMD_IMI - #undef CONFIG_CMD_LOADS - #undef CONFIG_CMD_MISC - #undef CONFIG_CMD_SOURCE - -#endif - - -#define CONFIG_SYS_LONGHELP - -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM 0x20000000 -#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */ - -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 - -#define CONFIG_NET_MULTI 1 -#ifdef CONFIG_NET_MULTI -#define CONFIG_DRIVER_AT91EMAC 1 -#define CONFIG_SYS_RX_ETH_BUFFER 8 -#else -#define CONFIG_DRIVER_ETHER 1 -#endif -#define CONFIG_NET_RETRY_COUNT 20 -#undef CONFIG_AT91C_USE_RMII - -#define PHYS_FLASH_1 0x10000000 -#define PHYS_FLASH_SIZE 0x1000000 /* 16 megs main flash */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#define CONFIG_SYS_FLASH_LOCK_TOUT (10*CONFIG_SYS_HZ) /* Timeout for Flash Set Lock Bit */ -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (10*CONFIG_SYS_HZ) /* Timeout for Flash Clear Lock Bits */ -#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_OFFSET 0x20000 /* after u-boot.bin */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_ENV_OFFSET) -#define CONFIG_ENV_SIZE 0x20000 - -#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ - -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } - -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ - -#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ - -#define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */ - /* AT91C_TC_TIMER_DIV1_CLOCK */ - -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - -#define CONFIG_SYS_DEVICE_NULLDEV 1 /* enble null device */ -#undef CONFIG_SILENT_CONSOLE /* enable silent startup */ - -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_STOP_STR " " -#define CONFIG_AUTOBOOT_DELAY_STR "d" - -#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ - -#endif /* __CONFIG_H */
- update to new relocation code - switch to boards.cfg - get rid of LEGACY (still a little hack in .h to compile) - add nand boot configuration - boot tested for the following configurations : 9260 (64MB RAM & nor boot) 9260_nand (64MB RAM & nand boot) 9G20_128M (128MB RAM & nor boot) 9G20_nand_128M (128MB RAM & nand boot) (nor boot is using lowlevel init)
Signed-off-by: Eric Bénard eric@eukrea.com --- board/eukrea/cpu9260/config.mk | 1 - board/eukrea/cpu9260/cpu9260.c | 161 +++++++++++-------------- board/eukrea/cpu9260/led.c | 36 +++--- boards.cfg | 8 ++ include/configs/cpu9260.h | 265 +++++++++++++++++++++++++--------------- 5 files changed, 263 insertions(+), 208 deletions(-) delete mode 100644 board/eukrea/cpu9260/config.mk
diff --git a/board/eukrea/cpu9260/config.mk b/board/eukrea/cpu9260/config.mk deleted file mode 100644 index 2077692..0000000 --- a/board/eukrea/cpu9260/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x21f00000 diff --git a/board/eukrea/cpu9260/cpu9260.c b/board/eukrea/cpu9260/cpu9260.c index 61b6c33..9ec48a0 100644 --- a/board/eukrea/cpu9260/cpu9260.c +++ b/board/eukrea/cpu9260/cpu9260.c @@ -29,12 +29,13 @@ #include <common.h> #include <asm/sizes.h> #include <asm/arch/at91sam9260.h> -#include <asm/arch/at91sam9_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> -#include <asm/arch/gpio.h> +#include <asm/arch/at91_matrix.h> +#include <asm/arch/at91_pio.h> +#include <asm/arch/clk.h> #include <asm/arch/io.h> #include <asm/arch/hardware.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) @@ -53,116 +54,103 @@ DECLARE_GLOBAL_DATA_PTR; static void cpu9260_nand_hw_init(void) { unsigned long csa; + at91_smc_t *smc = (at91_smc_t *) AT91_SMC_BASE; + at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
/* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, - csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &matrix->csa);
/* Configure SMC CS3 for NAND/SmartMedia */ #if defined(CONFIG_CPU9G20) - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(4) | - AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(4)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_DBW_8 | - AT91_SMC_TDF_(3)); + writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) | + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4), + &smc->cs[3].pulse); + writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), + &smc->cs[3].cycle); + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | + AT91_SMC_MODE_DBW_8 | + AT91_SMC_MODE_TDF_CYCLE(3), + &smc->cs[3].mode); #elif defined(CONFIG_CPU9260) - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_DBW_8 | - AT91_SMC_TDF_(2)); + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), + &smc->cs[3].pulse); + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + &smc->cs[3].cycle); + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | + AT91_SMC_MODE_DBW_8 | + AT91_SMC_MODE_TDF_CYCLE(2), + &smc->cs[3].mode); #endif
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); + writel(1 << AT91SAM9260_ID_PIOC, &pmc->pcer);
/* Configure RDY/BSY */ - at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
/* Enable NandFlash */ - at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); + at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); } #endif
#ifdef CONFIG_MACB static void cpu9260_macb_hw_init(void) { - unsigned long rstc; + unsigned long rstcmr; + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;
/* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC); - - /* - * Disable pull-up on: - * RXDV (PA17) => PHY normal mode (not Test mode) - * ERX0 (PA14) => PHY ADDR0 - * ERX1 (PA15) => PHY ADDR1 - * ERX2 (PA25) => PHY ADDR2 - * ERX3 (PA26) => PHY ADDR3 - * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 - * - * PHY has internal pull-down - */ - writel(pin_to_mask(AT91_PIN_PA14) | - pin_to_mask(AT91_PIN_PA15) | - pin_to_mask(AT91_PIN_PA17) | - pin_to_mask(AT91_PIN_PA25) | - pin_to_mask(AT91_PIN_PA26) | - pin_to_mask(AT91_PIN_PA28), - pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); - - rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL; + writel(1 << AT91SAM9260_ID_EMAC, &pmc->pcer); + + at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1); + + rstcmr = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
/* Need to reset PHY -> 500ms reset */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (AT91_RSTC_ERSTL & (0x0D << 8)) | - AT91_RSTC_URSTEN); + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0xD) | + AT91_RSTC_MR_URSTEN, &rstc->mr);
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
/* Wait for end hardware reset */ - while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)) + while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) ;
/* Restore NRST value */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (rstc) | - AT91_RSTC_URSTEN); - - /* Re-enable pull-up */ - writel(pin_to_mask(AT91_PIN_PA14) | - pin_to_mask(AT91_PIN_PA15) | - pin_to_mask(AT91_PIN_PA17) | - pin_to_mask(AT91_PIN_PA25) | - pin_to_mask(AT91_PIN_PA26) | - pin_to_mask(AT91_PIN_PA28), - pin_to_controller(AT91_PIN_PA0) + PIO_PUER); + writel(AT91_RSTC_KEY | rstcmr | AT91_RSTC_MR_URSTEN, &rstc->mr);
at91_macb_hw_init(); } #endif
-int board_init(void) +int board_early_init_f(void) { - /* Enable Ctrlc */ - console_init_f(); + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + + writel((1 << AT91SAM9260_ID_PIOA) | + (1 << AT91SAM9260_ID_PIOC) | + (1 << AT91SAM9260_ID_PIOB), + &pmc->pcer); + + at91_serial_hw_init(); + + return 0; +}
+ +int board_init(void) +{ /* arch number of the board */ #if defined(CONFIG_CPU9G20) gd->bd->bi_arch_number = MACH_TYPE_CPUAT9G20; @@ -171,9 +159,8 @@ int board_init(void) #endif
/* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
- at91_serial_hw_init(); #ifdef CONFIG_CMD_NAND cpu9260_nand_hw_init(); #endif @@ -188,26 +175,16 @@ int board_init(void)
int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM; - if (get_ram_size((long *) PHYS_SDRAM, PHYS_SDRAM_SIZE) != - PHYS_SDRAM_SIZE) - return -1; - - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return 0; }
-#ifdef CONFIG_RESET_PHY_R -void reset_phy(void) -{ -} -#endif - int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00); + rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0); #endif return rc; } diff --git a/board/eukrea/cpu9260/led.c b/board/eukrea/cpu9260/led.c index e73543b..d0906bc 100644 --- a/board/eukrea/cpu9260/led.c +++ b/board/eukrea/cpu9260/led.c @@ -35,65 +35,67 @@ static unsigned int saved_state[4] = {STATUS_LED_OFF, STATUS_LED_OFF,
void coloured_LED_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); + writel(1 << AT91SAM9260_ID_PIOC, &pmc->pcer);
- at91_set_gpio_output(CONFIG_RED_LED, 1); - at91_set_gpio_output(CONFIG_GREEN_LED, 1); - at91_set_gpio_output(CONFIG_YELLOW_LED, 1); - at91_set_gpio_output(CONFIG_BLUE_LED, 1); + at91_set_pio_output(CONFIG_RED_LED, 1); + at91_set_pio_output(CONFIG_GREEN_LED, 1); + at91_set_pio_output(CONFIG_YELLOW_LED, 1); + at91_set_pio_output(CONFIG_BLUE_LED, 1);
- at91_set_gpio_value(CONFIG_RED_LED, 1); - at91_set_gpio_value(CONFIG_GREEN_LED, 1); - at91_set_gpio_value(CONFIG_YELLOW_LED, 1); - at91_set_gpio_value(CONFIG_BLUE_LED, 1); + at91_set_pio_value(CONFIG_RED_LED, 1); + at91_set_pio_value(CONFIG_GREEN_LED, 1); + at91_set_pio_value(CONFIG_YELLOW_LED, 1); + at91_set_pio_value(CONFIG_BLUE_LED, 1); }
void red_LED_off(void) { - at91_set_gpio_value(CONFIG_RED_LED, 1); + at91_set_pio_value(CONFIG_RED_LED, 1); saved_state[STATUS_LED_RED] = STATUS_LED_OFF; }
void green_LED_off(void) { - at91_set_gpio_value(CONFIG_GREEN_LED, 1); + at91_set_pio_value(CONFIG_GREEN_LED, 1); saved_state[STATUS_LED_GREEN] = STATUS_LED_OFF; }
void yellow_LED_off(void) { - at91_set_gpio_value(CONFIG_YELLOW_LED, 1); + at91_set_pio_value(CONFIG_YELLOW_LED, 1); saved_state[STATUS_LED_YELLOW] = STATUS_LED_OFF; }
void blue_LED_off(void) { - at91_set_gpio_value(CONFIG_BLUE_LED, 1); + at91_set_pio_value(CONFIG_BLUE_LED, 1); saved_state[STATUS_LED_BLUE] = STATUS_LED_OFF; }
void red_LED_on(void) { - at91_set_gpio_value(CONFIG_RED_LED, 0); + at91_set_pio_value(CONFIG_RED_LED, 0); saved_state[STATUS_LED_RED] = STATUS_LED_ON; }
void green_LED_on(void) { - at91_set_gpio_value(CONFIG_GREEN_LED, 0); + at91_set_pio_value(CONFIG_GREEN_LED, 0); saved_state[STATUS_LED_GREEN] = STATUS_LED_ON; }
void yellow_LED_on(void) { - at91_set_gpio_value(CONFIG_YELLOW_LED, 0); + at91_set_pio_value(CONFIG_YELLOW_LED, 0); saved_state[STATUS_LED_YELLOW] = STATUS_LED_ON; }
void blue_LED_on(void) { - at91_set_gpio_value(CONFIG_BLUE_LED, 0); + at91_set_pio_value(CONFIG_BLUE_LED, 0); saved_state[STATUS_LED_BLUE] = STATUS_LED_ON; }
diff --git a/boards.cfg b/boards.cfg index 105c748..2f0d1df 100644 --- a/boards.cfg +++ b/boards.cfg @@ -72,6 +72,14 @@ omap1510inn arm arm925t - ti aspenite arm arm926ejs - Marvell armada100 afeb9260 arm arm926ejs - - at91 at91cap9adk arm arm926ejs - atmel at91 +cpu9260 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260 +cpu9260_nand arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260,NANDBOOT +cpu9260_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260,CPU9260_128M +cpu9260_nand_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260,CPU9260_128M,NANDBOOT +cpu9G20 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20 +cpu9G20_nand arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20,NANDBOOT +cpu9G20_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20,CPU9G20_128M +cpu9G20_nand_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20,CPU9G20_128M,NANDBOOT top9000eval_xe arm arm926ejs top9000 emk at91 top9000:EVAL9000 top9000su_xe arm arm926ejs top9000 emk at91 top9000:SU9000 meesc arm arm926ejs - esd at91 diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h index d239423..a8ada2d 100644 --- a/include/configs/cpu9260.h +++ b/include/configs/cpu9260.h @@ -31,35 +31,39 @@ #ifndef __CONFIG_H #define __CONFIG_H
-#define CONFIG_AT91_LEGACY - -#define CONFIG_DISPLAY_CPUINFO 1 +/* to be removed once maemory-map.h is fixed */ +#define AT91_BASE_SYS 0xffffe800 +#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 #define CONFIG_SYS_HZ 1000
-#define CONFIG_ARM926EJS 1 - -#if defined(CONFIG_CPU9260_128M) || defined(CONFIG_CPU9260) -#define CONFIG_CPU9260 1 -#elif defined(CONFIG_CPU9G20_128M) || defined(CONFIG_CPU9G20) -#define CONFIG_CPU9G20 1 -#endif +#define CONFIG_ARM926EJS
#if defined(CONFIG_CPU9G20) -#define CONFIG_AT91SAM9G20 1 +#define CONFIG_AT91SAM9G20 #elif defined(CONFIG_CPU9260) -#define CONFIG_AT91SAM9260 1 +#define CONFIG_AT91SAM9260 #else #error "Unknown board" #endif
+#define CONFIG_AT91FAMILY #define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +#if defined(CONFIG_NANDBOOT) +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x23f00000 +#else +#define CONFIG_SYS_TEXT_BASE 0x00000000 +#endif
/* clocks */ #if defined(CONFIG_CPU9G20) @@ -113,8 +117,8 @@
/* EBI_CSA, 3.3V, no pull-ups for D[15:0], CS1 SDRAM, CS3 NAND Flash */ #define CONFIG_SYS_MATRIX_EBICSA_VAL \ - (AT91_MATRIX_DBPUC | AT91_MATRIX_CS1A_SDRAMC |\ - AT91_MATRIX_CS3A_SMC_SMARTMEDIA | AT91_MATRIX_VDDIOMSEL) + (AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_EBI_CS1A | \ + AT91_MATRIX_CSA_EBI_CS3A | AT91_MATRIX_CSA_VDDIOMSEL_3_3V)
/* SDRAM */ /* SDRAMC_MR Mode register */ @@ -199,67 +203,68 @@ /* setup SMC0, CS0 (NOR Flash) - 16-bit */ #if defined(CONFIG_CPU9G20) #define CONFIG_SYS_SMC0_SETUP0_VAL \ - (AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | \ - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)) + (AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) | \ + AT91_SMC_SETUP_NRD(0) | AT91_SMC_SETUP_NCS_RD(0)) #define CONFIG_SYS_SMC0_PULSE0_VAL \ - (AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(8) | \ - AT91_SMC_NRDPULSE_(14) | AT91_SMC_NCS_RDPULSE_(14)) + (AT91_SMC_PULSE_NWE(8) | AT91_SMC_PULSE_NCS_WR(8) | \ + AT91_SMC_PULSE_NRD(14) | AT91_SMC_PULSE_NCS_RD(14)) #define CONFIG_SYS_SMC0_CYCLE0_VAL \ - (AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(14)) + (AT91_SMC_CYCLE_NWE(8) | AT91_SMC_CYCLE_NRD(14)) #define CONFIG_SYS_SMC0_MODE0_VAL \ - (AT91_SMC_READMODE | AT91_SMC_WRITEMODE | \ - AT91_SMC_DBW_16 | \ - AT91_SMC_TDFMODE | \ - AT91_SMC_TDF_(3)) + (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \ + AT91_SMC_MODE_DBW_16 | \ + AT91_SMC_MODE_TDF | \ + AT91_SMC_MODE_TDF_CYCLE(3)) #elif defined(CONFIG_CPU9260) #define CONFIG_SYS_SMC0_SETUP0_VAL \ - (AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | \ - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)) + (AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) | \ + AT91_SMC_SETUP_NRD(0) | AT91_SMC_SETUP_NCS_RD(0)) #define CONFIG_SYS_SMC0_PULSE0_VAL \ - (AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(6) | \ - AT91_SMC_NRDPULSE_(10) | AT91_SMC_NCS_RDPULSE_(10)) + (AT91_SMC_PULSE_NWE(6) | AT91_SMC_PULSE_NCS_WR(6) | \ + AT91_SMC_PULSE_NRD(10) | AT91_SMC_PULSE_NCS_RD(10)) #define CONFIG_SYS_SMC0_CYCLE0_VAL \ - (AT91_SMC_NWECYCLE_(6) | AT91_SMC_NRDCYCLE_(10)) + (AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(10)) #define CONFIG_SYS_SMC0_MODE0_VAL \ - (AT91_SMC_READMODE | AT91_SMC_WRITEMODE | \ - AT91_SMC_DBW_16 | \ - AT91_SMC_TDFMODE | \ - AT91_SMC_TDF_(2)) + (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \ + AT91_SMC_MODE_DBW_16 | \ + AT91_SMC_MODE_TDF | \ + AT91_SMC_MODE_TDF_CYCLE(2)) #endif
/* user reset enable */ #define CONFIG_SYS_RSTC_RMR_VAL \ (AT91_RSTC_KEY | \ - AT91_RSTC_PROCRST | \ - AT91_RSTC_RSTTYP_WAKEUP | \ - AT91_RSTC_RSTTYP_WATCHDOG) + AT91_RSTC_CR_PROCRST | \ + AT91_RSTC_MR_ERSTL(1) | \ + AT91_RSTC_MR_ERSTL(2))
/* Disable Watchdog */ #define CONFIG_SYS_WDTC_WDMR_VAL \ - (AT91_WDT_WDIDLEHLT | AT91_WDT_WDDBGHLT | \ - AT91_WDT_WDV | \ - AT91_WDT_WDDIS | \ - AT91_WDT_WDD) + (AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT | \ + AT91_WDT_MR_WDV(0xfff) | \ + AT91_WDT_MR_WDDIS | \ + AT91_WDT_MR_WDD(0xfff))
/* * Hardware drivers */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 +#define CONFIG_AT91SAM9_WATCHDOG +#define CONFIG_AT91_GPIO +#define CONFIG_ATMEL_USART #undef CONFIG_USART0 #undef CONFIG_USART1 #undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ +#define CONFIG_USART3
#define CONFIG_BOOTDELAY 3
/* * BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME
/* * Command line configuration. @@ -271,37 +276,41 @@ #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_IMLS
-#define CONFIG_CMD_PING 1 -#define CONFIG_CMD_DHCP 1 -#define CONFIG_CMD_NAND 1 -#define CONFIG_CMD_USB 1 -#define CONFIG_CMD_FAT 1 +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NAND +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_CMD_MII
/* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM 0x20000000 +#define CONFIG_SYS_SDRAM_BASE 0x20000000 #if defined(CONFIG_CPU9260_128M) || defined(CONFIG_CPU9G20_128M) -#define PHYS_SDRAM_SIZE 0x08000000 /* 128 MB */ +#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) #define CONFIG_SYS_SDRC_CR_VAL CONFIG_SYS_SDRC_CR_VAL_128MB #else -#define PHYS_SDRAM_SIZE 0x04000000 /* 64 MB */ +#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) #define CONFIG_SYS_SDRC_CR_VAL CONFIG_SYS_SDRC_CR_VAL_64MB #endif
/* NAND flash */ -#define CONFIG_NAND_ATMEL 1 +#define CONFIG_NAND_ATMEL #define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTC, 13 +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
/* NOR flash */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 +#if defined(CONFIG_NANDBOOT) +#define CONFIG_SYS_NO_FLASH +#else +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER #define PHYS_FLASH_1 0x10000000 #define PHYS_FLASH_2 0x12000000 #define CONFIG_SYS_FLASH_BANKS_LIST \ @@ -310,23 +319,23 @@ #define CONFIG_SYS_MAX_FLASH_SECT (255+4) #define CONFIG_SYS_MAX_FLASH_BANKS 2 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_EMPTY_INFO 1 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -#define CONFIG_SYS_FLASH_PROTECTION 1 +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 +#endif
/* Ethernet */ -#define CONFIG_MACB 1 -#define CONFIG_RMII 1 -#define CONFIG_RESET_PHY_R 1 -#define CONFIG_NET_MULTI 1 +#define CONFIG_MACB +#define CONFIG_RMII +#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_MACB_SEARCH_PHY 1 +#define CONFIG_MACB_SEARCH_PHY
/* LEDS */ /* Status LED */ -#define CONFIG_STATUS_LED 1 /* Status LED enabled */ -#define CONFIG_BOARD_SPECIFIC_LED 1 +#define CONFIG_STATUS_LED +#define CONFIG_BOARD_SPECIFIC_LED #define STATUS_LED_RED 0 #define STATUS_LED_GREEN 1 #define STATUS_LED_YELLOW 2 @@ -350,39 +359,56 @@ /* Optional value */ #define STATUS_LED_BOOT STATUS_LED_BIT
-#define CONFIG_RED_LED AT91_PIN_PC11 -#define CONFIG_GREEN_LED AT91_PIN_PC12 -#define CONFIG_YELLOW_LED AT91_PIN_PC7 -#define CONFIG_BLUE_LED AT91_PIN_PC9 +#define CONFIG_RED_LED AT91_PIO_PORTC, 11 +#define CONFIG_GREEN_LED AT91_PIO_PORTC, 12 +#define CONFIG_YELLOW_LED AT91_PIO_PORTC, 7 +#define CONFIG_BLUE_LED AT91_PIO_PORTC, 9
/* USB */ -#define CONFIG_USB_ATMEL 1 -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_DOS_PARTITION 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW +#define CONFIG_DOS_PARTITION +#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 +#if defined(CONFIG_CPU9G20) +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g20" +#elif defined(CONFIG_CPU9260) #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" +#endif #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_STORAGE 1 +#define CONFIG_USB_STORAGE
#define CONFIG_SYS_LOAD_ADDR 0x21000000 +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END 0x21e00000 +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END \ + (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - 512 * 1024)
+#if defined(CONFIG_NANDBOOT) +#define CONFIG_SYS_USE_NANDFLASH +#undef CONFIG_SYS_USE_FLASH +#else +#define CONFIG_SYS_USE_FLASH #undef CONFIG_SYS_USE_NANDFLASH -#define CONFIG_SYS_USE_FLASH 1 +#endif + +#if defined(CONFIG_CPU9G20) +#define CONFIG_SYS_BASEDIR "cpu9G20" +#elif defined(CONFIG_CPU9260) +#define CONFIG_SYS_BASEDIR "cpu9260" +#endif
#if defined(CONFIG_SYS_USE_FLASH) -#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_OFFSET 0x40000 #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_ENV_OVERWRITE
#define CONFIG_BOOTCOMMAND "run flashboot"
-#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=atmel_nand" +#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=atmel_nand" #define MTDPARTS_DEFAULT \ "mtdparts=physmap-flash.0:" \ "256k(u-boot)ro," \ @@ -393,18 +419,12 @@
#define CONFIG_BOOTARGS "root=/dev/mtdblock3 rootfstype=jffs2 "
-#if defined(CONFIG_CPU9G20) -#define CONFIG_SYS_BASEDIR "cpu9G20" -#elif defined(CONFIG_CPU9260) -#define CONFIG_SYS_BASEDIR "cpu9260" -#endif - #define CONFIG_EXTRA_ENV_SETTINGS \ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "partition=nand0,0\0" \ "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ - "ramboot=tftpboot 0x22000000 cpu9260/uImage;" \ + "ramboot=tftpboot 0x22000000 $(basedir)/uImage;" \ "run ramargs;bootm 22000000\0" \ "flashboot=run ramargs;bootm 0x10060000\0" \ "basedir=" CONFIG_SYS_BASEDIR "\0" \ @@ -421,6 +441,52 @@ "0x10220000 0x13ffffff;cp.b 0x24000000 " \ "0x10220000 $(filesize)\0" \ "" +#elif defined(CONFIG_NANDBOOT) +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_BOOTCOMMAND "run flashboot" + +#define MTDIDS_DEFAULT "nand0=atmel_nand" +#define MTDPARTS_DEFAULT \ + "mtdparts=atmel_nand:" \ + "128k(bootstrap)ro," \ + "256k(u-boot)ro," \ + "128k(u-boot-env)ro," \ + "128k(u-boot-env2)ro," \ + "2M(kernel)," \ + "-(rootfs)" + +#define CONFIG_BOOTARGS "root=ubi0:eukrea-cpu9260-rootfs " \ + "ubi.mtd=5 rootfstype=ubifs at91sam9_wdt.heartbeat=60" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "partition=nand0,5\0" \ + "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ + "ramboot=tftpboot 0x22000000 $(basedir)/uImage;" \ + "run ramargs;bootm 22000000\0" \ + "flashboot=run ramargs; nand read 0x22000000 0xA0000 " \ + "0x200000; bootm 0x22000000\0" \ + "basedir=" CONFIG_SYS_BASEDIR "\0" \ + "u-boot=u-boot-eukrea-cpu9260.bin\0" \ + "kernel=uImage-eukrea-cpu9260.bin\0" \ + "rootfs=image-eukrea-cpu9260.ubi\0" \ + "updtub=tftp ${loadaddr} $(basedir)/${u-boot}; " \ + "nand erase 20000 40000; " \ + "nand write ${loadaddr} 20000 40000\0" \ + "updtui=tftp ${loadaddr} $(basedir)/${kernel}; " \ + "nand erase a0000 200000; " \ + "nand write ${loadaddr} a0000 200000\0" \ + "updtrfs=tftp ${loadaddr} $(basedir)/${rootfs}; " \ + "nand erase 2a0000 fd60000; " \ + "nand write ${loadaddr} 2a0000 ${filesize}\0" #endif
#define CONFIG_BAUDRATE 115200 @@ -435,10 +501,10 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_SILENT_CONSOLE 1 -#define CONFIG_NETCONSOLE 1 +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SILENT_CONSOLE +#define CONFIG_NETCONSOLE
/* * Size of malloc() pool @@ -446,6 +512,9 @@ #define CONFIG_SYS_MALLOC_LEN \ ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - \ + GENERATED_GBL_DATA_SIZE) + #define CONFIG_STACKSIZE (32 * 1024)
#if defined(CONFIG_USE_IRQ)
Hi,
On 03/04/2011 18:35, Eric Bénard wrote:
- update to new relocation code
- switch to boards.cfg
- get rid of LEGACY (still a little hack in .h to compile)
- add nand boot configuration
- boot tested for the following configurations : 9260 (64MB RAM& nor boot) 9260_nand (64MB RAM& nand boot) 9G20_128M (128MB RAM& nor boot) 9G20_nand_128M (128MB RAM& nand boot) (nor boot is using lowlevel init)
Signed-off-by: Eric Bénarderic@eukrea.com
any news concerning this patch ? http://patchwork.ozlabs.org/patch/89540/
Thanks, Eric
Le 03/04/2011 18:35, Eric Bénard a écrit :
diff --git a/board/eukrea/cpu9260/cpu9260.c b/board/eukrea/cpu9260/cpu9260.c index 61b6c33..9ec48a0 100644 --- a/board/eukrea/cpu9260/cpu9260.c +++ b/board/eukrea/cpu9260/cpu9260.c
@@ -188,26 +175,16 @@ int board_init(void)
int dram_init(void) {
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- if (get_ram_size((long *) PHYS_SDRAM, PHYS_SDRAM_SIZE) !=
PHYS_SDRAM_SIZE)return -1;- gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
- gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_SYS_SDRAM_SIZE);
Checkpatch warns about the volatile here.
I know the get_ram_size() prototype calls for the volatile attribute, but what is the rationale here for this? get_ram_size() just needs the RAM base address *value*; if it requires volatile accesses to it, it can arrange for these inside its definition. Besides, throughout the code base there are 19 instances of get_ram_size() callw where the argument is cast to volatile, against 130 where it is not.
Wolfgang et al.: how about removing the 'volatile' qualifier from the get_ram_size() prototype?
Eric: if your patch does not cause a warning without the volatile in the call, can you update and repost it as V2?
diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h index d239423..a8ada2d 100644 --- a/include/configs/cpu9260.h +++ b/include/configs/cpu9260.h
-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTC, 13 +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14
-#define CONFIG_RED_LED AT91_PIN_PC11 -#define CONFIG_GREEN_LED AT91_PIN_PC12 -#define CONFIG_YELLOW_LED AT91_PIN_PC7 -#define CONFIG_BLUE_LED AT91_PIN_PC9 +#define CONFIG_RED_LED AT91_PIO_PORTC, 11 +#define CONFIG_GREEN_LED AT91_PIO_PORTC, 12 +#define CONFIG_YELLOW_LED AT91_PIO_PORTC, 7 +#define CONFIG_BLUE_LED AT91_PIO_PORTC, 9
Checkpatch considers these errors. This is again a case where we'd want it to ignore it... or reconsider this type of macro, which intends to expand to several function arguments.
For now I'll ignore these 6 checkpatch errors.
Amicalement,
Le 16/04/2011 09:26, Albert ARIBAUD a écrit :
Le 03/04/2011 18:35, Eric Bénard a écrit :
diff --git a/board/eukrea/cpu9260/cpu9260.c b/board/eukrea/cpu9260/cpu9260.c index 61b6c33..9ec48a0 100644 --- a/board/eukrea/cpu9260/cpu9260.c +++ b/board/eukrea/cpu9260/cpu9260.c
@@ -188,26 +175,16 @@ int board_init(void)
int dram_init(void) {
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- if (get_ram_size((long *) PHYS_SDRAM, PHYS_SDRAM_SIZE) !=
PHYS_SDRAM_SIZE)return -1;- gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
- gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_SYS_SDRAM_SIZE);Checkpatch warns about the volatile here.
I know the get_ram_size() prototype calls for the volatile attribute, but what is the rationale here for this? get_ram_size() just needs the RAM base address *value*; if it requires volatile accesses to it, it can arrange for these inside its definition. Besides, throughout the code base there are 19 instances of get_ram_size() callw where the argument is cast to volatile, against 130 where it is not.
Wolfgang et al.: how about removing the 'volatile' qualifier from the get_ram_size() prototype?
Eric: if your patch does not cause a warning without the volatile in the call, can you update and repost it as V2?
diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h index d239423..a8ada2d 100644 --- a/include/configs/cpu9260.h +++ b/include/configs/cpu9260.h
-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTC, 13 +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14
-#define CONFIG_RED_LED AT91_PIN_PC11 -#define CONFIG_GREEN_LED AT91_PIN_PC12 -#define CONFIG_YELLOW_LED AT91_PIN_PC7 -#define CONFIG_BLUE_LED AT91_PIN_PC9 +#define CONFIG_RED_LED AT91_PIO_PORTC, 11 +#define CONFIG_GREEN_LED AT91_PIO_PORTC, 12 +#define CONFIG_YELLOW_LED AT91_PIO_PORTC, 7 +#define CONFIG_BLUE_LED AT91_PIO_PORTC, 9
Checkpatch considers these errors. This is again a case where we'd want it to ignore it... or reconsider this type of macro, which intends to expand to several function arguments.
For now I'll ignore these 6 checkpatch errors.
Amicalement,
Applied to u-boot-arm/master, thanks.
Amicalement,
- fix board support following relocation changes - switch to boards.cfg - disable i2c to keep size under 128kiB (1 sector)
Signed-off-by: Eric Bénard eric@eukrea.com --- Makefile | 10 --- board/eukrea/cpuat91/Makefile | 4 +- board/eukrea/cpuat91/config.mk | 1 - board/eukrea/cpuat91/cpuat91.c | 11 ++-- boards.cfg | 2 + include/configs/cpuat91.h | 141 ++++++++++++++++++++++------------------ 6 files changed, 87 insertions(+), 82 deletions(-) delete mode 100644 board/eukrea/cpuat91/config.mk
diff --git a/Makefile b/Makefile index 10a856a..aeb6e7c 100644 --- a/Makefile +++ b/Makefile @@ -749,16 +749,6 @@ M5485HFE_config : unconfig #========================================================================
######################################################################### -## Atmel AT91RM9200 Systems -######################################################################### - -CPUAT91_RAM_config \ -CPUAT91_config : unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a cpuat91 arm arm920t cpuat91 eukrea at91 - -######################################################################### ## ARM926EJ-S Systems #########################################################################
diff --git a/board/eukrea/cpuat91/Makefile b/board/eukrea/cpuat91/Makefile index 15da3d8..1d62b13 100644 --- a/board/eukrea/cpuat91/Makefile +++ b/board/eukrea/cpuat91/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
-COBJS := cpuat91.o +COBJS := $(BOARD).o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS)
distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
diff --git a/board/eukrea/cpuat91/config.mk b/board/eukrea/cpuat91/config.mk deleted file mode 100644 index 463f46b..0000000 --- a/board/eukrea/cpuat91/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x21F00000 diff --git a/board/eukrea/cpuat91/cpuat91.c b/board/eukrea/cpuat91/cpuat91.c index cd4d42c..4c4dad6 100644 --- a/board/eukrea/cpuat91/cpuat91.c +++ b/board/eukrea/cpuat91/cpuat91.c @@ -47,24 +47,23 @@ int board_init(void) /* arch number of CPUAT91-Board */ gd->bd->bi_arch_number = MACH_TYPE_CPUAT91; /* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
return 0; }
int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM; - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return 0; }
#ifdef CONFIG_DRIVER_AT91EMAC int board_eth_init(bd_t *bis) { - int rc = 0; - rc = at91emac_register(bis, 0); - return rc; + return at91emac_register(bis, (u32) AT91_EMAC_BASE); } #endif
diff --git a/boards.cfg b/boards.cfg index 2f0d1df..64b5f95 100644 --- a/boards.cfg +++ b/boards.cfg @@ -52,6 +52,8 @@ a320evb arm arm920t - faraday at91rm9200ek arm arm920t at91rm9200ek atmel at91 at91rm9200ek at91rm9200ek_ram arm arm920t at91rm9200ek atmel at91 at91rm9200ek:RAMBOOT eb_cpux9k2 arm arm920t - BuS at91 +cpuat91 arm arm920t cpuat91 eukrea at91 cpuat91 +cpuat91_ram arm arm920t cpuat91 eukrea at91 cpuat91:RAMBOOT cmc_pu2 arm arm920t - - at91rm9200 csb637 arm arm920t - - at91rm9200 kb9202 arm arm920t - - at91rm9200 diff --git a/include/configs/cpuat91.h b/include/configs/cpuat91.h index f31081d..cfaef15 100644 --- a/include/configs/cpuat91.h +++ b/include/configs/cpuat91.h @@ -26,30 +26,36 @@ #ifndef _CONFIG_CPUAT91_H #define _CONFIG_CPUAT91_H
-#ifdef CONFIG_CPUAT91_RAM -#define CONFIG_SKIP_LOWLEVEL_INIT 1 +#include <asm/sizes.h> + +#ifdef CONFIG_RAMBOOT +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x21F00000 #else #define CONFIG_BOOTDELAY 1 +#define CONFIG_SYS_TEXT_BASE 0 #endif
-#define AT91C_MAIN_CLOCK 179712000 -#define AT91C_MASTER_CLOCK 59904000 - -#define AT91_SLOW_CLOCK 32768 +#define AT91C_XTAL_CLOCK 18432000 +#define AT91C_MAIN_CLOCK ((AT91C_XTAL_CLOCK / 4) * 39) +#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3) +#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) +#define CONFIG_SYS_HZ 1000
-#define CONFIG_ARM920T 1 -#define CONFIG_AT91RM9200 1 -#define CONFIG_CPUAT91 1 +#define CONFIG_ARM920T +#define CONFIG_AT91RM9200 +#define CONFIG_CPUAT91 +#define CONFIG_AT91FAMILY
#undef CONFIG_USE_IRQ -#define USE_920T_MMU 1 +#define USE_920T_MMU
-#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG
#ifndef CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 +#define CONFIG_SYS_USE_MAIN_OSCILLATOR /* flash */ #define CONFIG_SYS_MC_PUIA_VAL 0x00000000 #define CONFIG_SYS_MC_PUP_VAL 0x00000000 @@ -81,17 +87,15 @@ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/* define one of these to choose the DBGU, USART0 or USART1 as console */ -#define CONFIG_AT91RM9200_USART 1 -#define CONFIG_DBGU 1 -#undef CONFIG_USART0 -#undef CONFIG_USART1 +#define CONFIG_AT91RM9200_USART +#define CONFIG_DBGU
#undef CONFIG_HARD_I2C -#define CONFIG_SOFT_I2C 1 +#undef CONFIG_SOFT_I2C #define AT91_PIN_SDA (1<<25) #define AT91_PIN_SCL (1<<26)
-#define CONFIG_SYS_I2C_INIT_BOARD 1 +#define CONFIG_SYS_I2C_INIT_BOARD #define CONFIG_SYS_I2C_SPEED 50000 #define CONFIG_SYS_I2C_SLAVE 0
@@ -117,70 +121,77 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
-#define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME
#include <config_cmd_default.h>
-#define CONFIG_CMD_DHCP 1 -#define CONFIG_CMD_PING 1 -#define CONFIG_CMD_MII 1 -#define CONFIG_CMD_CACHE 1 +#define CONFIG_CMD_PING +#define CONFIG_CMD_MII +#define CONFIG_CMD_CACHE #undef CONFIG_CMD_USB #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMI #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_NFS +#undef CONFIG_CMD_DHCP
-#define CONFIG_CMD_EEPROM 1 -#define CONFIG_CMD_I2C 1 +#ifdef CONFIG_SOFT_I2C +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C +#endif
#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM 0x20000000 -#define PHYS_SDRAM_SIZE 0x02000000 +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024)
-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END \ - (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 512 * 1024) + (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - 512 * 1024)
-#define CONFIG_NET_MULTI 1 -#define CONFIG_DRIVER_AT91EMAC 1 -#define CONFIG_SYS_RX_ETH_BUFFER 8 -#define CONFIG_RMII 1 -#define CONFIG_MII 1 +#define CONFIG_NET_MULTI +#define CONFIG_DRIVER_AT91EMAC +#define CONFIG_SYS_RX_ETH_BUFFER 16 +#define CONFIG_RMII +#define CONFIG_MII #define CONFIG_DRIVER_AT91EMAC_PHYADDR 1 #define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_KS8721_PHY 1 +#define CONFIG_KS8721_PHY
-#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_EMPTY_INFO 1 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_PROTECTION 1 +#define CONFIG_SYS_FLASH_PROTECTION #define PHYS_FLASH_1 0x10000000 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MAX_FLASH_SECT 128 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 +#define PHYS_FLASH_SIZE (16 * 1024 * 1024) +#define CONFIG_SYS_FLASH_BANKS_LIST \ + { PHYS_FLASH_1 }
#if defined(CONFIG_CMD_USB) -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_USB_STORAGE 1 -#define CONFIG_DOS_PARTITION 1 -#define CONFIG_AT91C_PQFP_UHPBU 1 +#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_AT91C_PQFP_UHPBU #undef CONFIG_SYS_USB_OHCI_BOARD_INIT -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 #endif
-#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) -#define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 128 * 1024) +#define CONFIG_ENV_SIZE (128 * 1024) +#define CONFIG_ENV_SECT_SIZE (128 * 1024)
#define CONFIG_SYS_LOAD_ADDR 0x21000000
@@ -192,29 +203,33 @@ #define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) +#define CONFIG_SYS_MALLOC_LEN \ + ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 4 * 1024) + +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - \ + GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) #define CONFIG_STACKSIZE (32 * 1024) +#define CONFIG_STACKSIZE_IRQ (4 * 1024) +#define CONFIG_STACKSIZE_FIQ (4 * 1024) +
#if defined(CONFIG_USE_IRQ) #error CONFIG_USE_IRQ not supported #endif
-#define CONFIG_DEVICE_NULLDEV 1 -#define CONFIG_SILENT_CONSOLE 1 +#define CONFIG_DEVICE_NULLDEV +#define CONFIG_SILENT_CONSOLE
-#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_KEYED #define CONFIG_AUTOBOOT_PROMPT \ "Press SPACE to abort autoboot\n" #define CONFIG_AUTOBOOT_STOP_STR " " #define CONFIG_AUTOBOOT_DELAY_STR "d"
-#define CONFIG_VERSION_VARIABLE 1 +#define CONFIG_VERSION_VARIABLE
#define MTDIDS_DEFAULT "nor0=physmap-flash.0" #define MTDPARTS_DEFAULT \
Hi,
On 03/04/2011 18:35, Eric Bénard wrote:
- fix board support following relocation changes
- switch to boards.cfg
- disable i2c to keep size under 128kiB (1 sector)
Signed-off-by: Eric Bénarderic@eukrea.com
any news concerning this patch ? http://patchwork.ozlabs.org/patch/89536/
Thanks, Eric
Le 03/04/2011 18:35, Eric Bénard a écrit :
- fix board support following relocation changes
- switch to boards.cfg
- disable i2c to keep size under 128kiB (1 sector)
Signed-off-by: Eric Bénarderic@eukrea.com
Reinhard: this was delegated to you in patchwork, but since this is only board support, not arch, and I have applied other at91-related patches in the series, I took the liberty of assigning it to myself.
Applied to u-boot-arm/master, thanks.
Amicalement,
Dear Eric,
In message 1301848555-14404-1-git-send-email-eric@eukrea.com you wrote:
this board was cancelled long time ago so remove it as it won't be maintained anymore
Signed-off-by: Eric Bénard eric@eukrea.com
board/mp2usb/Makefile | 50 ----- board/mp2usb/config.mk | 3 - board/mp2usb/flash.c | 552 ---------------------------------------------- board/mp2usb/mp2usb.c | 98 -------- boards.cfg | 1 - include/configs/mp2usb.h | 242 -------------------- 6 files changed, 0 insertions(+), 946 deletions(-) delete mode 100644 board/mp2usb/Makefile delete mode 100644 board/mp2usb/config.mk delete mode 100644 board/mp2usb/flash.c delete mode 100644 board/mp2usb/mp2usb.c delete mode 100644 include/configs/mp2usb.h
This does not apply cleanly. Can you please rebase and resubmit?
Please also make an entry about the removal in doc/README.scrapyard - thanks!
Best regards,
Wolfgang Denk
Hi Wolfgang,
On 27/04/2011 22:00, Wolfgang Denk wrote:
In message1301848555-14404-1-git-send-email-eric@eukrea.com you wrote:
this board was cancelled long time ago so remove it as it won't be maintained anymore
Signed-off-by: Eric Bénarderic@eukrea.com
board/mp2usb/Makefile | 50 ----- board/mp2usb/config.mk | 3 - board/mp2usb/flash.c | 552 ---------------------------------------------- board/mp2usb/mp2usb.c | 98 -------- boards.cfg | 1 - include/configs/mp2usb.h | 242 -------------------- 6 files changed, 0 insertions(+), 946 deletions(-) delete mode 100644 board/mp2usb/Makefile delete mode 100644 board/mp2usb/config.mk delete mode 100644 board/mp2usb/flash.c delete mode 100644 board/mp2usb/mp2usb.c delete mode 100644 include/configs/mp2usb.h
This does not apply cleanly. Can you please rebase and resubmit?
in fact you already applied it ee986e2a7d1fd38568e2e5f83563b7bc4f607963 but took the 1st version which didn't remove boards.cfg (I forget to add v2 btw).
Please also make an entry about the removal in doc/README.scrapyard - thanks!
a patch finishing to work follows.
Thanks, Eric
- remove from boards.cfg - add to doc/README.scrapyard
Signed-off-by: Eric Bénard eric@eukrea.com --- boards.cfg | 1 - doc/README.scrapyard | 1 + 2 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/boards.cfg b/boards.cfg index d4cbb06..916414a 100644 --- a/boards.cfg +++ b/boards.cfg @@ -56,7 +56,6 @@ cmc_pu2 arm arm920t - - csb637 arm arm920t - - at91rm9200 kb9202 arm arm920t - - at91rm9200 m501sk arm arm920t - - at91rm9200 -mp2usb arm arm920t - - at91rm9200 at91rm9200dk arm arm920t - atmel at91rm9200 mx1ads arm arm920t - - imx mx1fs2 arm arm920t - - imx diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 8f98b60..5cdf151 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
Board Arch CPU removed Commit last known maintainer/contact ============================================================================= +mp2usb ARM AT91RM2900 ee986e2 2011-01-25 Eric Bénard eric@eukrea.com barco powerpc MPC8245 - 2010-11-23 Marc Leeman marc.leeman@barco.com ERIC powerpc 405GP d9ba451 2010-11-21 Swen Anderson sand@peppercon.de VoVPN-GW_100MHz powerpc MPC8260 26fe3d2 2010-10-24 Juergen Selent j.selent@elmeg.de
Dear =?UTF-8?q?Eric=20B=C3=A9nard?=,
In message 1303935504-4918-1-git-send-email-eric@eukrea.com you wrote:
- remove from boards.cfg
- add to doc/README.scrapyard
Signed-off-by: Eric Bénard eric@eukrea.com
boards.cfg | 1 - doc/README.scrapyard | 1 + 2 files changed, 1 insertions(+), 1 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
participants (3)
-
Albert ARIBAUD -
Eric Bénard -
Wolfgang Denk