All the clocks which has to be enabled has to be done in enable_basic_clocks(), so moving enable sata clock to common clocks enable function.

Signed-off-by: Mugunthan V N mugunthanvnm@ti.com Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com Reviewed-by: Tom Rini trini@konsulko.com --- arch/arm/mach-omap2/omap5/hw_data.c | 12 ++++++++++++ arch/arm/mach-omap2/sata.c | 23 ----------------------- 2 files changed, 12 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c index 5d956b5..a8a6b8a 100644 --- a/arch/arm/mach-omap2/omap5/hw_data.c +++ b/arch/arm/mach-omap2/omap5/hw_data.c @@ -361,6 +361,9 @@ void enable_basic_clocks(void) (*prcm)->cm_l4per_gpio6_clkctrl, (*prcm)->cm_l4per_gpio7_clkctrl, (*prcm)->cm_l4per_gpio8_clkctrl, +#ifdef CONFIG_SCSI_AHCI_PLAT + (*prcm)->cm_l3init_ocp2scp3_clkctrl, +#endif 0 };

@@ -379,6 +382,9 @@ void enable_basic_clocks(void) #ifdef CONFIG_TI_QSPI (*prcm)->cm_l4per_qspi_clkctrl, #endif +#ifdef CONFIG_SCSI_AHCI_PLAT + (*prcm)->cm_l3init_sata_clkctrl, +#endif 0 };

@@ -411,6 +417,12 @@ void enable_basic_clocks(void) setbits_le32((*prcm)->cm_l4per_qspi_clkctrl, (1<<24)); #endif

+#ifdef CONFIG_SCSI_AHCI_PLAT + /* Enable optional functional clock for SATA */ + setbits_le32((*prcm)->cm_l3init_sata_clkctrl, + SATA_CLKCTRL_OPTFCLKEN_MASK); +#endif + /* Enable SCRM OPT clocks for PER and CORE dpll */ setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl, OPTFCLKEN_SCRM_PER_MASK); diff --git a/arch/arm/mach-omap2/sata.c b/arch/arm/mach-omap2/sata.c index 2c2d1bc..0c82689 100644 --- a/arch/arm/mach-omap2/sata.c +++ b/arch/arm/mach-omap2/sata.c @@ -37,29 +37,6 @@ int init_sata(int dev) int ret; u32 val;

- u32 const clk_domains_sata[] = { - 0 - }; - - u32 const clk_modules_hw_auto_sata[] = { - (*prcm)->cm_l3init_ocp2scp3_clkctrl, - 0 - }; - - u32 const clk_modules_explicit_en_sata[] = { - (*prcm)->cm_l3init_sata_clkctrl, - 0 - }; - - do_enable_clocks(clk_domains_sata, - clk_modules_hw_auto_sata, - clk_modules_explicit_en_sata, - 0); - - /* Enable optional functional clock for SATA */ - setbits_le32((*prcm)->cm_l3init_sata_clkctrl, - SATA_CLKCTRL_OPTFCLKEN_MASK); - sata_phy.power_reg = (void __iomem *)(*ctrl)->control_phy_power_sata;

/* Power up the PHY */

The PHY framework provides a set of APIs to control a PHY. This API is derived from the linux version of the generic PHY framework. Currently the API supports init(), deinit(), power_on, power_off() and reset(). The framework provides a way to get a reference to a phy from the device-tree.

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com --- drivers/Kconfig | 2 ++ drivers/Makefile | 1 + drivers/phy/Kconfig | 32 ++++++++++++++++++++++++ drivers/phy/Makefile | 2 ++ drivers/phy/phy-uclass.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/generic-phy.h | 36 +++++++++++++++++++++++++++ 7 files changed, 138 insertions(+) create mode 100644 drivers/phy/Kconfig create mode 100644 drivers/phy/Makefile create mode 100644 drivers/phy/phy-uclass.c create mode 100644 include/generic-phy.h

diff --git a/drivers/Kconfig b/drivers/Kconfig index 0e5d97d..a90ceca 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -88,6 +88,8 @@ source "drivers/video/Kconfig"

source "drivers/watchdog/Kconfig"

+source "drivers/phy/Kconfig" + config PHYS_TO_BUS bool "Custom physical to bus address mapping" help diff --git a/drivers/Makefile b/drivers/Makefile index 5d8baa5..0be0624 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_$(SPL_)CLK) += clk/ obj-$(CONFIG_$(SPL_)LED) += led/ obj-$(CONFIG_$(SPL_)PINCTRL) += pinctrl/ obj-$(CONFIG_$(SPL_)RAM) += ram/ +obj-$(CONFIG_$(SPL_)GENERIC_PHY) += phy/

ifdef CONFIG_SPL_BUILD

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig new file mode 100644 index 0000000..d66c9e3 --- /dev/null +++ b/drivers/phy/Kconfig @@ -0,0 +1,32 @@ + +menu "PHY Subsystem" + +config GENERIC_PHY + bool "PHY Core" + depends on DM + help + Generic PHY support. + + This framework is designed to provide a generic interface for PHY + devices. PHYs are commonly used for high speed interfaces such as + SATA or PCIe. + The API provides functions to initialize/deinitialize the + phy, power on/off the phy, and reset the phy. It's meant to be as + compatible as possible with the equivalent framework found in the + linux kernel. + +config SPL_GENERIC_PHY + bool "PHY Core in SPL" + depends on DM + help + Generic PHY support in SPL. + + This framework is designed to provide a generic interface for PHY + devices. PHYs are commonly used for high speed interfaces such as + SATA or PCIe. + The API provides functions to initialize/deinitialize the + phy, power on/off the phy, and reset the phy. It's meant to be as + compatible as possible with the equivalent framework found in the + linux kernel. + +endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile new file mode 100644 index 0000000..b29a8b9 --- /dev/null +++ b/drivers/phy/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_$(SPL_)GENERIC_PHY) += phy-uclass.o + diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c new file mode 100644 index 0000000..e15ed43 --- /dev/null +++ b/drivers/phy/phy-uclass.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Written by Jean-Jacques Hiblot jjhiblot@ti.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> + +struct udevice *dm_generic_phy_get(struct udevice *parent, const char *string) +{ + struct udevice *dev; + + int rc = uclass_get_device_by_phandle(UCLASS_PHY, parent, + string, &dev); + if (rc) { + debug("unable to find generic_phy device (err: %d)\n", rc); + return ERR_PTR(rc); + } + + return dev; +} + +int generic_phy_init(struct udevice *dev) +{ + struct generic_phy_ops const *ops = dev->driver->ops; + + return (ops && ops->init) ? ops->init(dev) : 0; +} + +int generic_phy_reset(struct udevice *dev) +{ + struct generic_phy_ops const *ops = dev->driver->ops; + + return (ops && ops->reset) ? ops->reset(dev) : 0; +} + +int generic_phy_exit(struct udevice *dev) +{ + struct generic_phy_ops const *ops = dev->driver->ops; + + return (ops && ops->exit) ? ops->exit(dev) : 0; +} + +int generic_phy_power_on(struct udevice *dev) +{ + struct generic_phy_ops const *ops = dev->driver->ops; + + return (ops && ops->power_on) ? ops->power_on(dev) : 0; +} + +int generic_phy_power_off(struct udevice *dev) +{ + struct generic_phy_ops const *ops = dev->driver->ops; + + return (ops && ops->power_off) ? ops->power_off(dev) : 0; +} + +UCLASS_DRIVER(generic_phy) = { + .id = UCLASS_PHY, + .name = "generic_phy", +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 8c92d0b..9d34a32 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -83,6 +83,7 @@ enum uclass_id { UCLASS_VIDEO, /* Video or LCD device */ UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */ UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */ + UCLASS_PHY, /* generic PHY device */

UCLASS_COUNT, UCLASS_INVALID = -1, diff --git a/include/generic-phy.h b/include/generic-phy.h new file mode 100644 index 0000000..24475f0 --- /dev/null +++ b/include/generic-phy.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Written by Jean-Jacques Hiblot jjhiblot@ti.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __GENERIC_PHY_H +#define __GENERIC_PHY_H + +/* + * struct udevice_ops - set of function pointers for phy operations + * @init: operation to be performed for initializing phy (optionnal) + * @exit: operation to be performed while exiting (optionnal) + * @reset: reset the phy (optionnal). + * @power_on: powering on the phy (optionnal) + * @power_off: powering off the phy (optionnal) + */ +struct generic_phy_ops { + int (*init)(struct udevice *phy); + int (*exit)(struct udevice *phy); + int (*reset)(struct udevice *phy); + int (*power_on)(struct udevice *phy); + int (*power_off)(struct udevice *phy); +}; + + +int generic_phy_init(struct udevice *phy); +int generic_phy_reset(struct udevice *phy); +int generic_phy_exit(struct udevice *phy); +int generic_phy_power_on(struct udevice *phy); +int generic_phy_power_off(struct udevice *phy); + +struct udevice *dm_generic_phy_get(struct udevice *parent, const char *string); + +#endif /*__GENERIC_PHY_H */

Those tests check: - the ability for a phy-user to get a phy device a reference in the device-tree - the ability to perform operations on the phy (init,deinit,on,off) - the behavior of the uclass when optional operations are not implemented

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com --- arch/sandbox/dts/test.dts | 9 +++++ configs/sandbox_defconfig | 2 + configs/sandbox_noblk_defconfig | 2 + configs/sandbox_spl_defconfig | 3 ++ drivers/phy/Kconfig | 9 +++++ drivers/phy/Makefile | 1 + drivers/phy/sandbox-phy.c | 78 ++++++++++++++++++++++++++++++++++++ test/dm/Makefile | 1 + test/dm/generic_phy.c | 89 +++++++++++++++++++++++++++++++++++++++++ 9 files changed, 194 insertions(+) create mode 100644 drivers/phy/sandbox-phy.c create mode 100644 test/dm/generic_phy.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index fff175d..918c899 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -59,6 +59,15 @@ ping-add = <3>; };

+ gen_phy: gen_phy { + compatible = "sandbox,phy"; + }; + + gen_phy_user: gen_phy_user { + compatible = "simple-bus"; + phy = <&gen_phy>; + }; + some-bus { #address-cells = <1>; #size-cells = <0>; diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 7f3f5ac..42116cf 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -164,6 +164,8 @@ CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y CONFIG_VIDEO_SANDBOX_SDL=y +CONFIG_GENERIC_PHY=y +CONFIG_PHY_SANDBOX=y CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig index 3f8e70d..7a5cd4b 100644 --- a/configs/sandbox_noblk_defconfig +++ b/configs/sandbox_noblk_defconfig @@ -166,6 +166,8 @@ CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y CONFIG_VIDEO_SANDBOX_SDL=y +CONFIG_GENERIC_PHY=y +CONFIG_PHY_SANDBOX=y CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index ade6714..9b4cf39 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -170,6 +170,9 @@ CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y CONFIG_VIDEO_SANDBOX_SDL=y +CONFIG_GENERIC_PHY=y +CONFIG_SPL_GENERIC_PHY=y +CONFIG_PHY_SANDBOX=y CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index d66c9e3..032b932 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -29,4 +29,13 @@ config SPL_GENERIC_PHY compatible as possible with the equivalent framework found in the linux kernel.

+config PHY_SANDBOX + bool "Sandbox PHY support" + depends on SANDBOX + depends on GENERIC_PHY + help + This select a dummy sandbox PHY driver. It used only to implement + unit tests for the generic phy framework + + endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index b29a8b9..0125844 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_$(SPL_)GENERIC_PHY) += phy-uclass.o +obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o

diff --git a/drivers/phy/sandbox-phy.c b/drivers/phy/sandbox-phy.c new file mode 100644 index 0000000..1c60308 --- /dev/null +++ b/drivers/phy/sandbox-phy.c @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Written by Jean-Jacques Hiblot jjhiblot@ti.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> + +struct sandbox_phy_priv { + int initialized; + int on; +}; + +static int sandbox_phy_power_on(struct udevice *dev) +{ + struct sandbox_phy_priv *priv = dev_get_priv(dev); + if (!priv->initialized) + return -EIO; + priv->on = 1; + return 0; +} + +static int sandbox_phy_power_off(struct udevice *dev) +{ + struct sandbox_phy_priv *priv = dev_get_priv(dev); + if (!priv->initialized) + return -EIO; + priv->on = 0; + return 0; +} + +static int sandbox_phy_init(struct udevice *dev) +{ + struct sandbox_phy_priv *priv = dev_get_priv(dev); + priv->initialized = 1; + priv->on = 0; + return 0; +} + +static int sandbox_phy_exit(struct udevice *dev) +{ + struct sandbox_phy_priv *priv = dev_get_priv(dev); + priv->initialized = 0; + priv->on = 0; + return 0; +} + +static int sandbox_phy_probe(struct udevice *dev) +{ + struct sandbox_phy_priv *priv = dev_get_priv(dev); + priv->initialized = 0; + priv->on = 0; + return 0; +} + +static struct generic_phy_ops sandbox_phy_ops = { + .power_on = sandbox_phy_power_on, + .power_off = sandbox_phy_power_off, + .init = sandbox_phy_init, + .exit = sandbox_phy_exit, +}; + +static const struct udevice_id sandbox_phy_ids[] = { + { .compatible = "sandbox,phy" }, + { } +}; + +U_BOOT_DRIVER(phy_sandbox) = { + .name = "phy_sandbox", + .id = UCLASS_PHY, + .of_match = sandbox_phy_ids, + .ops = &sandbox_phy_ops, + .probe = sandbox_phy_probe, + .priv_auto_alloc_size = sizeof(struct sandbox_phy_priv), +}; diff --git a/test/dm/Makefile b/test/dm/Makefile index 1885e17..e2b7d43 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -41,4 +41,5 @@ obj-$(CONFIG_TIMER) += timer.o obj-$(CONFIG_DM_VIDEO) += video.o obj-$(CONFIG_ADC) += adc.o obj-$(CONFIG_SPMI) += spmi.o +obj-$(CONFIG_GENERIC_PHY) += generic_phy.o endif diff --git a/test/dm/generic_phy.c b/test/dm/generic_phy.c new file mode 100644 index 0000000..08b862a --- /dev/null +++ b/test/dm/generic_phy.c @@ -0,0 +1,89 @@ +/* + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Written by Jean-Jacques Hiblot jjhiblot@ti.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <dm/test.h> +#include <test/ut.h> +#include <generic-phy.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Base test of the phy uclass */ +static int dm_test_phy_base(struct unit_test_state *uts) +{ + struct udevice *dev_method1; + struct udevice *dev_method2; + struct udevice *parent; + + + /* Get the device using the phy device*/ + ut_assertok(uclass_get_device_by_name(UCLASS_SIMPLE_BUS, + "gen_phy_user", &parent)); + /* Get the phy device with std uclass function */ + ut_assertok(uclass_get_device_by_name(UCLASS_PHY, "gen_phy", + &dev_method1)); + + /* + * Get the phy device from user device and compare with the one + * obtained with the previous method. + */ + dev_method2 = dm_generic_phy_get(parent, "phy"); + ut_assertnonnull(dev_method2); + ut_assertok_ptr(dev_method2); + ut_asserteq_ptr(dev_method1, dev_method2); + + /* Try to get a non-existing phy */ + ut_asserteq(-ENODEV, uclass_get_device(UCLASS_PHY, 1, &dev_method2)); + dev_method2 = dm_generic_phy_get(parent, "phy_not_existing"); + ut_assert(IS_ERR_OR_NULL(dev_method2)); + + return 0; +} +DM_TEST(dm_test_phy_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test of the phy uclass using the sandbox phy driver operations */ +static int dm_test_phy_ops(struct unit_test_state *uts) +{ + struct udevice *dev; + struct udevice *parent; + + ut_assertok(uclass_get_device_by_name(UCLASS_SIMPLE_BUS, + "gen_phy_user", &parent)); + dev = dm_generic_phy_get(parent, "phy"); + ut_assertnonnull(dev); + ut_assertok_ptr(dev); + + /* test normal operations */ + ut_assertok(generic_phy_init(dev)); + ut_assertok(generic_phy_power_on(dev)); + ut_assertok(generic_phy_power_off(dev)); + + /* + * test operations after exit(). + * The sandbox phy driver does not allow it. + */ + ut_assertok(generic_phy_exit(dev)); + ut_assert(generic_phy_power_on(dev) != 0); + ut_assert(generic_phy_power_off(dev) != 0); + + /* + * test normal operations again (after re-init) + */ + ut_assertok(generic_phy_init(dev)); + ut_assertok(generic_phy_power_on(dev)); + ut_assertok(generic_phy_power_off(dev)); + + /* + * test calling unimplemented feature. + * The call is expected to succeed + */ + ut_assertok(generic_phy_reset(dev)); + + return 0; +} +DM_TEST(dm_test_phy_ops, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

This phy is found on omap platforms with sata capabilities. Except for the part related to the DM and the PHY framework, the code is basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Simon Glass sjg@chromium.org --- drivers/phy/Kconfig | 18 +++ drivers/phy/Makefile | 1 + drivers/phy/ti-pipe3-phy.c | 365 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 384 insertions(+) create mode 100644 drivers/phy/ti-pipe3-phy.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 032b932..b9a8093 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -38,4 +38,22 @@ config PHY_SANDBOX unit tests for the generic phy framework

+config PIPE3_PHY + bool "Support omap's PIPE3 PHY" + depends on GENERIC_PHY && ARCH_OMAP2 + help + Support for the omap PIPE3 phy for sata + + This PHY is found on omap devices supporting SATA such as dra7, am57x + and omap5 + +config SPL_PIPE3_PHY + bool "Support omap's PIPE3 PHY in SPL" + depends on SPL_GENERIC_PHY && ARCH_OMAP2 + help + Support for the omap PIPE3 phy for sata in SPL + + This PHY is found on omap devices supporting SATA such as dra7, am57x + and omap5 + endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 0125844..701f7c8 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_$(SPL_)GENERIC_PHY) += phy-uclass.o obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o +obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o

diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c new file mode 100644 index 0000000..3964823 --- /dev/null +++ b/drivers/phy/ti-pipe3-phy.c @@ -0,0 +1,365 @@ +/* + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Written by Jean-Jacques Hiblot jjhiblot@ti.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <dm/device.h> +#include <generic-phy.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <syscon.h> +#include <regmap.h> + +/* PLLCTRL Registers */ +#define PLL_STATUS 0x00000004 +#define PLL_GO 0x00000008 +#define PLL_CONFIGURATION1 0x0000000C +#define PLL_CONFIGURATION2 0x00000010 +#define PLL_CONFIGURATION3 0x00000014 +#define PLL_CONFIGURATION4 0x00000020 + +#define PLL_REGM_MASK 0x001FFE00 +#define PLL_REGM_SHIFT 9 +#define PLL_REGM_F_MASK 0x0003FFFF +#define PLL_REGM_F_SHIFT 0 +#define PLL_REGN_MASK 0x000001FE +#define PLL_REGN_SHIFT 1 +#define PLL_SELFREQDCO_MASK 0x0000000E +#define PLL_SELFREQDCO_SHIFT 1 +#define PLL_SD_MASK 0x0003FC00 +#define PLL_SD_SHIFT 10 +#define SET_PLL_GO 0x1 +#define PLL_TICOPWDN BIT(16) +#define PLL_LDOPWDN BIT(15) +#define PLL_LOCK 0x2 +#define PLL_IDLE 0x1 + +/* Software rest for the SATA PLL (in CTRL_CORE_SMA_SW_0 register)*/ +#define SATA_PLL_SOFT_RESET (1<<18) + +/* PHY POWER CONTROL Register */ +#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK 0x003FC000 +#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 0xE + +#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC00000 +#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT 0x16 + +#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON 0x3 +#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF 0x0 + + +#define PLL_IDLE_TIME 100 /* in milliseconds */ +#define PLL_LOCK_TIME 100 /* in milliseconds */ + +struct omap_pipe3 { + void __iomem *pll_ctrl_base; + void __iomem *power_reg; + void __iomem *pll_reset_reg; + struct pipe3_dpll_map *dpll_map; +}; + + +struct pipe3_dpll_params { + u16 m; + u8 n; + u8 freq:3; + u8 sd; + u32 mf; +}; + +struct pipe3_dpll_map { + unsigned long rate; + struct pipe3_dpll_params params; +}; + +static inline u32 omap_pipe3_readl(void __iomem *addr, unsigned offset) +{ + return readl(addr + offset); +} + +static inline void omap_pipe3_writel(void __iomem *addr, unsigned offset, + u32 data) +{ + writel(data, addr + offset); +} + +static struct pipe3_dpll_params *omap_pipe3_get_dpll_params(struct omap_pipe3 + *pipe3) +{ + u32 rate; + struct pipe3_dpll_map *dpll_map = pipe3->dpll_map; + + rate = get_sys_clk_freq(); + + for (; dpll_map->rate; dpll_map++) { + if (rate == dpll_map->rate) + return &dpll_map->params; + } + + printf("%s: No DPLL configuration for %u Hz SYS CLK\n", + __func__, rate); + return NULL; +} + +static int omap_pipe3_wait_lock(struct omap_pipe3 *pipe3) +{ + u32 val; + int timeout = PLL_LOCK_TIME; + + do { + mdelay(1); + val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_STATUS); + if (val & PLL_LOCK) + break; + } while (--timeout); + + if (!(val & PLL_LOCK)) { + printf("%s: DPLL failed to lock\n", __func__); + return -EBUSY; + } + + return 0; +} + +static int omap_pipe3_dpll_program(struct omap_pipe3 *pipe3) +{ + u32 val; + struct pipe3_dpll_params *dpll_params; + + dpll_params = omap_pipe3_get_dpll_params(pipe3); + if (!dpll_params) { + printf("%s: Invalid DPLL parameters\n", __func__); + return -EINVAL; + } + + val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_CONFIGURATION1); + val &= ~PLL_REGN_MASK; + val |= dpll_params->n << PLL_REGN_SHIFT; + omap_pipe3_writel(pipe3->pll_ctrl_base, PLL_CONFIGURATION1, val); + + val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_CONFIGURATION2); + val &= ~PLL_SELFREQDCO_MASK; + val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT; + omap_pipe3_writel(pipe3->pll_ctrl_base, PLL_CONFIGURATION2, val); + + val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_CONFIGURATION1); + val &= ~PLL_REGM_MASK; + val |= dpll_params->m << PLL_REGM_SHIFT; + omap_pipe3_writel(pipe3->pll_ctrl_base, PLL_CONFIGURATION1, val); + + val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_CONFIGURATION4); + val &= ~PLL_REGM_F_MASK; + val |= dpll_params->mf << PLL_REGM_F_SHIFT; + omap_pipe3_writel(pipe3->pll_ctrl_base, PLL_CONFIGURATION4, val); + + val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_CONFIGURATION3); + val &= ~PLL_SD_MASK; + val |= dpll_params->sd << PLL_SD_SHIFT; + omap_pipe3_writel(pipe3->pll_ctrl_base, PLL_CONFIGURATION3, val); + + omap_pipe3_writel(pipe3->pll_ctrl_base, PLL_GO, SET_PLL_GO); + + return omap_pipe3_wait_lock(pipe3); +} + +static void omap_control_pipe3_power(struct omap_pipe3 *pipe3, int on) +{ + u32 val, rate; + + val = readl(pipe3->power_reg); + + rate = get_sys_clk_freq(); + rate = rate/1000000; + + if (on) { + val &= ~(OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK | + OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK); + val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON << + OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT; + val |= rate << + OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT; + } else { + val &= ~OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK; + val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF << + OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT; + } + + writel(val, pipe3->power_reg); +} + +static int pipe3_power_on(struct udevice *dev) +{ + int ret; + u32 val; + struct omap_pipe3 *pipe3 = dev_get_priv(dev); + + /* Program the DPLL only if not locked */ + val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_STATUS); + if (!(val & PLL_LOCK)) { + ret = omap_pipe3_dpll_program(pipe3); + if (ret) + return ret; + } else { + /* else just bring it out of IDLE mode */ + val = omap_pipe3_readl(pipe3->pll_ctrl_base, + PLL_CONFIGURATION2); + if (val & PLL_IDLE) { + val &= ~PLL_IDLE; + omap_pipe3_writel(pipe3->pll_ctrl_base, + PLL_CONFIGURATION2, val); + ret = omap_pipe3_wait_lock(pipe3); + if (ret) + return ret; + } + } + + /* Power up the PHY */ + omap_control_pipe3_power(pipe3, 1); + + return 0; +} + +static int pipe3_power_off(struct udevice *dev) +{ + u32 val; + int timeout = PLL_IDLE_TIME; + struct omap_pipe3 *pipe3 = dev_get_priv(dev); + + /* Power down the PHY */ + omap_control_pipe3_power(pipe3, 0); + + /* Put DPLL in IDLE mode */ + val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_CONFIGURATION2); + val |= PLL_IDLE; + omap_pipe3_writel(pipe3->pll_ctrl_base, PLL_CONFIGURATION2, val); + + /* wait for LDO and Oscillator to power down */ + do { + mdelay(1); + val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_STATUS); + if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN)) + break; + } while (--timeout); + + if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) { + printf("%s: Failed to power down DPLL: PLL_STATUS 0x%x\n", + __func__, val); + return -EBUSY; + } + + return 0; +} + +static int pipe3_reset(struct udevice *dev) +{ + u32 val; + struct omap_pipe3 *pipe3 = dev_get_priv(dev); + + val = readl(pipe3->pll_reset_reg); + writel(val | SATA_PLL_SOFT_RESET, pipe3->pll_reset_reg); + mdelay(1); + writel(val & ~SATA_PLL_SOFT_RESET, pipe3->pll_reset_reg); + return 0; +} + +static void *get_reg(struct udevice *dev, const char *name) +{ + struct udevice *syscon; + struct regmap *regmap; + const fdt32_t *cell; + int len, err; + void *base; + + err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, + name, &syscon); + if (err) { + error("unable to find syscon device for %s (%d)\n", + name, err); + return NULL; + } + + regmap = syscon_get_regmap(syscon); + if (IS_ERR(regmap)) { + error("unable to find regmap for %s (%ld)\n", + name, PTR_ERR(regmap)); + return NULL; + } + + cell = fdt_getprop(gd->fdt_blob, dev->of_offset, name, + &len); + if (len < 2*sizeof(fdt32_t)) { + error("offset not available for %s\n", name); + return NULL; + } + + base = regmap_get_range(regmap, 0); + if (!base) + return NULL; + + return fdtdec_get_number(cell + 1, 1) + base; +} + +static int pipe3_phy_probe(struct udevice *dev) +{ + fdt_addr_t addr; + fdt_size_t sz; + struct omap_pipe3 *pipe3 = dev_get_priv(dev); + + addr = dev_get_addr_size_index(dev, 2, &sz); + if (addr == FDT_ADDR_T_NONE) { + error("missing pll ctrl address\n"); + return -EINVAL; + } + + pipe3->pll_ctrl_base = map_physmem(addr, sz, MAP_NOCACHE); + if (!pipe3->pll_ctrl_base) { + error("unable to remap pll ctrl\n"); + return -EINVAL; + } + + pipe3->power_reg = get_reg(dev, "syscon-phy-power"); + if (!pipe3->power_reg) + return -EINVAL; + + pipe3->pll_reset_reg = get_reg(dev, "syscon-pllreset"); + if (!pipe3->pll_reset_reg) + return -EINVAL; + + pipe3->dpll_map = (struct pipe3_dpll_map *)dev_get_driver_data(dev); + + return 0; +} + +static struct pipe3_dpll_map dpll_map_sata[] = { + {12000000, {1000, 7, 4, 6, 0} }, /* 12 MHz */ + {16800000, {714, 7, 4, 6, 0} }, /* 16.8 MHz */ + {19200000, {625, 7, 4, 6, 0} }, /* 19.2 MHz */ + {20000000, {600, 7, 4, 6, 0} }, /* 20 MHz */ + {26000000, {461, 7, 4, 6, 0} }, /* 26 MHz */ + {38400000, {312, 7, 4, 6, 0} }, /* 38.4 MHz */ + { }, /* Terminator */ +}; + +static const struct udevice_id pipe3_phy_ids[] = { + { .compatible = "ti,phy-pipe3-sata", .data = (ulong)&dpll_map_sata }, + { } +}; + +static struct generic_phy_ops pipe3_phy_ops = { + .power_on = pipe3_power_on, + .power_off = pipe3_power_off, + .reset = pipe3_reset +}; + +U_BOOT_DRIVER(pipe3_phy) = { + .name = "pipe3_phy", + .id = UCLASS_PHY, + .of_match = pipe3_phy_ids, + .ops = &pipe3_phy_ops, + .probe = pipe3_phy_probe, + .priv_auto_alloc_size = sizeof(struct omap_pipe3), +};

This is a cosmetic change. target and LUN have kind of the same role in this function. One of them was passed as a parameter and the other was embedded in a structure. For consistency, pass both of them as parameters.

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Simon Glass sjg@chromium.org --- common/scsi.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/common/scsi.c b/common/scsi.c index fb5b407..d55ba89 100644 --- a/common/scsi.c +++ b/common/scsi.c @@ -473,14 +473,15 @@ static void scsi_init_dev_desc(struct blk_desc *dev_desc, int devnum) * scsi_detect_dev - Detect scsi device * * @target: target id + * @lun: target lun * @dev_desc: block device description * * The scsi_detect_dev detects and fills a dev_desc structure when the device is - * detected. The LUN number is taken from the struct blk_desc *dev_desc. + * detected. * * Return: 0 on success, error value otherwise */ -static int scsi_detect_dev(int target, struct blk_desc *dev_desc) +static int scsi_detect_dev(int target, int lun, struct blk_desc *dev_desc) { unsigned char perq, modi; lbaint_t capacity; @@ -488,7 +489,7 @@ static int scsi_detect_dev(int target, struct blk_desc *dev_desc) ccb *pccb = (ccb *)&tempccb;

pccb->target = target; - pccb->lun = dev_desc->lun; + pccb->lun = lun; pccb->pdata = (unsigned char *)&tempbuff; pccb->datalen = 512; scsi_setup_inquiry(pccb); @@ -599,8 +600,7 @@ int scsi_scan(int mode) bdesc = dev_get_uclass_platdata(bdev);

scsi_init_dev_desc_priv(bdesc); - bdesc->lun = lun; - ret = scsi_detect_dev(i, bdesc); + ret = scsi_detect_dev(i, lun, bdesc); if (ret) { device_unbind(bdev); continue; @@ -630,8 +630,8 @@ int scsi_scan(int mode) scsi_max_devs = 0; for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) { for (lun = 0; lun < CONFIG_SYS_SCSI_MAX_LUN; lun++) { - scsi_dev_desc[scsi_max_devs].lun = lun; - ret = scsi_detect_dev(i, &scsi_dev_desc[scsi_max_devs]); + ret = scsi_detect_dev(i, lun, + &scsi_dev_desc[scsi_max_devs]); if (ret) continue;

With DM_SCSI enabled, blk_create_devicef() is called with blkz = 0, leading to a divide-by-0 exception. scsi_detect_dev() can be used to get the required parameters (block size and number of blocks) from the drive before calling blk_create_devicef().

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Simon Glass sjg@chromium.org --- common/scsi.c | 85 ++++++++++++++++++++++++++++++++++------------------------- 1 file changed, 49 insertions(+), 36 deletions(-)

diff --git a/common/scsi.c b/common/scsi.c index 972ef338..c456f5a 100644 --- a/common/scsi.c +++ b/common/scsi.c @@ -549,6 +549,52 @@ removable: * to the user if mode = 1 */ #if defined(CONFIG_DM_SCSI) +static int do_scsi_scan_one(struct udevice *dev, int id, int lun, int mode) +{ + int ret; + struct udevice *bdev; + struct blk_desc bd; + struct blk_desc *bdesc; + char str[10]; + + /* + * detect the scsi driver to get information about its geometry (block + * size, number of blocks) and other parameters (ids, type, ...) + */ + scsi_init_dev_desc_priv(&bd); + if (scsi_detect_dev(id, lun, &bd)) + return -ENODEV; + + /* + * Create only one block device and do detection + * to make sure that there won't be a lot of + * block devices created + */ + snprintf(str, sizeof(str), "id%dlun%d", id, lun); + ret = blk_create_devicef(dev, "scsi_blk", str, IF_TYPE_SCSI, -1, + bd.blksz, bd.blksz * bd.lba, &bdev); + if (ret) { + debug("Can't create device\n"); + return ret; + } + + bdesc = dev_get_uclass_platdata(bdev); + bdesc->target = id; + bdesc->lun = lun; + bdesc->removable = bd.removable; + bdesc->type = bd.type; + memcpy(&bdesc->vendor, &bd.vendor, sizeof(bd.vendor)); + memcpy(&bdesc->product, &bd.product, sizeof(bd.product)); + memcpy(&bdesc->revision, &bd.revision, sizeof(bd.revision)); + part_init(bdesc); + + if (mode == 1) { + printf(" Device %d: ", 0); + dev_print(bdesc); + } + return 0; +} + int scsi_scan(int mode) { unsigned char i, lun; @@ -576,42 +622,9 @@ int scsi_scan(int mode) /* Get controller platdata */ plat = dev_get_platdata(dev);

- for (i = 0; i < plat->max_id; i++) { - for (lun = 0; lun < plat->max_lun; lun++) { - struct udevice *bdev; /* block device */ - /* block device description */ - struct blk_desc *bdesc; - char str[10]; - - /* - * Create only one block device and do detection - * to make sure that there won't be a lot of - * block devices created - */ - snprintf(str, sizeof(str), "id%dlun%d", i, lun); - ret = blk_create_devicef(dev, "scsi_blk", - str, IF_TYPE_SCSI, - -1, 0, 0, &bdev); - if (ret) { - debug("Can't create device\n"); - return ret; - } - bdesc = dev_get_uclass_platdata(bdev); - - scsi_init_dev_desc_priv(bdesc); - ret = scsi_detect_dev(i, lun, bdesc); - if (ret) { - device_unbind(bdev); - continue; - } - part_init(bdesc); - - if (mode == 1) { - printf(" Device %d: ", 0); - dev_print(bdesc); - } /* if mode */ - } /* next LUN */ - } + for (i = 0; i < plat->max_id; i++) + for (lun = 0; lun < plat->max_lun; lun++) + do_scsi_scan_one(dev, i, lun, mode); }

return 0;