[U-Boot] [PATCH 00/7] ARMV7: OMAP3: Board updates for Beagle and Overo
This series does a bit of OMAP housekeeping as well as adding board revision detection for Beagle and Overo.
The first patch moves syslib.c from omap3 to omap-common where it can be shared by both OMAP3 and OMAP4 boards.
The second patch creates a convenience function to set the voltage regulators in the TWL4030 companion chip. It also modifies existing code to use the new function.
The third patch enables the input drivers on the Overo's MMC_CLK pins for channels 1 and 3 (channel 2 was already enabled, missing the other 2 was an oversight)
The fourth patch adds an environment variable to allow one to easily set the processor clock rate via a linux boot arg.
The fifth patch adds a board revision detection function for Overo.
The sixth patch adds enhanced revision detection for Beagle and support for the C4 revision (it uses features introduced by patches 2 and 4)
The seventh patch initializes the OMAP GPMC and interrupt GPIO for the second ethernet chip on Overo boards.
These patches were tested on Beagle and Overo as well as the OMAP4 Panda to make sure there were no regressions on OMAP4 boards.
I also did a MAKEALL ARMV7 to verify that there were no build errors on any ARMV7 boards.
Steve Sakoman (7): ARMV7: OMAP: Move syslib.c to omap-common since it can be shared by OMAP3 and OMAP4 ARMV7: OMAP: add convenience function to set TWL4030 regulator voltages ARMV7: OMAP: Enable input driver on Overo's MMC1_CLK and MMC3_CLK pinmux setup ARMV7: OMAP: Add mpurate boot arg for Overo and Beagle ARMV7: OMAP: Add board revision detection for Overo ARMV7: OMAP: Add detection and support for Beagle C4 revision ARMV7: OMAP: Configure Overo's second network chip
The functions in syslib.c can be shared, so this patch moves it from cpu/omap3 to cpu/omap-common
Signed-off-by: Steve Sakoman steve@sakoman.com --- arch/arm/cpu/armv7/omap-common/Makefile | 2 ++ arch/arm/cpu/armv7/{omap3 => omap-common}/syslib.c | 2 -- arch/arm/cpu/armv7/omap3/Makefile | 1 - arch/arm/include/asm/arch-omap4/sys_proto.h | 3 +++ 4 files changed, 5 insertions(+), 3 deletions(-) rename arch/arm/cpu/armv7/{omap3 => omap-common}/syslib.c (97%)
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile index 3a4a304..caee726 100644 --- a/arch/arm/cpu/armv7/omap-common/Makefile +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -26,7 +26,9 @@ include $(TOPDIR)/config.mk LIB = $(obj)libomap-common.a
SOBJS := reset.o + COBJS := timer.o +COBJS += syslib.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/arch/arm/cpu/armv7/omap3/syslib.c b/arch/arm/cpu/armv7/omap-common/syslib.c similarity index 97% rename from arch/arm/cpu/armv7/omap3/syslib.c rename to arch/arm/cpu/armv7/omap-common/syslib.c index 9ced495..f9ed9a3 100644 --- a/arch/arm/cpu/armv7/omap3/syslib.c +++ b/arch/arm/cpu/armv7/omap-common/syslib.c @@ -23,8 +23,6 @@
#include <common.h> #include <asm/io.h> -#include <asm/arch/mem.h> -#include <asm/arch/clocks.h> #include <asm/arch/sys_proto.h>
/************************************************************ diff --git a/arch/arm/cpu/armv7/omap3/Makefile b/arch/arm/cpu/armv7/omap3/Makefile index 79ae267..95526d6 100644 --- a/arch/arm/cpu/armv7/omap3/Makefile +++ b/arch/arm/cpu/armv7/omap3/Makefile @@ -32,7 +32,6 @@ COBJS += board.o COBJS += clock.o COBJS += gpio.o COBJS += mem.o -COBJS += syslib.o COBJS += sys_info.o
COBJS-$(CONFIG_EMIF4) += emif4.o diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h index ad0c640..4813e9e 100644 --- a/arch/arm/include/asm/arch-omap4/sys_proto.h +++ b/arch/arm/include/asm/arch-omap4/sys_proto.h @@ -33,6 +33,9 @@ void watchdog_init(void); u32 get_device_type(void); void invalidate_dcache(u32); void set_muxconf_regs(void); +void sr32(void *, u32, u32, u32); +u32 wait_on_value(u32, u32, void *, u32); +void sdelay(unsigned long);
extern const struct omap_sysinfo sysinfo;
This patch adds a function to allow one to easily set the target voltage for the TWL4030 regulators. It also modifies the existing code to use this new function. Applicable definitions are moved out of the driver file and into the header file so that they are generally accessible
Signed-off-by: Steve Sakoman steve@sakoman.com --- drivers/power/twl4030.c | 69 ++++++++++++++++++++-------------------------- include/twl4030.h | 14 +++++++++ 2 files changed, 44 insertions(+), 39 deletions(-)
diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c index eb066cb..1a54089 100644 --- a/drivers/power/twl4030.c +++ b/drivers/power/twl4030.c @@ -59,57 +59,48 @@ void twl4030_power_reset_init(void) } }
- /* - * Power Init + * Set Device Group and Voltage */ -#define DEV_GRP_P1 0x20 -#define VAUX3_VSEL_28 0x03 -#define DEV_GRP_ALL 0xE0 -#define VPLL2_VSEL_18 0x05 -#define VDAC_VSEL_18 0x03 +void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val, + u8 dev_grp, u8 dev_grp_sel) +{ + /* Select the Device Group */ + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp_sel, + dev_grp); + + /* Select the Voltage */ + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_val, + vsel_reg); +}
void twl4030_power_init(void) { - unsigned char byte; - /* set VAUX3 to 2.8V */ - byte = DEV_GRP_P1; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VAUX3_DEV_GRP); - byte = VAUX3_VSEL_28; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VAUX3_DEDICATED); + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED, + TWL4030_PM_RECEIVER_VAUX3_VSEL_28, + TWL4030_PM_RECEIVER_VAUX3_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_P1);
/* set VPLL2 to 1.8V */ - byte = DEV_GRP_ALL; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VPLL2_DEV_GRP); - byte = VPLL2_VSEL_18; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VPLL2_DEDICATED); + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED, + TWL4030_PM_RECEIVER_VPLL2_VSEL_18, + TWL4030_PM_RECEIVER_VPLL2_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_ALL);
/* set VDAC to 1.8V */ - byte = DEV_GRP_P1; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VDAC_DEV_GRP); - byte = VDAC_VSEL_18; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VDAC_DEDICATED); + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED, + TWL4030_PM_RECEIVER_VDAC_VSEL_18, + TWL4030_PM_RECEIVER_VDAC_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_P1); }
-#define VMMC1_VSEL_30 0x02 - void twl4030_power_mmc_init(void) { - unsigned char byte; - - byte = DEV_GRP_P1; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VMMC1_DEV_GRP); - - /* 3 Volts */ - byte = VMMC1_VSEL_30; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VMMC1_DEDICATED); + /* Set VMMC1 to 3 Volts */ + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED, + TWL4030_PM_RECEIVER_VMMC1_VSEL_30, + TWL4030_PM_RECEIVER_VMMC1_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_P1); } + diff --git a/include/twl4030.h b/include/twl4030.h index 2b2f5ae..930c285 100644 --- a/include/twl4030.h +++ b/include/twl4030.h @@ -304,6 +304,17 @@ #define TWL4030_PM_RECEIVER_MAINREF_TYPE 0xF0 #define TWL4030_PM_RECEIVER_MAINREF_REMAP 0xF1
+/* Voltage Selection in PM Receiver Module */ +#define TWL4030_PM_RECEIVER_VAUX2_VSEL_18 0x05 +#define TWL4030_PM_RECEIVER_VAUX3_VSEL_28 0x03 +#define TWL4030_PM_RECEIVER_VPLL2_VSEL_18 0x05 +#define TWL4030_PM_RECEIVER_VDAC_VSEL_18 0x03 +#define TWL4030_PM_RECEIVER_VMMC1_VSEL_30 0x02 + +/* Device Selection in PM Receiver Module */ +#define TWL4030_PM_RECEIVER_DEV_GRP_P1 0x20 +#define TWL4030_PM_RECEIVER_DEV_GRP_ALL 0xE0 + /* LED */ #define TWL4030_LED_LEDEN 0xEE #define TWL4030_LED_LEDEN_LEDAON (1 << 0) @@ -500,6 +511,9 @@ static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg)
/* For hardware resetting */ void twl4030_power_reset_init(void); +/* For setting device group and voltage */ +void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val, + u8 dev_grp, u8 dev_grp_sel); /* For initializing power device */ void twl4030_power_init(void); /* For initializing mmc power */
This patch modifies the pinmux setup for MMC1_CLK and MMC3_CLK to enable the input driver. MMC2_CLK was already properly configured.
Signed-off-by: Steve Sakoman steve@sakoman.com --- board/overo/overo.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/overo/overo.h b/board/overo/overo.h index 1873523..fff43da 100644 --- a/board/overo/overo.h +++ b/board/overo/overo.h @@ -200,7 +200,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\ MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ /*Expansion card */\ - MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\ + MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) /*MMC1_CLK*/\ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ @@ -301,7 +301,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1*/\ MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\ - MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M2)) /*MMC3_CLK*/\ + MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTU | EN | M2)) /*MMC3_CLK*/\ MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\ MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M4)) /*GPIO_14*/\ MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | EN | M4)) /*GPIO_15 - X_GATE*/\
Allows one to set the processor clock rate via "setenv mpurate 720" for example
Default is set to a "safe" 500 Mhz.
Signed-off-by: Steve Sakoman steve@sakoman.com --- include/configs/omap3_beagle.h | 3 +++ include/configs/omap3_overo.h | 3 +++ 2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index ae5a791..e7cd93b 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -183,6 +183,7 @@ "loadaddr=0x82000000\0" \ "usbtty=cdc_acm\0" \ "console=ttyS2,115200n8\0" \ + "mpurate=500\0" \ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ @@ -191,6 +192,7 @@ "nandroot=/dev/mtdblock4 rw\0" \ "nandrootfstype=jffs2\0" \ "mmcargs=setenv bootargs console=${console} " \ + "mpurate=${mpurate} " \ "vram=${vram} " \ "omapfb.mode=dvi:${dvimode} " \ "omapfb.debug=y " \ @@ -198,6 +200,7 @@ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ "nandargs=setenv bootargs console=${console} " \ + "mpurate=${mpurate} " \ "vram=${vram} " \ "omapfb.mode=dvi:${dvimode} " \ "omapfb.debug=y " \ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 3a3b389..ca90786 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -153,6 +153,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ + "mpurate=500\0" \ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ @@ -161,6 +162,7 @@ "nandroot=/dev/mtdblock4 rw\0" \ "nandrootfstype=jffs2\0" \ "mmcargs=setenv bootargs console=${console} " \ + "mpurate=${mpurate} " \ "vram=${vram} " \ "omapfb.mode=dvi:${dvimode} " \ "omapfb.debug=y " \ @@ -168,6 +170,7 @@ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ "nandargs=setenv bootargs console=${console} " \ + "mpurate=${mpurate} " \ "vram=${vram} " \ "omapfb.mode=dvi:${dvimode} " \ "omapfb.debug=y " \
The latest Overo COM modules encode their revision number on GPIOs 115, 113, and 112. All boards to date have no pullups on these pins and hence appear as revision 0.
This patch reads and prints the revision information.
Signed-off-by: Steve Sakoman steve@sakoman.com --- board/overo/overo.c | 32 ++++++++++++++++++++++++++++++++ board/overo/overo.h | 6 +++--- 2 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/board/overo/overo.c b/board/overo/overo.c index e85be7d..1c7087b 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -61,6 +61,37 @@ int board_init(void) }
/* + * Routine: get_board_revision + * Description: Returns the board revision + */ +int get_board_revision(void) +{ + int revision; + + if (!omap_request_gpio(112) && + !omap_request_gpio(113) && + !omap_request_gpio(115)) { + + omap_set_gpio_direction(112, 1); + omap_set_gpio_direction(113, 1); + omap_set_gpio_direction(115, 1); + + revision = omap_get_gpio_datain(115) << 2 | + omap_get_gpio_datain(113) << 1 | + omap_get_gpio_datain(112); + + omap_free_gpio(112); + omap_free_gpio(113); + omap_free_gpio(115); + } else { + printf("Error: unable to acquire board revision GPIOs\n"); + revision = -1; + } + + return revision; +} + +/* * Routine: misc_init_r * Description: Configure board specific parts */ @@ -73,6 +104,7 @@ int misc_init_r(void) setup_net_chip(); #endif
+ printf("Board revision: %d\n", get_board_revision()); dieid_num_r();
return 0; diff --git a/board/overo/overo.h b/board/overo/overo.h index fff43da..a4e49b9 100644 --- a/board/overo/overo.h +++ b/board/overo/overo.h @@ -189,11 +189,11 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\ MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M0)) /*CAM_WEN*/\ MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\ - MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\ - MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\ + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | EN | M4)) /*GPIO_112*/\ + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | EN | M4)) /*GPIO_113*/\ MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M4)) /*GPIO_114*/\ /* - PEN_DOWN*/\ - MUX_VAL(CP(CSI2_DY1), (IEN | PTU | EN | M4)) /*GPIO_115*/\ + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | EN | M4)) /*GPIO_115*/\ /*Audio Interface */\ MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\ MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\
This patch enhances the revision detection function and adds support for the C4 revision. The board revision is printed and approriate revision specific setup is done automatically.
Signed-off-by: Steve Sakoman steve@sakoman.com --- board/ti/beagle/beagle.c | 90 +++++++++++++++++++++++++++------------------- board/ti/beagle/beagle.h | 7 +++- 2 files changed, 58 insertions(+), 39 deletions(-)
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 3b4c9e7..ec95ad0 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -38,8 +38,6 @@ #include <asm/mach-types.h> #include "beagle.h"
-static int beagle_revision_c; - /* * Routine: board_init * Description: Early hardware init. @@ -58,43 +56,40 @@ int board_init(void) }
/* - * Routine: beagle_get_revision - * Description: Return the revision of the BeagleBoard this code is running on. - * If it is a revision Ax/Bx board, this function returns 0, - * on a revision C board you will get a 1. + * Routine: get_board_revision + * Description: Detect if we are running on a Beagle revision Ax/Bx, + * C1/2/3, or C4. This can be done by reading + * the level of GPIO173, GPIO172 and GPIO171. This should + * result in + * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx + * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 + * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 */ -int beagle_get_revision(void) +int get_board_revision(void) { - return beagle_revision_c; -} + int revision;
-/* - * Routine: beagle_identify - * Description: Detect if we are running on a Beagle revision Ax/Bx or - * Cx. This can be done by GPIO_171. If this is low, we are - * running on a revision C board. - */ -void beagle_identify(void) -{ - beagle_revision_c = 0; - if (!omap_request_gpio(171)) { - unsigned int val; + if (!omap_request_gpio(171) && + !omap_request_gpio(172) && + !omap_request_gpio(173)) {
omap_set_gpio_direction(171, 1); - val = omap_get_gpio_datain(171); - omap_free_gpio(171); + omap_set_gpio_direction(172, 1); + omap_set_gpio_direction(173, 1);
- if (val) - beagle_revision_c = 0; - else - beagle_revision_c = 1; + revision = omap_get_gpio_datain(173) << 2 | + omap_get_gpio_datain(172) << 1 | + omap_get_gpio_datain(171); + + omap_free_gpio(171); + omap_free_gpio(172); + omap_free_gpio(173); + } else { + printf("Error: unable to acquire board revision GPIOs\n"); + revision = -1; }
- printf("Board revision "); - if (beagle_revision_c) - printf("C\n"); - else - printf("Ax/Bx\n"); + return revision; }
/* @@ -106,6 +101,33 @@ int misc_init_r(void) struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
+ switch (get_board_revision()) { + case REVISION_AXBX: + printf("Beagle Rev Ax/Bx\n"); + setenv("beaglerev", "AxBx"); + setenv("mpurate", "600"); + break; + case REVISION_CX: + printf("Beagle Rev C1/C2/C3\n"); + setenv("beaglerev", "Cx"); + setenv("mpurate", "600"); + MUX_BEAGLE_C(); + break; + case REVISION_C4: + printf("Beagle Rev C4\n"); + setenv("beaglerev", "Cx"); + setenv("mpurate", "720"); + MUX_BEAGLE_C(); + /* Set VAUX2 to 1.8V for EHCI PHY */ + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, + TWL4030_PM_RECEIVER_VAUX2_VSEL_18, + TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_P1); + break; + default: + printf("Beagle unknown 0x%02x\n", get_board_revision()); + } + twl4030_power_init(); twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
@@ -120,8 +142,6 @@ int misc_init_r(void) writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
- beagle_identify(); - dieid_num_r();
return 0; @@ -136,8 +156,4 @@ int misc_init_r(void) void set_muxconf_regs(void) { MUX_BEAGLE(); - - if (beagle_revision_c) { - MUX_BEAGLE_C(); - } } diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h index 7fe6275..e5f380c 100644 --- a/board/ti/beagle/beagle.h +++ b/board/ti/beagle/beagle.h @@ -33,7 +33,10 @@ const omap3_sysinfo sysinfo = { #endif };
-#define BOARD_REVISION_MASK (0x1 << 11) +/* BeagleBoard revisions */ +#define REVISION_AXBX 0x7 +#define REVISION_CX 0x6 +#define REVISION_C4 0x5
/* * IEN - Input Enable @@ -264,7 +267,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*GPIO_170*/\ MUX_VAL(CP(MCSPI1_CLK), (IEN | PTU | EN | M4)) /*GPIO_171*/\ MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTU | EN | M4)) /*GPIO_172*/\ - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI*/\ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTU | EN | M4)) /*GPIO_173*/\ MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\ MUX_VAL(CP(MCSPI1_CS2), (IDIS | PTD | DIS | M4)) /*GPIO_176*/\
Confiures GPMC timings for both chips and also configures pinmux for GPIO_65, which is used as the interrupt signal for the second chip
Signed-off-by: Scott Ellis scott@jumpnowtek.com Signed-off-by: Steve Sakoman steve@sakoman.com --- board/overo/overo.c | 26 ++++++++++++++++++-------- board/overo/overo.h | 2 +- 2 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/board/overo/overo.c b/board/overo/overo.c index 1c7087b..4a60917 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -43,6 +43,17 @@ static void setup_net_chip(void); #endif
+/* GPMC definitions for LAN9221 chips on Tobi expansion boards */ +static const u32 gpmc_lan_config[] = { + NET_LAN9221_GPMC_CONFIG1, + NET_LAN9221_GPMC_CONFIG2, + NET_LAN9221_GPMC_CONFIG3, + NET_LAN9221_GPMC_CONFIG4, + NET_LAN9221_GPMC_CONFIG5, + NET_LAN9221_GPMC_CONFIG6, + /*CONFIG7- computed as params */ +}; + /* * Routine: board_init * Description: Early hardware init. @@ -131,14 +142,13 @@ static void setup_net_chip(void) { struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
- /* Configure GPMC registers */ - writel(NET_LAN9221_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1); - writel(NET_LAN9221_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2); - writel(NET_LAN9221_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3); - writel(NET_LAN9221_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4); - writel(NET_LAN9221_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5); - writel(NET_LAN9221_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6); - writel(NET_LAN9221_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7); + /* first lan chip */ + enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000, + GPMC_SIZE_16M); + + /* second lan chip */ + enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4], 0x2B000000, + GPMC_SIZE_16M);
/* Enable off mode for NWE in PADCONF_GPMC_NWE register */ writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); diff --git a/board/overo/overo.h b/board/overo/overo.h index a4e49b9..2744ffe 100644 --- a/board/overo/overo.h +++ b/board/overo/overo.h @@ -138,7 +138,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ /* - SMSC911X_NRES*/\ - MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_nCS3*/\ + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | DIS | M4)) /*GPIO_65*/\ /*DSS*/\ MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
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Steve Sakoman