[PATCH 1/1] cmd: add rdcycle test to RISC-V exception command

Some versions of KVM don't allow access to the cycle CSR.
Provide a command 'exception rdcycle' for testing.
If the cycle CSR is accessible, we get an output like:
=> exception rdcycle cycle = 0x41f7563de
If the cycle CSR is not accessible, we get an output like:
=> exception rdcycle Unhandled exception: Illegal instruction
Put subcommands into alphabetical order in long help.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com --- cmd/riscv/exception.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c index 2b58b1c449c..16e335327f1 100644 --- a/cmd/riscv/exception.c +++ b/cmd/riscv/exception.c @@ -36,6 +36,14 @@ static int do_ialign16(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_SUCCESS; }
+static int do_rdcycle(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + printf("cycle = 0x%lx\n", csr_read(CSR_CYCLE)); + + return CMD_RET_SUCCESS; +} + static int do_unaligned(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -62,6 +70,8 @@ static struct cmd_tbl cmd_sub[] = { "", ""), U_BOOT_CMD_MKENT(ialign16, CONFIG_SYS_MAXARGS, 1, do_ialign16, "", ""), + U_BOOT_CMD_MKENT(rdcycle, CONFIG_SYS_MAXARGS, 1, do_rdcycle, + "", ""), U_BOOT_CMD_MKENT(unaligned, CONFIG_SYS_MAXARGS, 1, do_unaligned, "", ""), U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined, @@ -74,7 +84,8 @@ U_BOOT_LONGHELP(exception, " compressed - compressed instruction\n" " ebreak - breakpoint\n" " ialign16 - 16 bit aligned instruction\n" - " undefined - illegal instruction\n" - " unaligned - load address misaligned\n"); + " rdcycle - read cycle CSR\n" + " unaligned - load address misaligned\n" + " undefined - illegal instruction\n");
#include <exception.h>

On Sun, Aug 11, 2024 at 04:41:23PM +0200, Heinrich Schuchardt wrote:
[EXTERNAL MAIL]
Some versions of KVM don't allow access to the cycle CSR.
Provide a command 'exception rdcycle' for testing.
If the cycle CSR is accessible, we get an output like:
=> exception rdcycle cycle = 0x41f7563de
If the cycle CSR is not accessible, we get an output like:
=> exception rdcycle Unhandled exception: Illegal instruction
Put subcommands into alphabetical order in long help.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
cmd/riscv/exception.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-)
Reviewed-by: Leo Yu-Chi Liang ycliang@andestech.com
participants (2)
-
Heinrich Schuchardt
-
Leo Liang