Radxa dalang carrier boards are used to mount vmarc SoM's of rk3399pro and rk3288 to make complete SBC.

Among these combinations, card detection gpio, max-frequency properties are used with rk3399pro SoM but not required for rk3288 SoM based on the hardware schematics.

So, let's move these sdmmc specific properties on associate vmarc dtsi to make common use of dalang carrier device tree file.

Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/rk3399pro-vmarc-som.dtsi | 5 +++++ arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi | 2 -- 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/rk3399pro-vmarc-som.dtsi b/arch/arm/dts/rk3399pro-vmarc-som.dtsi index 0a516334f1..6fd17e8a81 100644 --- a/arch/arm/dts/rk3399pro-vmarc-som.dtsi +++ b/arch/arm/dts/rk3399pro-vmarc-som.dtsi @@ -317,6 +317,11 @@ status = "okay"; };

+&sdmmc { + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + max-frequency = <150000000>; +}; + &tsadc { status = "okay"; rockchip,hw-tshut-mode = <1>; diff --git a/arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi b/arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi index df3712aedf..3e54f38f0a 100644 --- a/arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi +++ b/arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi @@ -52,10 +52,8 @@ bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; disable-wp; vqmmc-supply = <&vccio_sd>; - max-frequency = <150000000>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; status = "okay";

VMARC RK3288 SOM is a standard SMARC SOM design with Rockchip RK3288 SoC, which is designed by Vamrs.

Specification: - Rockchip RK3288 - PMIC: RK808 - SD slot, 16GiB eMMC - 2xUSB-2.0, 1xUSB3.0 - USB-C for power supply - Ethernet, PCIe - HDMI, MIPI-DSI/CSI, eDP

Add initial support for VMARC RK3288 SOM, this would use with associated carrier board.

Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/rk3288-vmarc-som.dtsi | 298 +++++++++++++++++++++++++++++ 1 file changed, 298 insertions(+) create mode 100644 arch/arm/dts/rk3288-vmarc-som.dtsi

diff --git a/arch/arm/dts/rk3288-vmarc-som.dtsi b/arch/arm/dts/rk3288-vmarc-som.dtsi new file mode 100644 index 0000000000..1549ac4044 --- /dev/null +++ b/arch/arm/dts/rk3288-vmarc-som.dtsi @@ -0,0 +1,298 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd + * Copyright (c) 2019 Vamrs Limited + * Copyright (c) 2019 Amarula Solutions(India) + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/pwm/pwm.h> + +/ { + compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288"; + + ext_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "ext_gmac"; + #clock-cells = <0>; + }; + + vccio_flash: vccio-flash-regulator { + compatible = "regulator-fixed"; + regulator-name = "vccio_flash"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + startup-delay-us = <150>; + vin-supply = <&vcc_io>; + }; + + vcc_sys: vsys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + clock_in_out = "input"; + phy-mode = "rgmii"; + phy-supply = <&vcc_io>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x30>; + rx_delay = <0x10>; + max-speed = <1000>; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int &global_pwroff>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_io>; + vcc9-supply = <&vcc_io>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc_io>; + vddio-supply = <&vcc_io>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd_arm"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd_gpu"; + regulator-ramp-delay = <6000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_io"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_tp: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_tp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_codec: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcca_codec"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd_10: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_wl: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_wl"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd10_lcd: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_18: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_18"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_lcd: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_sd: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_lcd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_lcd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&io_domains { + bb-supply = <&vcc_io>; + flash0-supply = <&vccio_flash>; + gpio1830-supply = <&vcc_18>; + gpio30-supply = <&vcc_io>; + sdcard-supply = <&vccio_sd>; + status = "okay"; +}; + +&pinctrl { + pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { + drive-strength = <8>; + }; + + pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { + bias-pull-up; + drive-strength = <8>; + }; + + pmic { + pmic_int: pmic-int { + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = + <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>, + <6 RK_PC1 1 &pcfg_pull_up_drv_8ma>, + <6 RK_PC2 1 &pcfg_pull_up_drv_8ma>, + <6 RK_PC3 1 &pcfg_pull_up_drv_8ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = + <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = + <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>; + }; + }; +};

Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa.

VAMRC RK3288 SOM need to mount on top of radxa dalang carrier board for making Rock Pi N8 SBC.

So, add initial support for Rock Pi N8 by including rk3288, rk3288 vamrc-som and raxda dalang carrier board dtsi files.

Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi | 33 +++++++++++ arch/arm/dts/rk3288-rock-pi-n8.dts | 17 ++++++ arch/arm/dts/rk3288-vmarc-som.dtsi | 9 --- board/rockchip/evb_rk3288/MAINTAINERS | 6 ++ configs/rock-pi-n8-rk3288_defconfig | 66 ++++++++++++++++++++++ 6 files changed, 123 insertions(+), 9 deletions(-) create mode 100644 arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi create mode 100644 arch/arm/dts/rk3288-rock-pi-n8.dts create mode 100644 configs/rock-pi-n8-rk3288_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 07dfe06230..aae95811c1 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -92,6 +92,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \ rk3288-phycore-rdk.dtb \ rk3288-popmetal.dtb \ rk3288-rock2-square.dtb \ + rk3288-rock-pi-n8.dtb \ rk3288-tinker.dtb \ rk3288-tinker-s.dtb \ rk3288-veyron-jerry.dtb \ diff --git a/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi b/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi new file mode 100644 index 0000000000..e9d7404ed9 --- /dev/null +++ b/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017 Jagan Teki jagan@amarulasolutions.com + */ + +#include "rk3288-u-boot.dtsi" + +&dmc { + rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d + 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6 + 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0 + 0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4 + 0x8 0x1f4>; + rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076 + 0x0 0xc3 0x6 0x2>; + rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>; +}; + +&sdmmc { + u-boot,dm-pre-reloc; +}; + +&emmc { + u-boot,dm-pre-reloc; +}; + +&uart2 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/rk3288-rock-pi-n8.dts b/arch/arm/dts/rk3288-rock-pi-n8.dts new file mode 100644 index 0000000000..c8637a50c1 --- /dev/null +++ b/arch/arm/dts/rk3288-rock-pi-n8.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd + * Copyright (c) 2019 Vamrs Limited + * Copyright (c) 2019 Amarula Solutions(India) + */ + +/dts-v1/; +#include "rk3288.dtsi" +#include "rk3288-vmarc-som.dtsi" +#include <rockchip-radxa-dalang-carrier.dtsi> + +/ { + model = "Radxa ROCK Pi N8"; + compatible = "radxa,rockpi-n8", "vamrs,rk3288-vmarc-som", + "rockchip,rk3288"; +}; diff --git a/arch/arm/dts/rk3288-vmarc-som.dtsi b/arch/arm/dts/rk3288-vmarc-som.dtsi index 1549ac4044..3cffe61cdf 100644 --- a/arch/arm/dts/rk3288-vmarc-som.dtsi +++ b/arch/arm/dts/rk3288-vmarc-som.dtsi @@ -251,15 +251,6 @@ }; };

-&io_domains { - bb-supply = <&vcc_io>; - flash0-supply = <&vccio_flash>; - gpio1830-supply = <&vcc_18>; - gpio30-supply = <&vcc_io>; - sdcard-supply = <&vccio_sd>; - status = "okay"; -}; - &pinctrl { pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { drive-strength = <8>; diff --git a/board/rockchip/evb_rk3288/MAINTAINERS b/board/rockchip/evb_rk3288/MAINTAINERS index 8a4f127f88..9bd6b1e8a4 100644 --- a/board/rockchip/evb_rk3288/MAINTAINERS +++ b/board/rockchip/evb_rk3288/MAINTAINERS @@ -4,3 +4,9 @@ S: Maintained F: board/rockchip/evb_rk3288 F: include/configs/evb_rk3288.h F: configs/evb-rk3288_defconfig + +ROCK-PI-N8 +M: Jagan Teki jagan@amarulasolutions.com +S: Maintained +F: configs/rock-pi-n8-rk3288_defconfig +F: arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig new file mode 100644 index 0000000000..6b31e19eda --- /dev/null +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -0,0 +1,66 @@ +CONFIG_ARM=y +# CONFIG_SPL_USE_ARCH_MEMCPY is not set +# CONFIG_SPL_USE_ARCH_MEMSET is not set +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00100000 +CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ROCKCHIP_RK3288=y +CONFIG_TARGET_EVB_RK3288=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_SILENT_CONSOLE=y +CONFIG_DEFAULT_FDT_FILE="rk3288-rock-pi-n8.dtb" +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_CMD_SPL=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_PARTITION_UUIDS=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock-pi-n8" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +# CONFIG_SPL_SIMPLE_BUS is not set +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_PMIC_RK8XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_ERRNO_STR=y