[U-Boot] [PATCH] 74xx/7xx/86xx: Rename flush_data_cache to flush_dcache to match 85xx version
Signed-off-by: Kumar Gala galak@kernel.crashing.org --- cpu/74xx_7xx/cache.S | 10 +++++----- cpu/mpc86xx/cache.S | 10 +++++----- 2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/cpu/74xx_7xx/cache.S b/cpu/74xx_7xx/cache.S index eac4544..62a6683 100644 --- a/cpu/74xx_7xx/cache.S +++ b/cpu/74xx_7xx/cache.S @@ -52,7 +52,7 @@ _GLOBAL(invalidate_l1_data_cache) /* * Flush data cache. */ -_GLOBAL(flush_data_cache) +_GLOBAL(flush_dcache) lis r3,0 lis r5,CACHE_LINE_SIZE flush: @@ -303,12 +303,12 @@ _GLOBAL(dcache_enable)
/* * Disable data cache(s) - L1 and optionally L2 - * Calls flush_data_cache and l2cache_disable_no_flush. + * Calls flush_dcache and l2cache_disable_no_flush. * LR saved in r4 */ _GLOBAL(dcache_disable) mflr r4 /* save link register */ - bl flush_data_cache /* uses r3 and r5 */ + bl flush_dcache /* uses r3 and r5 */ sync mfspr r3, HID0 li r5, HID0_DCFI|HID0_DLOCK @@ -389,11 +389,11 @@ _GLOBAL(l2cache_enable)
/* * Disable L2 cache - * Calls flush_data_cache. LR is saved in r4 + * Calls flush_dcache. LR is saved in r4 */ _GLOBAL(l2cache_disable) mflr r4 /* save link register */ - bl flush_data_cache /* uses r3 and r5 */ + bl flush_dcache /* uses r3 and r5 */ sync mtlr r4 /* restore link register */ l2cache_disable_no_flush: /* provide way to disable L2 w/o flushing */ diff --git a/cpu/mpc86xx/cache.S b/cpu/mpc86xx/cache.S index 80ff688..dd38806 100644 --- a/cpu/mpc86xx/cache.S +++ b/cpu/mpc86xx/cache.S @@ -53,7 +53,7 @@ _GLOBAL(invalidate_l1_data_cache) /* * Flush data cache. */ -_GLOBAL(flush_data_cache) +_GLOBAL(flush_dcache) lis r3,0 lis r5,CACHE_LINE_SIZE flush: @@ -290,12 +290,12 @@ _GLOBAL(dcache_enable)
/* * Disable data cache(s) - L1 and optionally L2 - * Calls flush_data_cache and l2cache_disable_no_flush. + * Calls flush_dcache and l2cache_disable_no_flush. * LR saved in r4 */ _GLOBAL(dcache_disable) mflr r4 /* save link register */ - bl flush_data_cache /* uses r3 and r5 */ + bl flush_dcache /* uses r3 and r5 */ sync mfspr r3, HID0 li r5, HID0_DCFI|HID0_DLOCK @@ -363,11 +363,11 @@ _GLOBAL(l2cache_enable)
/* * Disable L2 cache - * Calls flush_data_cache. LR is saved in r4 + * Calls flush_dcache. LR is saved in r4 */ _GLOBAL(l2cache_disable) mflr r4 /* save link register */ - bl flush_data_cache /* uses r3 and r5 */ + bl flush_dcache /* uses r3 and r5 */ sync mtlr r4 /* restore link register */ l2cache_disable_no_flush: /* provide way to disable L2 w/o flushing */
Dear Kumar Gala,
In message 1223925175-21371-1-git-send-email-galak@kernel.crashing.org you wrote:
Signed-off-by: Kumar Gala galak@kernel.crashing.org
cpu/74xx_7xx/cache.S | 10 +++++----- cpu/mpc86xx/cache.S | 10 +++++----- 2 files changed, 10 insertions(+), 10 deletions(-)
Applied to "next" branch.
Jon, as this was for more than just 86xx I just went ahead. Hope that's OK with you.
Best regards,
Wolfgang Denk
On Wed, 2008-10-15 at 11:23 +0200, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 1223925175-21371-1-git-send-email-galak@kernel.crashing.org you wrote:
Signed-off-by: Kumar Gala galak@kernel.crashing.org
cpu/74xx_7xx/cache.S | 10 +++++----- cpu/mpc86xx/cache.S | 10 +++++----- 2 files changed, 10 insertions(+), 10 deletions(-)
Applied to "next" branch.
Jon, as this was for more than just 86xx I just went ahead. Hope that's OK with you.
Sounds good!
Thanks, jdl
participants (3)
-
Jon Loeliger -
Kumar Gala -
Wolfgang Denk