[U-Boot] [PATCH 1/5] sh: Fix OF_SEPARATE support

older
[U-Boot] [PATCH] sh: tmu: Fix SH4...

Marek Vasut

1 Sep 2019 1 Sep '19

6:30 p.m.

If the OF_SEPARATE is enabled, the DT is appended past the _end symbol. The current code however clears BSS very early, which overwrites the DT blob with zeroes. Moreover, the early code relocates U-Boot into RAM to the correct location, but does not relocate the DT.

This patch adds code to relocate the DT and avoids clearing BSS too early, thus addressing both problems with OF_SEPARATE on SH.

Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- arch/sh/cpu/u-boot.lds | 1 + arch/sh/lib/start.S | 14 ++++++++++++++ 2 files changed, 15 insertions(+)

diff --git a/arch/sh/cpu/u-boot.lds b/arch/sh/cpu/u-boot.lds index 7b225a6bd9..47302da252 100644 --- a/arch/sh/cpu/u-boot.lds +++ b/arch/sh/cpu/u-boot.lds @@ -75,6 +75,7 @@ SECTIONS

PROVIDE (__init_end = .); PROVIDE (reloc_dst_end = .); + PROVIDE (_end = .);

PROVIDE (bss_start = .); PROVIDE (__bss_start = .); diff --git a/arch/sh/lib/start.S b/arch/sh/lib/start.S index f5350b9064..f9f26d3779 100644 --- a/arch/sh/lib/start.S +++ b/arch/sh/lib/start.S @@ -22,6 +22,17 @@ _start: mov.l ._reloc_dst, r4 add #(_start-1b), r5 mov.l ._reloc_dst_end, r6 +#ifdef CONFIG_OF_SEPARATE + mov.l ._reloc_size, r0 + add r5, r0 + add #4, r0 + mov.l @r0, r0 + swap.b r0, r0 + swap.w r0, r0 + swap.b r0, r0 + add #4, r0 + add r0, r6 +#endif

2: mov.l @r5+, r1 mov.l r1, @r4 @@ -29,6 +40,7 @@ _start: cmp/hs r6, r4 bf 2b

+#ifndef CONFIG_OF_SEPARATE mov.l ._bss_start, r4 mov.l ._bss_end, r5 mov #0, r1 @@ -37,6 +49,7 @@ _start: add #4, r4 cmp/hs r5, r4 bf 3b +#endif

mov.l ._gd_init, r13 /* global data */ mov.l ._stack_init, r15 /* stack */ @@ -53,6 +66,7 @@ loop: ._lowlevel_init: .long (lowlevel_init - (100b + 4)) ._reloc_dst: .long _start ._reloc_dst_end: .long reloc_dst_end +._reloc_size: .long (_end - _start) ._bss_start: .long bss_start ._bss_end: .long bss_end ._gd_init: .long (_start - GENERATED_GBL_DATA_SIZE)

-- 2.23.0.rc1

Show replies by date

Marek Vasut

1 Sep 1 Sep

6:30 p.m.

New subject: [U-Boot] [PATCH 2/5] sh: r2dplus: Enable DM

Enable driver model support for SH4 R2Dplus board. Thus far, no drivers are bound via the DM. The PCI drivers have yet to be converted to DM_PCI.

Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- configs/r2dplus_defconfig | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 4c1912c8a1..43bf97cb77 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -1,12 +1,14 @@ CONFIG_SH=y CONFIG_SYS_TEXT_BASE=0x8FE00000 CONFIG_TARGET_R2DPLUS=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttySC0,115200" # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_IDE=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set @@ -15,6 +17,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y +CONFIG_DM=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y

-- 2.23.0.rc1

Marek Vasut

6:30 p.m.

New subject: [U-Boot] [PATCH 3/5] sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because the PCI uclass is designed in a way that makes it depend on DT and disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- arch/Kconfig | 1 + arch/sh/dts/Makefile | 12 ++++++++++++ arch/sh/dts/sh7751-r2dplus.dts | 12 ++++++++++++ arch/sh/include/asm/config.h | 2 ++ configs/r2dplus_defconfig | 2 ++ 5 files changed, 29 insertions(+) create mode 100644 arch/sh/dts/Makefile create mode 100644 arch/sh/dts/sh7751-r2dplus.dts

diff --git a/arch/Kconfig b/arch/Kconfig index f4ada57909..141e48bc43 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -137,6 +137,7 @@ config SANDBOX config SH bool "SuperH architecture" select HAVE_PRIVATE_LIBGCC + select SUPPORT_OF_CONTROL

config X86 bool "x86 architecture" diff --git a/arch/sh/dts/Makefile b/arch/sh/dts/Makefile new file mode 100644 index 0000000000..e423bfd566 --- /dev/null +++ b/arch/sh/dts/Makefile @@ -0,0 +1,12 @@ +dtb-y += sh7751-r2dplus.dtb + +targets += $(dtb-y) + +# Add any required device tree compiler flags here +DTC_FLAGS += + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := *.dtb *_HS diff --git a/arch/sh/dts/sh7751-r2dplus.dts b/arch/sh/dts/sh7751-r2dplus.dts new file mode 100644 index 0000000000..2d291bf1ee --- /dev/null +++ b/arch/sh/dts/sh7751-r2dplus.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the SH7751 R2Dplus + * + * Copyright (C) 2019 Marek Vasut marek.vasut@gmail.com + */ + +/dts-v1/; +/ { + model = "R2D"; + compatible = "renesas,r2d", "renesas,sh7751"; +}; diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h index 406156dff5..e1cd322152 100644 --- a/arch/sh/include/asm/config.h +++ b/arch/sh/include/asm/config.h @@ -8,6 +8,8 @@

#include <asm/processor.h>

+#define CONFIG_LMB + /* Timer */ #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 43bf97cb77..51a8587b61 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -16,6 +16,8 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="sh7751-r2dplus" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y CONFIG_MTD_NOR_FLASH=y

-- 2.23.0.rc1

Marek Vasut

6:30 p.m.

New subject: [U-Boot] [PATCH 4/5] pci: sh7751: Convert to DM and DT probing

Convert the SH7751 PCI driver to DM and add DT probing.

Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Bin Meng bmeng.cn@gmail.com --- drivers/pci/pci_sh7751.c | 164 +++++++++++++++++++++++++-------------- 1 file changed, 106 insertions(+), 58 deletions(-)

diff --git a/drivers/pci/pci_sh7751.c b/drivers/pci/pci_sh7751.c index 2f918f161a..53e1668c99 100644 --- a/drivers/pci/pci_sh7751.c +++ b/drivers/pci/pci_sh7751.c @@ -6,6 +6,7 @@ */

#include <common.h> +#include <dm.h> #include <pci.h> #include <asm/processor.h> #include <asm/io.h> @@ -19,82 +20,113 @@ #define SH7751_WCR3 (vu_long *)0xFF800010 #define SH7751_MCR (vu_long *)0xFF800014 #define SH7751_BCR3 (vu_short *)0xFF800050 -#define SH7751_PCICONF0 (vu_long *)0xFE200000 -#define SH7751_PCICONF1 (vu_long *)0xFE200004 -#define SH7751_PCICONF2 (vu_long *)0xFE200008 -#define SH7751_PCICONF3 (vu_long *)0xFE20000C -#define SH7751_PCICONF4 (vu_long *)0xFE200010 -#define SH7751_PCICONF5 (vu_long *)0xFE200014 -#define SH7751_PCICONF6 (vu_long *)0xFE200018 -#define SH7751_PCICR (vu_long *)0xFE200100 -#define SH7751_PCILSR0 (vu_long *)0xFE200104 -#define SH7751_PCILSR1 (vu_long *)0xFE200108 -#define SH7751_PCILAR0 (vu_long *)0xFE20010C -#define SH7751_PCILAR1 (vu_long *)0xFE200110 -#define SH7751_PCIMBR (vu_long *)0xFE2001C4 -#define SH7751_PCIIOBR (vu_long *)0xFE2001C8 -#define SH7751_PCIPINT (vu_long *)0xFE2001CC -#define SH7751_PCIPINTM (vu_long *)0xFE2001D0 -#define SH7751_PCICLKR (vu_long *)0xFE2001D4 -#define SH7751_PCIBCR1 (vu_long *)0xFE2001E0 -#define SH7751_PCIBCR2 (vu_long *)0xFE2001E4 -#define SH7751_PCIWCR1 (vu_long *)0xFE2001E8 -#define SH7751_PCIWCR2 (vu_long *)0xFE2001EC -#define SH7751_PCIWCR3 (vu_long *)0xFE2001F0 -#define SH7751_PCIMCR (vu_long *)0xFE2001F4 -#define SH7751_PCIBCR3 (vu_long *)0xFE2001F8 - -#define BCR1_BREQEN 0x00080000 -#define PCI_SH7751_ID 0x35051054 -#define PCI_SH7751R_ID 0x350E1054 -#define SH7751_PCICONF1_WCC 0x00000080 -#define SH7751_PCICONF1_PER 0x00000040 -#define SH7751_PCICONF1_BUM 0x00000004 -#define SH7751_PCICONF1_MES 0x00000002 +#define SH7751_PCICONF0 (vu_long *)0xFE200000 +#define SH7751_PCICONF1 (vu_long *)0xFE200004 +#define SH7751_PCICONF2 (vu_long *)0xFE200008 +#define SH7751_PCICONF3 (vu_long *)0xFE20000C +#define SH7751_PCICONF4 (vu_long *)0xFE200010 +#define SH7751_PCICONF5 (vu_long *)0xFE200014 +#define SH7751_PCICONF6 (vu_long *)0xFE200018 +#define SH7751_PCICR (vu_long *)0xFE200100 +#define SH7751_PCILSR0 (vu_long *)0xFE200104 +#define SH7751_PCILSR1 (vu_long *)0xFE200108 +#define SH7751_PCILAR0 (vu_long *)0xFE20010C +#define SH7751_PCILAR1 (vu_long *)0xFE200110 +#define SH7751_PCIMBR (vu_long *)0xFE2001C4 +#define SH7751_PCIIOBR (vu_long *)0xFE2001C8 +#define SH7751_PCIPINT (vu_long *)0xFE2001CC +#define SH7751_PCIPINTM (vu_long *)0xFE2001D0 +#define SH7751_PCICLKR (vu_long *)0xFE2001D4 +#define SH7751_PCIBCR1 (vu_long *)0xFE2001E0 +#define SH7751_PCIBCR2 (vu_long *)0xFE2001E4 +#define SH7751_PCIWCR1 (vu_long *)0xFE2001E8 +#define SH7751_PCIWCR2 (vu_long *)0xFE2001EC +#define SH7751_PCIWCR3 (vu_long *)0xFE2001F0 +#define SH7751_PCIMCR (vu_long *)0xFE2001F4 +#define SH7751_PCIBCR3 (vu_long *)0xFE2001F8 + +#define BCR1_BREQEN 0x00080000 +#define PCI_SH7751_ID 0x35051054 +#define PCI_SH7751R_ID 0x350E1054 +#define SH7751_PCICONF1_WCC 0x00000080 +#define SH7751_PCICONF1_PER 0x00000040 +#define SH7751_PCICONF1_BUM 0x00000004 +#define SH7751_PCICONF1_MES 0x00000002 #define SH7751_PCICONF1_CMDS 0x000000C6 #define SH7751_PCI_HOST_BRIDGE 0x6 -#define SH7751_PCICR_PREFIX 0xa5000000 -#define SH7751_PCICR_PRST 0x00000002 -#define SH7751_PCICR_CFIN 0x00000001 -#define SH7751_PCIPINT_D3 0x00000002 -#define SH7751_PCIPINT_D0 0x00000001 -#define SH7751_PCICLKR_PREFIX 0xa5000000 +#define SH7751_PCICR_PREFIX 0xa5000000 +#define SH7751_PCICR_PRST 0x00000002 +#define SH7751_PCICR_CFIN 0x00000001 +#define SH7751_PCIPINT_D3 0x00000002 +#define SH7751_PCIPINT_D0 0x00000001 +#define SH7751_PCICLKR_PREFIX 0xa5000000

-#define SH7751_PCI_MEM_BASE 0xFD000000 -#define SH7751_PCI_MEM_SIZE 0x01000000 -#define SH7751_PCI_IO_BASE 0xFE240000 -#define SH7751_PCI_IO_SIZE 0x00040000 +#define SH7751_PCI_MEM_BASE 0xFD000000 +#define SH7751_PCI_MEM_SIZE 0x01000000 +#define SH7751_PCI_IO_BASE 0xFE240000 +#define SH7751_PCI_IO_SIZE 0x00040000

-#define SH7751_PCIPAR (vu_long *)0xFE2001C0 -#define SH7751_PCIPDR (vu_long *)0xFE200220 +#define SH7751_PCIPAR (vu_long *)0xFE2001C0 +#define SH7751_PCIPDR (vu_long *)0xFE200220

#define p4_in(addr) (*addr) #define p4_out(data, addr) (*addr) = (data)

-/* Double word */ -int pci_sh4_read_config_dword(struct pci_controller *hose, - pci_dev_t dev, int offset, u32 *value) +static int sh7751_pci_addr_valid(pci_dev_t d, uint offset) { - u32 par_data = 0x80000000 | dev; + if (PCI_FUNC(d)) + return -EINVAL;

- p4_out(par_data | (offset & 0xfc), SH7751_PCIPAR); - *value = p4_in(SH7751_PCIPDR); + return 0; +} + +static u32 get_bus_address(struct udevice *dev, pci_dev_t bdf, u32 offset) +{ + return BIT(31) | (PCI_DEV(bdf) << 8) | (offset & ~3); +} + +static int sh7751_pci_read_config(struct udevice *dev, pci_dev_t bdf, + uint offset, ulong *value, + enum pci_size_t size) +{ + u32 addr, reg; + int ret; + + ret = sh7751_pci_addr_valid(bdf, offset); + if (ret) { + *value = pci_get_ff(size); + return 0; + } + + addr = get_bus_address(dev, bdf, offset); + p4_out(addr, SH7751_PCIPAR); + reg = p4_in(SH7751_PCIPDR); + *value = pci_conv_32_to_size(reg, offset, size);

return 0; }

-int pci_sh4_write_config_dword(struct pci_controller *hose, - pci_dev_t dev, int offset, u32 value) +static int sh7751_pci_write_config(struct udevice *dev, pci_dev_t bdf, + uint offset, ulong value, + enum pci_size_t size) { - u32 par_data = 0x80000000 | dev; + u32 addr, reg, old; + int ret;

- p4_out(par_data | (offset & 0xfc), SH7751_PCIPAR); - p4_out(value, SH7751_PCIPDR); + ret = sh7751_pci_addr_valid(bdf, offset); + if (ret) + return ret; + + addr = get_bus_address(dev, bdf, offset); + p4_out(addr, SH7751_PCIPAR); + old = p4_in(SH7751_PCIPDR); + reg = pci_conv_size_to_32(old, value, offset, size); + p4_out(reg, SH7751_PCIPDR);

return 0; }

-int pci_sh7751_init(struct pci_controller *hose) +static int sh7751_pci_probe(struct udevice *dev) { /* Double-check that we're a 7751 or 7751R chip */ if (p4_in(SH7751_PCICONF0) != PCI_SH7751_ID @@ -178,7 +210,23 @@ int pci_sh7751_init(struct pci_controller *hose) /* Finally, set central function init complete */ p4_out((SH7751_PCICR_PREFIX | SH7751_PCICR_CFIN), SH7751_PCICR);

- pci_sh4_init(hose); - return 0; } + +static const struct dm_pci_ops sh7751_pci_ops = { + .read_config = sh7751_pci_read_config, + .write_config = sh7751_pci_write_config, +}; + +static const struct udevice_id sh7751_pci_ids[] = { + { .compatible = "renesas,pci-sh7751" }, + { } +}; + +U_BOOT_DRIVER(sh7751_pci) = { + .name = "sh7751_pci", + .id = UCLASS_PCI, + .of_match = sh7751_pci_ids, + .ops = &sh7751_pci_ops, + .probe = sh7751_pci_probe, +};

-- 2.23.0.rc1

Marek Vasut

6:30 p.m.

New subject: [U-Boot] [PATCH 5/5] sh: r2dplus: Switch to DM PCI driver

Add DT entry for the DM PCI driver, update board configs and drop ad-hoc board init code for the PCI bus. Instead, let the DM PCI driver initialize and operate the hardware.

Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- arch/sh/dts/sh7751-r2dplus.dts | 14 ++++++++++++++ board/renesas/r2dplus/r2dplus.c | 7 ------- configs/r2dplus_defconfig | 2 ++ include/configs/r2dplus.h | 13 ------------- 4 files changed, 16 insertions(+), 20 deletions(-)

diff --git a/arch/sh/dts/sh7751-r2dplus.dts b/arch/sh/dts/sh7751-r2dplus.dts index 2d291bf1ee..ecaf0772d8 100644 --- a/arch/sh/dts/sh7751-r2dplus.dts +++ b/arch/sh/dts/sh7751-r2dplus.dts @@ -9,4 +9,18 @@ / { model = "R2D"; compatible = "renesas,r2d", "renesas,sh7751"; + + pci@fe200000 { + compatible = "renesas,pci-sh7751"; + device_type = "pci"; + reg = <0 0xfe200000 0 0x1000>; + status = "okay"; + + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x01000000 0 0xfe240000 0 0xfe240000 0 0x00040000 + 0x02000000 0 0xfd000000 0 0xfd000000 0 0x01000000>; + }; }; diff --git a/board/renesas/r2dplus/r2dplus.c b/board/renesas/r2dplus/r2dplus.c index f0773267b1..6eff98706f 100644 --- a/board/renesas/r2dplus/r2dplus.c +++ b/board/renesas/r2dplus/r2dplus.c @@ -9,7 +9,6 @@ #include <netdev.h> #include <asm/processor.h> #include <asm/io.h> -#include <asm/pci.h>

int checkboard(void) { @@ -45,12 +44,6 @@ void ide_set_reset(int idereset) } }

-static struct pci_controller hose; -void pci_init_board(void) -{ - pci_sh7751_init(&hose); -} - int board_eth_init(bd_t *bis) { return pci_eth_init(bis); diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 51a8587b61..b2334affc3 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -25,5 +25,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y CONFIG_RTL8139=y CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index e10de1b920..0b16fb0f64 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -64,19 +64,6 @@ /* * SuperH PCI Bridge Configration */ -#define CONFIG_SH4_PCI #define CONFIG_SH7751_PCI -#define CONFIG_PCI_SCAN_SHOW 1 -#define __mem_pci - -#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ -#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS -#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ -#define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */ -#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS -#define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */ -#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE -#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE -#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE

#endif /* __CONFIG_H */

-- 2.23.0.rc1

2075

Age (days ago)

2075

Last active (days ago)

List overview

Download

4 comments

1 participants

tags (0)

participants (1)

Marek Vasut