RE: [U-Boot-Users] CPM on 8250 board seems stuck.

Hello,
To debug this we wrote a routine to enable the RISC timer on the CPM.
We verify it that this timer is actually getting counted down. This tells us that CPM is running.
However in the file cpm/mpc8260/serial_scc.c as soon as following line of code is executed
tbdf->cdb_sc |= BD_SC_READY;
the RISC timers stops counting.
So somehow it appears that the transmit buffer descriptor that we are setting up for CPM to transmit data on SCC1 appears to be "invalid"?
The CPM-RAM address that can be used is defined in include/asm-ppc/cpm_8260.h (definition of CPM_DATAONLY_BASE) so we moved its location around to 0x3000, also changing CPM_DATA_ONLY_SIZE also, but it had no effect.
I am sending question to folks at Motorola but if someone has encountered this before, please do let me know what could be the possible reason, that CPM gets stuck momemnt we mark tx descriptor is valid. Since the CPM at this point processing the RISC timer, I think CPM is getting the clocked correctly...
-Subodh Nijsure
-----Original Message----- From: Wolfgang Denk To: Subodh Nijsure Cc: U-Boot Mailing List Sent: 5/16/04 1:09 PM Subject: Re: [U-Boot-Users] CPM on 8250 board seems stuck.
In message F0C0133D6BE53342B2A78DE5D200E0A0074577@ssmail2.corp.skystream.com you wrote:
When I step through the code using BDI, I see is the code is stuck in
a
while loop in serial_putc waiting for the Buffer descriptor ready bit to get cleared in putc function.
while ( tbdf->cbd_sc & BD_SC_READY ) ;
...
It appears to me that CPM is "dead". Now how do I prove things either
way,
that it is not dead or its is working. Any CLUES I would really
appreciate
them.
Most probably the CPM is _not_ dead.
This is a typical case where you should lean back and think about the problem. So you programmed an UART, and wait for it to complete send- ing a character. When will this complete? After the last bit and the stop bit(s) have been clocked out. How long will this take? Well, this obviously depends on the clock. Why might it hang forever? Ummm... Maybe there is no clock???
Maybe there is no clock???
Check your BRG setup (probably OK, since not board dependent), and double-check your clock routing!
Anybody here that has done 8250 board, and booted u-boot on it, care
to
share your config.h file?
Why don't you just use one of the files in the include/configs directory? Checking for example the MAINTAINERS file will reveal at least two MPC8250 based boards.
Best regards,
Wolfgang Denk

Subodh Nijsure writes:
Subodh> To debug this we wrote a routine to enable the RISC timer on Subodh> the CPM.
Subodh> We verify it that this timer is actually getting counted Subodh> down. This tells us that CPM is running.
Subodh> However in the file cpm/mpc8260/serial_scc.c as soon as Subodh> following line of code is executed
Subodh> tbdf-> cdb_sc |= BD_SC_READY;
Subodh> the RISC timers stops counting.
This in many cases points to SDMA bus error. Please check SDSR.
Subodh> So somehow it appears that the transmit buffer descriptor Subodh> that we are setting up for CPM to transmit data on SCC1 Subodh> appears to be "invalid"?
Probably not the BD but the data to be sent. Check the data pointer in the BD.
Subodh> The CPM-RAM address that can be used is defined in Subodh> include/asm-ppc/cpm_8260.h (definition of CPM_DATAONLY_BASE) Subodh> so we moved its location around to 0x3000, also changing Subodh> CPM_DATA_ONLY_SIZE also, but it had no effect.
I've got 8250-based board on my desk and it works OK with default U-Boot values. I don't think there is any difference in DPRAM map between 8260 and 8250.
Subodh> I am sending question to folks at Motorola but if someone Subodh> has encountered this before, please do let me know what Subodh> could be the possible reason, that CPM gets stuck momemnt we Subodh> mark tx descriptor is valid. Since the CPM at this point Subodh> processing the RISC timer, I think CPM is getting the Subodh> clocked correctly...

In message F0C0133D6BE53342B2A78DE5D200E0A007457F@ssmail2.corp.skystream.com you wrote:
So somehow it appears that the transmit buffer descriptor that we are setting up for CPM to transmit data on SCC1 appears to be "invalid"?
Why do you continue to speculate about unlikely reasons for your problem, while ignoring my advice?
I wrote:
Check your BRG setup (probably OK, since not board dependent), and double-check your clock routing!
Did you check your clock configuration? Are you 100% sure it's OK for your hardware?
Wolfgang Denk
participants (3)
-
Subodh Nijsure
-
Wolfgang Denk
-
Yuli Barcohen