[U-Boot] [PATCH v4 0/4] QE patchset introduction
*Changes in v4: -[PATCH v4 4/4] qe: assgin pins to qe-hdlc - modify the format of multi-line comments
*Changes in v3: -split [PATCH v2 3/3] QE: assgin pins to QE-HDLC to two patches: [PATCH v3 3/4] ls1043rdb: move USB mux config to config_board_mux and [PATCH v3 4/4] qe: assgin pins to qe-hdlc.
*Changes in v2: -Add new patch in patchset.QE: mask the codes not used for micro QE -[PATCH v2 2/3] QE: add QE support on ls1043ardb -get qe_immr and qe_immr directly instead of from qe_base
use "#ifdef CONFIG_QE" to mask the codes not used for micro QE
Signed-off-by: Zhao Qiang qiang.zhao@nxp.com --- drivers/qe/qe.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 08620b2..2a9e61b 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -20,7 +20,9 @@ #define MPC85xx_DEVDISR_QE_DISABLE 0x1
qe_map_t *qe_immr = NULL; +#ifdef CONFIG_QE static qe_snum_t snums[QE_NUM_OF_SNUM]; +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -81,6 +83,7 @@ void *qe_muram_addr(uint offset) return (void *)&qe_immr->muram[offset]; }
+#ifdef CONFIG_QE static void qe_sdma_init(void) { volatile sdma_t *p; @@ -184,6 +187,7 @@ void qe_init(uint qe_base) qe_sdma_init(); qe_snums_init(); } +#endif
#ifdef CONFIG_U_QE void u_qe_init(void) @@ -214,6 +218,7 @@ void qe_reset(void) (u8) QE_CR_PROTOCOL_UNSPECIFIED, 0); }
+#ifdef CONFIG_QE void qe_assign_page(uint snum, uint para_ram_base) { u32 cecr; @@ -229,6 +234,7 @@ void qe_assign_page(uint snum, uint para_ram_base)
return; } +#endif
/* * brg: 0~15 as BRG1~BRG16
Upload qe microcode on ls1043ardb
Signed-off-by: Zhao Qiang qiang.zhao@nxp.com --- board/freescale/ls1043ardb/ls1043ardb.c | 8 ++++++++ drivers/qe/qe.c | 6 ++---- include/configs/ls1043ardb.h | 7 +++++++ 3 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index c8f723a..834fdff 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -21,6 +21,10 @@ #include <environment.h> #include <fsl_sec.h> #include "cpld.h" +#ifdef CONFIG_U_QE +#include "../../../drivers/qe/qe.h" +#endif +
DECLARE_GLOBAL_DATA_PTR;
@@ -113,6 +117,10 @@ int board_init(void) enable_layerscape_ns_access(); #endif
+#ifdef CONFIG_U_QE + u_qe_init(); +#endif + return 0; }
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 2a9e61b..8a432a8 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -192,8 +192,7 @@ void qe_init(uint qe_base) #ifdef CONFIG_U_QE void u_qe_init(void) { - uint qe_base = CONFIG_SYS_IMMR + 0x01400000; /* QE immr base */ - qe_immr = (qe_map_t *)qe_base; + qe_immr = (qe_map_t *)(CONFIG_SYS_IMMR + QE_IMMR_OFFSET);
u_qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR); out_be32(&qe_immr->iram.iready, QE_IRAM_READY); @@ -204,9 +203,8 @@ void u_qe_init(void) void u_qe_resume(void) { qe_map_t *qe_immrr; - uint qe_base = CONFIG_SYS_IMMR + QE_IMMR_OFFSET; /* QE immr base */ - qe_immrr = (qe_map_t *)qe_base;
+ qe_immrr = (qe_map_t *)(CONFIG_SYS_IMMR + QE_IMMR_OFFSET); u_qe_firmware_resume((const void *)CONFIG_SYS_QE_FW_ADDR, qe_immrr); out_be32(&qe_immrr->iram.iready, QE_IRAM_READY); } diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 585114f..6494507 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -278,6 +278,13 @@ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif
+/* QE */ +#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ + !defined(CONFIG_QSPI_BOOT) +#define CONFIG_U_QE +#endif +#define CONFIG_SYS_QE_FW_ADDR 0x60600000 + /* USB */ #define CONFIG_HAS_FSL_XHCI_USB #ifdef CONFIG_HAS_FSL_XHCI_USB
-----Original Message----- From: Zhao Qiang [mailto:qiang.zhao@nxp.com] Sent: Friday, January 29, 2016 12:28 PM To: Mingkai Hu Cc: trini@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao Subject: [PATCH v4 2/4] QE: add QE support on ls1043ardb
Upload qe microcode on ls1043ardb
Signed-off-by: Zhao Qiang qiang.zhao@nxp.com
board/freescale/ls1043ardb/ls1043ardb.c | 8 ++++++++ drivers/qe/qe.c | 6 ++---- include/configs/ls1043ardb.h | 7 +++++++ 3 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index c8f723a..834fdff 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -21,6 +21,10 @@ #include <environment.h> #include <fsl_sec.h> #include "cpld.h" +#ifdef CONFIG_U_QE +#include "../../../drivers/qe/qe.h" +#endif
The patch submitted by Qianyu is trying to move qe.h to include/fsl_qe.h, It's better to based on this patch set to avoid the long include statement. http://patchwork.ozlabs.org/patch/572697/
Thanks, Mingkai
USB pins are muxed with other feature, move USB mux config to config_board_mux.
Signed-off-by: Zhao Qiang qiang.zhao@nxp.com --- board/freescale/ls1043ardb/ls1043ardb.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 834fdff..c2d4887 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -75,23 +75,8 @@ int dram_init(void)
int board_early_init_f(void) { - struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; - u32 usb_pwrfault; - fsl_lsch2_early_init_f();
-#ifdef CONFIG_HAS_FSL_XHCI_USB - out_be32(&scfg->rcwpmuxcr0, 0x3333); - out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); - usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << - SCFG_USBPWRFAULT_USB3_SHIFT) | - (SCFG_USBPWRFAULT_DEDICATED << - SCFG_USBPWRFAULT_USB2_SHIFT) | - (SCFG_USBPWRFAULT_SHARED << - SCFG_USBPWRFAULT_USB1_SHIFT); - out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); -#endif - return 0; }
@@ -126,6 +111,21 @@ int board_init(void)
int config_board_mux(void) { + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + u32 usb_pwrfault; + +#ifdef CONFIG_HAS_FSL_XHCI_USB + out_be32(&scfg->rcwpmuxcr0, 0x3333); + out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); + usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << + SCFG_USBPWRFAULT_USB3_SHIFT) | + (SCFG_USBPWRFAULT_DEDICATED << + SCFG_USBPWRFAULT_USB2_SHIFT) | + (SCFG_USBPWRFAULT_SHARED << + SCFG_USBPWRFAULT_USB1_SHIFT); + out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); +#endif + return 0; }
-----Original Message----- From: Zhao Qiang [mailto:qiang.zhao@nxp.com] Sent: Friday, January 29, 2016 12:28 PM To: Mingkai Hu Cc: trini@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao Subject: [PATCH v4 3/4] ls1043rdb: move USB mux config to config_board_mux
USB pins are muxed with other feature, move USB mux config to config_board_mux.
Signed-off-by: Zhao Qiang qiang.zhao@nxp.com
board/freescale/ls1043ardb/ls1043ardb.c | 30 +++++++++++++++------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 834fdff..c2d4887 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -75,23 +75,8 @@ int dram_init(void)
int board_early_init_f(void) {
- struct ccsr_scfg *scfg = (struct ccsr_scfg
*)CONFIG_SYS_FSL_SCFG_ADDR;
- u32 usb_pwrfault;
- fsl_lsch2_early_init_f();
-#ifdef CONFIG_HAS_FSL_XHCI_USB
- out_be32(&scfg->rcwpmuxcr0, 0x3333);
- out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1);
- usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED <<
SCFG_USBPWRFAULT_USB3_SHIFT) |(SCFG_USBPWRFAULT_DEDICATED <<SCFG_USBPWRFAULT_USB2_SHIFT) |(SCFG_USBPWRFAULT_SHARED <<SCFG_USBPWRFAULT_USB1_SHIFT);- out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault);
-#endif
- return 0;
}
@@ -126,6 +111,21 @@ int board_init(void)
int config_board_mux(void) {
- struct ccsr_scfg *scfg = (struct ccsr_scfg
*)CONFIG_SYS_FSL_SCFG_ADDR;
- u32 usb_pwrfault;
+#ifdef CONFIG_HAS_FSL_XHCI_USB
- out_be32(&scfg->rcwpmuxcr0, 0x3333);
- out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1);
- usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED <<
SCFG_USBPWRFAULT_USB3_SHIFT) |(SCFG_USBPWRFAULT_DEDICATED <<SCFG_USBPWRFAULT_USB2_SHIFT) |(SCFG_USBPWRFAULT_SHARED <<SCFG_USBPWRFAULT_USB1_SHIFT);- out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); #endif
- return 0;
}
-- 2.1.0.27.g96db324
Reviewed-by: Mingkai Hu mingkai.hu@nxp.com
Regards, Mingkai
qe-hdlc and usb multi-use the pins, when set hwconfig=qe-hdlc, assign the pins to qe-hdlc, if not, assgin it to usb
Signed-off-by: Zhao Qiang qiang.zhao@nxp.com --- board/freescale/ls1043ardb/ls1043ardb.c | 53 ++++++++++++++++++++++++++------- 1 file changed, 43 insertions(+), 10 deletions(-)
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index c2d4887..7ba72f8 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -114,18 +114,24 @@ int config_board_mux(void) struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; u32 usb_pwrfault;
+ if (hwconfig("qe-hdlc")) { + out_be32(&scfg->rcwpmuxcr0, + (in_be32(&scfg->rcwpmuxcr0) & ~0xff00) | 0x6600); + printf("Assign to qe-hdlc clk, rcwpmuxcr0=%x\n", + in_be32(&scfg->rcwpmuxcr0)); + } else { #ifdef CONFIG_HAS_FSL_XHCI_USB - out_be32(&scfg->rcwpmuxcr0, 0x3333); - out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); - usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << - SCFG_USBPWRFAULT_USB3_SHIFT) | - (SCFG_USBPWRFAULT_DEDICATED << - SCFG_USBPWRFAULT_USB2_SHIFT) | - (SCFG_USBPWRFAULT_SHARED << - SCFG_USBPWRFAULT_USB1_SHIFT); - out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); + out_be32(&scfg->rcwpmuxcr0, 0x3333); + out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); + usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << + SCFG_USBPWRFAULT_USB3_SHIFT) | + (SCFG_USBPWRFAULT_DEDICATED << + SCFG_USBPWRFAULT_USB2_SHIFT) | + (SCFG_USBPWRFAULT_SHARED << + SCFG_USBPWRFAULT_USB1_SHIFT); + out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); #endif - + } return 0; }
@@ -152,6 +158,16 @@ int misc_init_r(void) } #endif
+void fdt_del_qe(void *blob) +{ + int nodeoff = 0; + + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, + "fsl,qe")) >= 0) { + fdt_del_node(blob, nodeoff); + } +} + int ft_board_setup(void *blob, bd_t *bd) { u64 base[CONFIG_NR_DRAM_BANKS]; @@ -169,6 +185,23 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_fman_ethernet(blob); #endif + + /* + * qe-hdlc and usb multi-use the pins, + * when set hwconfig to qe-hdlc, delete usb node. + */ + if (hwconfig("qe-hdlc")) +#ifdef CONFIG_HAS_FSL_XHCI_USB + fdt_del_node_and_alias(blob, "usb1"); +#endif + /* + * qe just support qe-uart and qe-hdlc, + * if qe-uart and qe-hdlc are not set in hwconfig, + * delete qe node. + */ + if (!hwconfig("qe-uart") && !hwconfig("qe-hdlc")) + fdt_del_qe(blob); + return 0; }
-----Original Message----- From: Zhao Qiang [mailto:qiang.zhao@nxp.com] Sent: Friday, January 29, 2016 12:28 PM To: Mingkai Hu Cc: trini@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao Subject: [PATCH v4 4/4] qe: assgin pins to qe-hdlc
qe-hdlc and usb multi-use the pins, when set hwconfig=qe-hdlc, assign the pins to qe-hdlc, if not, assgin it to usb
Signed-off-by: Zhao Qiang qiang.zhao@nxp.com
board/freescale/ls1043ardb/ls1043ardb.c | 53 ++++++++++++++++++++++++++-
1 file changed, 43 insertions(+), 10 deletions(-)
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index c2d4887..7ba72f8 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -114,18 +114,24 @@ int config_board_mux(void) struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; u32 usb_pwrfault;
- if (hwconfig("qe-hdlc")) {
out_be32(&scfg->rcwpmuxcr0,(in_be32(&scfg->rcwpmuxcr0) & ~0xff00) | 0x6600);printf("Assign to qe-hdlc clk, rcwpmuxcr0=%x\n",in_be32(&scfg->rcwpmuxcr0));- } else {
#ifdef CONFIG_HAS_FSL_XHCI_USB
- out_be32(&scfg->rcwpmuxcr0, 0x3333);
- out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1);
- usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED <<
SCFG_USBPWRFAULT_USB3_SHIFT) |(SCFG_USBPWRFAULT_DEDICATED <<SCFG_USBPWRFAULT_USB2_SHIFT) |(SCFG_USBPWRFAULT_SHARED <<SCFG_USBPWRFAULT_USB1_SHIFT);- out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault);
out_be32(&scfg->rcwpmuxcr0, 0x3333);out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1);usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED <<SCFG_USBPWRFAULT_USB3_SHIFT) |(SCFG_USBPWRFAULT_DEDICATED <<SCFG_USBPWRFAULT_USB2_SHIFT) |(SCFG_USBPWRFAULT_SHARED <<SCFG_USBPWRFAULT_USB1_SHIFT);out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault);#endif
- } return 0;
}
@@ -152,6 +158,16 @@ int misc_init_r(void) } #endif
+void fdt_del_qe(void *blob) +{
- int nodeoff = 0;
- while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
"fsl,qe")) >= 0) {fdt_del_node(blob, nodeoff);- }
+}
int ft_board_setup(void *blob, bd_t *bd) { u64 base[CONFIG_NR_DRAM_BANKS]; @@ -169,6 +185,23 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_fman_ethernet(blob); #endif
- /*
* qe-hdlc and usb multi-use the pins,* when set hwconfig to qe-hdlc, delete usb node.*/- if (hwconfig("qe-hdlc"))
+#ifdef CONFIG_HAS_FSL_XHCI_USB
fdt_del_node_and_alias(blob, "usb1"); #endif- /*
* qe just support qe-uart and qe-hdlc,* if qe-uart and qe-hdlc are not set in hwconfig,* delete qe node.*/- if (!hwconfig("qe-uart") && !hwconfig("qe-hdlc"))
fdt_del_qe(blob);- return 0;
}
-- 2.1.0.27.g96db324
Reviewed-by: Mingkai Hu mingkai.hu@nxp.com
Regards, Mingkai
participants (2)
-
Mingkai Hu -
Zhao Qiang