[U-Boot] [PATCH 0/2] Rockchip: USB: added usb phy control to support fastboot
This series adds support for fastboot related to USB.
[PATCH 1/2] fixed max packet size check error for ep_in in high speed condition
[PATCH 2/2] add usb phy control to support fastboot for rk3036
Tested on RK3036 SDK board, it works Okay.
board/evb_rk3036/evb_rk3036/evb_rk3036.c | 27 ++++++++++++++++++++++ drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/rk_udc_otg_phy.c | 36 ++++++++++++++++++++++++++++++ drivers/usb/gadget/s3c_udc_otg.c | 4 ++-- include/configs/rk3036_common.h | 19 ++++++++++++++++ 5 files changed, 85 insertions(+), 2 deletions(-) create mode 100644 drivers/usb/gadget/rk_udc_otg_phy.c
In current fastboot frame, both full and high speed use 'fs_ep_in', but fs_ep_in.wMaxPacketSize is configurated 64 bytes as default, I do not understand why high speed TX max packet size is also set as 64 bytes, so I changed the condition from '!=' to '>' as a workaround.
Signed-off-by: Frank Wang frank.wang@rock-chips.com --- drivers/usb/gadget/s3c_udc_otg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 7a2d1e7..b2d3988 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -556,8 +556,8 @@ static int s3c_ep_enable(struct usb_ep *_ep, }
/* hardware _could_ do smaller, but driver doesn't */ - if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK - && le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) != + if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK && + le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) > ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
debug("%s: bad %s maxpacket\n", __func__, _ep->name);
Hi Frank,
In current fastboot frame, both full and high speed use 'fs_ep_in', but fs_ep_in.wMaxPacketSize is configurated 64 bytes as default,
Because 64 bytes is the smallest possible packet size.
I do not understand why high speed TX max packet size is also set as 64 bytes,
According to struct s3c_udc @ s3c_udc_otg.c only the EP0 has maxpacket set to 64 bytes. Rest is set to 512B.
Frank could you shed some light on conditions when this error shows up? Some logs/condition of operation could be helpful.
so I changed the condition from '!=' to '>' as a workaround.
Instead of applying workaround, lets focus on your problem.
Signed-off-by: Frank Wang frank.wang@rock-chips.com
drivers/usb/gadget/s3c_udc_otg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 7a2d1e7..b2d3988 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -556,8 +556,8 @@ static int s3c_ep_enable(struct usb_ep *_ep, }
/* hardware _could_ do smaller, but driver doesn't */
- if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
&& le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) !=
- if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) > ep_maxpacket(ep))|| !get_unaligned(&desc->wMaxPacketSize)) { debug("%s: bad %s maxpacket\n", __func__, _ep->name);
Hi Lukasz,
Sorry to reply you so late.
The issue occur at below case, I have also attached some logs.
fastboot_set_alt()--> usb_ep_enable(fs_ep_in) --> s3c_ep_enable()
=> => fastboot 0 s3c_udc_probe: 9ffaf938 0 s3c_alloc_request: ep0-control 9ffb176c Reseting OTG controller 0 0 Reseting OTG controller 0 0 0 nuke: ep0-control 9ffb176c pkt = 8006000100004000 0
*** s3c_queue: ep0-control-in req = 9df7adc0, len = 18, buf = 9df7cd80 empty = 1, stopped = 0 pkt = 1201000202020040 0722060099990102 0301 0 done: ep0-control 9ffb176c, req = 9df7adc0, stopped = 0 calling complete callback pkt[18] = 1201000202020040 0722060099990102 0301 callback completed 0 0 Reseting OTG controller 0 0 0 nuke: ep0-control 9ffb176c pkt = 0005040000000000 0 0 nuke: ep0-control 9ffb176c pkt = 8006000100001200 0
*** s3c_queue: ep0-control-in req = 9df7adc0, len = 18, buf = 9df7cd80 empty = 1, stopped = 0 pkt = 1201000202020040 0722060099990102 0301 0 done: ep0-control 9ffb176c, req = 9df7adc0, stopped = 0 calling complete callback pkt[18] = 1201000202020040 0722060099990102 0301 callback completed 0 0 nuke: ep0-control 9ffb176c pkt = 800600020000ff00 0
*** s3c_queue: ep0-control-in req = 9df7adc0, len = 32, buf = 9df7cd80 empty = 1, stopped = 0 pkt = 09022000010102c0 000904000002ff42 0304070581024000 0007050202000200 0 done: ep0-control 9ffb176c, req = 9df7adc0, stopped = 0 calling complete callback pkt[32] = 09022000010102c0 000904000002ff42 0304070581024000 0007050202000200 callback completed 0 0 nuke: ep0-control 9ffb176c pkt = 800600030000ff00 0
*** s3c_queue: ep0-control-in req = 9df7adc0, len = 4, buf = 9df7cd80 empty = 1, stopped = 0 pkt = 04030904 0 done: ep0-control 9ffb176c, req = 9df7adc0, stopped = 0 calling complete callback pkt[4] = 04030904 callback completed 0 0 nuke: ep0-control 9ffb176c pkt = 8006000100001200 0
*** s3c_queue: ep0-control-in req = 9df7adc0, len = 18, buf = 9df7cd80 empty = 1, stopped = 0 pkt = 1201000202020040 0722060099990102 0301 0 done: ep0-control 9ffb176c, req = 9df7adc0, stopped = 0 calling complete callback pkt[18] = 1201000202020040 0722060099990102 0301 callback completed 0 0 nuke: ep0-control 9ffb176c pkt = 8006000100001200 0
*** s3c_queue: ep0-control-in req = 9df7adc0, len = 18, buf = 9df7cd80 empty = 1, stopped = 0 pkt = 1201000202020040 0722060099990102 0301 0 done: ep0-control 9ffb176c, req = 9df7adc0, stopped = 0 calling complete callback pkt[18] = 1201000202020040 0722060099990102 0301 callback completed 0 0 nuke: ep0-control 9ffb176c pkt = 8006000200000900 0
*** s3c_queue: ep0-control-in req = 9df7adc0, len = 9, buf = 9df7cd80 empty = 1, stopped = 0 pkt = 09022000010102c0 00 0 done: ep0-control 9ffb176c, req = 9df7adc0, stopped = 0 calling complete callback pkt[9] = 09022000010102c0 00 callback completed 0 0 nuke: ep0-control 9ffb176c pkt = 8006000200002000 0
*** s3c_queue: ep0-control-in req = 9df7adc0, len = 32, buf = 9df7cd80 empty = 1, stopped = 0 pkt = 09022000010102c0 000904000002ff42 0304070581024000 0007050202000200 0 done: ep0-control 9ffb176c, req = 9df7adc0, stopped = 0 calling complete callback pkt[32] = 09022000010102c0 000904000002ff42 0304070581024000 0007050202000200 callback completed 0 0 nuke: ep0-control 9ffb176c pkt = 8000000000000200 crq->brequest:0x0 0 0 0 nuke: ep0-control 9ffb176c pkt = 0009010000000000 fastboot_set_alt: func: f_fastboot intf: 0 alt: 0 s3c_ep_enable: 9ffb1804 s3c_udc_set_nak: ep_num = 2, ep_type = 1 s3c_udc_set_nak: set NAK, DOEPCTL2 = 0x40020000 s3c_udc_set_halt: ep_num = 2, value = 0 0 s3c_udc_ep_clear_stall: ep_num = 2, ep_type = 1 s3c_udc_ep_clear_stall: cleared stall, DOEPCTL2 = 0x40020000 0 s3c_udc_ep_activate: EPCTRL2 = 0x40020000, ep_is_in = 0 s3c_udc_ep_activate: USB Ative EP2, DOEPCTRL2 = 0x400a8200 s3c_udc_ep_activate: DAINTMSK = 0x50001 s3c_ep_enable: enabled ep2out-bulk, stopped = 0, maxpacket = 512 s3c_alloc_request: ep2out-bulk 9ffb1804 s3c_ep_enable: 9ffb17b8 s3c_ep_enable: desc->wMaxPacketSize=64, ep->maxpacket=512 s3c_ep_enable: bad ep1in-bulk maxpacket failed to enable in ep s3c_ep_disable: 9ffb1804 0 nuke: ep2out-bulk 9ffb1804 s3c_ep_disable: disabled ep2out-bulk s3c_ep_disable: 9ffb17b8 s3c_ep_disable: ep1in-bulk not enabled s3c_free_request: 9ffb1804 s3c_ep_disable: 9ffb1804 s3c_ep_disable: ep2out-bulk not enabled s3c_ep_disable: 9ffb17b8 s3c_ep_disable: ep1in-bulk not enabled 0 nuke: ep0-control 9ffb176c pkt = 8006000100001200 0
BR. Frank -----邮件原件----- 发件人: Lukasz Majewski [mailto:l.majewski@samsung.com] 发送时间: 2015年12月7日 20:58 收件人: Frank Wang 抄送: marex@denx.de; trini@konsulko.com; u-boot@lists.denx.de; benchan@chromium.org; kmixter@chromium.org; sjg@chromium.org; cf@rock-chips. com 主题: Re: [PATCH 1/2] usb: gadget: s3c_udc_otg: fixed max packet size check for ep_in in high speed
Hi Frank,
In current fastboot frame, both full and high speed use 'fs_ep_in', but fs_ep_in.wMaxPacketSize is configurated 64 bytes as default,
Because 64 bytes is the smallest possible packet size.
I do not understand why high speed TX max packet size is also set as 64 bytes,
According to struct s3c_udc @ s3c_udc_otg.c only the EP0 has maxpacket set to 64 bytes. Rest is set to 512B.
Frank could you shed some light on conditions when this error shows up? Some logs/condition of operation could be helpful.
so I changed the condition from '!=' to '>' as a workaround.
Instead of applying workaround, lets focus on your problem.
Signed-off-by: Frank Wang frank.wang@rock-chips.com
drivers/usb/gadget/s3c_udc_otg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 7a2d1e7..b2d3988 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -556,8 +556,8 @@ static int s3c_ep_enable(struct usb_ep *_ep, }
/* hardware _could_ do smaller, but driver doesn't */
- if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
&& le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) !=
- if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) > ep_maxpacket(ep))|| !get_unaligned(&desc->wMaxPacketSize)) { debug("%s: bad %s maxpacket\n", __func__, _ep->name);
Used s3c usb otg device driver frame and added USB PHY handle function.
Signed-off-by: Frank Wang frank.wang@rock-chips.com --- board/evb_rk3036/evb_rk3036/evb_rk3036.c | 27 ++++++++++++++++++++++ drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/rk_udc_otg_phy.c | 36 ++++++++++++++++++++++++++++++ include/configs/rk3036_common.h | 19 ++++++++++++++++ 4 files changed, 83 insertions(+) create mode 100644 drivers/usb/gadget/rk_udc_otg_phy.c
diff --git a/board/evb_rk3036/evb_rk3036/evb_rk3036.c b/board/evb_rk3036/evb_rk3036/evb_rk3036.c index 52d45e5..16e1d1a 100644 --- a/board/evb_rk3036/evb_rk3036/evb_rk3036.c +++ b/board/evb_rk3036/evb_rk3036/evb_rk3036.c @@ -9,6 +9,11 @@ #include <common.h> #include <dm.h>
+#ifdef CONFIG_USB_GADGET +#include <usb.h> +#include <usb/s3c_udc.h> +#endif + DECLARE_GLOBAL_DATA_PTR;
void get_ddr_config(struct rk3036_ddr_config *config) @@ -46,3 +51,25 @@ void enable_caches(void) dcache_enable(); } #endif + +#ifdef CONFIG_USB_GADGET +#define RKIO_GRF_PHYS 0x20008000 +#define RKIO_USBOTG_BASE 0x10180000 + +static struct s3c_plat_otg_data rk_otg_data = { + .regs_phy = RKIO_GRF_PHYS, + .regs_otg = RKIO_USBOTG_BASE +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + debug("%s: performing s3c_udc_probe\n", __func__); + return s3c_udc_probe(&rk_otg_data); +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + debug("%s\n", __func__); + return 0; +} +#endif diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 6288ecf..4374236 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -13,6 +13,7 @@ ifdef CONFIG_USB_GADGET obj-$(CONFIG_USB_GADGET_AT91) += at91_udc.o obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o +obj-$(CONFIG_USB_GADGET_RK_UDC_OTG_PHY) += rk_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o diff --git a/drivers/usb/gadget/rk_udc_otg_phy.c b/drivers/usb/gadget/rk_udc_otg_phy.c new file mode 100644 index 0000000..ddf4718 --- /dev/null +++ b/drivers/usb/gadget/rk_udc_otg_phy.c @@ -0,0 +1,36 @@ +/* + * Copyright 2015 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <common.h> +#include <asm/io.h> + +#include <usb/s3c_udc.h> + +/* UOC control */ +#define GRF_UOC0_CON5 0x017c +#define GRF_UOC1_CON4 0x0190 + +void otg_phy_init(struct s3c_udc *dev) +{ + /* Disable usb-uart bypass */ + writel(0x34000000, (dev->pdata->regs_phy + GRF_UOC0_CON5)); + + /* Phy PLL recovering */ + writel(0x00030001, (dev->pdata->regs_phy + GRF_UOC0_CON5)); + mdelay(10); + writel(0x00030002, (dev->pdata->regs_phy + GRF_UOC0_CON5)); + mdelay(500); +} + +void otg_phy_off(struct s3c_udc *dev) +{ + /* usbphy0 bypass disable and otg enable */ + writel(0x34000000, (dev->pdata->regs_phy + GRF_UOC0_CON5)); + + /* usb phy enter suspend */ + writel(0x007f0055, (dev->pdata->regs_phy + GRF_UOC0_CON5)); +} diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 34c8f35..8344d6c 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -59,6 +59,25 @@ #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART
+/* FASTBOOT */ +#define CONFIG_CMD_FASTBOOT +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_RK_UDC_OTG_PHY +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_USB_GADGET_VBUS_DRAW 0 +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_G_DNL_MANUFACTURER "Rockchip" +#define CONFIG_G_DNL_VENDOR_NUM 0x2207 +#define CONFIG_G_DNL_PRODUCT_NUM 0x0006 + /* RAW SD card / eMMC locations. */ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
On Friday, December 04, 2015 at 10:36:34 AM, Frank Wang wrote:
Used s3c usb otg device driver frame and added USB PHY handle function.
Signed-off-by: Frank Wang frank.wang@rock-chips.com
board/evb_rk3036/evb_rk3036/evb_rk3036.c | 27 ++++++++++++++++++++++ drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/rk_udc_otg_phy.c | 36 ++++++++++++++++++++++++++++++ include/configs/rk3036_common.h | 19 ++++++++++++++++ 4 files changed, 83 insertions(+) create mode 100644 drivers/usb/gadget/rk_udc_otg_phy.c
diff --git a/board/evb_rk3036/evb_rk3036/evb_rk3036.c b/board/evb_rk3036/evb_rk3036/evb_rk3036.c index 52d45e5..16e1d1a 100644 --- a/board/evb_rk3036/evb_rk3036/evb_rk3036.c +++ b/board/evb_rk3036/evb_rk3036/evb_rk3036.c @@ -9,6 +9,11 @@ #include <common.h> #include <dm.h>
+#ifdef CONFIG_USB_GADGET +#include <usb.h> +#include <usb/s3c_udc.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
void get_ddr_config(struct rk3036_ddr_config *config) @@ -46,3 +51,25 @@ void enable_caches(void) dcache_enable(); } #endif
+#ifdef CONFIG_USB_GADGET +#define RKIO_GRF_PHYS 0x20008000 +#define RKIO_USBOTG_BASE 0x10180000
You already have those values in DT, right ? I think you should really probe this driver from DT then (or ev. adjust the driver to probe from DT).
+static struct s3c_plat_otg_data rk_otg_data = {
- .regs_phy = RKIO_GRF_PHYS,
- .regs_otg = RKIO_USBOTG_BASE
+};
+int board_usb_init(int index, enum usb_init_type init) +{
- debug("%s: performing s3c_udc_probe\n", __func__);
- return s3c_udc_probe(&rk_otg_data);
+}
+int board_usb_cleanup(int index, enum usb_init_type init) +{
- debug("%s\n", __func__);
- return 0;
+} +#endif diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 6288ecf..4374236 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -13,6 +13,7 @@ ifdef CONFIG_USB_GADGET obj-$(CONFIG_USB_GADGET_AT91) += at91_udc.o obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o +obj-$(CONFIG_USB_GADGET_RK_UDC_OTG_PHY) += rk_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o diff --git a/drivers/usb/gadget/rk_udc_otg_phy.c b/drivers/usb/gadget/rk_udc_otg_phy.c new file mode 100644 index 0000000..ddf4718 --- /dev/null +++ b/drivers/usb/gadget/rk_udc_otg_phy.c @@ -0,0 +1,36 @@ +/*
- Copyright 2015 Rockchip Electronics Co., Ltd
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <config.h> +#include <common.h> +#include <asm/io.h>
+#include <usb/s3c_udc.h>
+/* UOC control */ +#define GRF_UOC0_CON5 0x017c +#define GRF_UOC1_CON4 0x0190
+void otg_phy_init(struct s3c_udc *dev) +{
- /* Disable usb-uart bypass */
- writel(0x34000000, (dev->pdata->regs_phy + GRF_UOC0_CON5));
- /* Phy PLL recovering */
- writel(0x00030001, (dev->pdata->regs_phy + GRF_UOC0_CON5));
- mdelay(10);
- writel(0x00030002, (dev->pdata->regs_phy + GRF_UOC0_CON5));
- mdelay(500);
+}
+void otg_phy_off(struct s3c_udc *dev) +{
- /* usbphy0 bypass disable and otg enable */
- writel(0x34000000, (dev->pdata->regs_phy + GRF_UOC0_CON5));
- /* usb phy enter suspend */
- writel(0x007f0055, (dev->pdata->regs_phy + GRF_UOC0_CON5));
+} diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 34c8f35..8344d6c 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -59,6 +59,25 @@ #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART
+/* FASTBOOT */ +#define CONFIG_CMD_FASTBOOT +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_RK_UDC_OTG_PHY +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_USB_GADGET_VBUS_DRAW 0 +#define CONFIG_SYS_CACHELINE_SIZE 64
This cacheline size thing should not be here. If this is really needed, it should be in the architecture headers (in arch/arm/mach-rockchip or so).
+#define CONFIG_G_DNL_MANUFACTURER "Rockchip" +#define CONFIG_G_DNL_VENDOR_NUM 0x2207 +#define CONFIG_G_DNL_PRODUCT_NUM 0x0006
/* RAW SD card / eMMC locations. */ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
On Friday, December 04, 2015 at 10:36:32 AM, Frank Wang wrote:
This series adds support for fastboot related to USB.
[PATCH 1/2] fixed max packet size check error for ep_in in high speed condition
[PATCH 2/2] add usb phy control to support fastboot for rk3036
Tested on RK3036 SDK board, it works Okay.
I submitted a series [1] about a day ago which renames the s3c driver to dwc2. You should update your series based on that. To make things easier, just wait a bit until this lands in u-boot-usb .
Sorry for the hassle.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/243401
Best regards, Marek Vasut
Hi Frank,
On 4 December 2015 at 11:28, Marek Vasut marex@denx.de wrote:
On Friday, December 04, 2015 at 10:36:32 AM, Frank Wang wrote:
This series adds support for fastboot related to USB.
[PATCH 1/2] fixed max packet size check error for ep_in in high speed condition
[PATCH 2/2] add usb phy control to support fastboot for rk3036
Tested on RK3036 SDK board, it works Okay.
I submitted a series [1] about a day ago which renames the s3c driver to dwc2. You should update your series based on that. To make things easier, just wait a bit until this lands in u-boot-usb .
Sorry for the hassle.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/243401
Are you planning to respin this series? I'd like to apply it for -next.
Regards, Simon
On Saturday, December 19, 2015 at 09:30:09 PM, Simon Glass wrote:
Hi Frank,
On 4 December 2015 at 11:28, Marek Vasut marex@denx.de wrote:
On Friday, December 04, 2015 at 10:36:32 AM, Frank Wang wrote:
This series adds support for fastboot related to USB.
[PATCH 1/2] fixed max packet size check error for ep_in in high speed condition
[PATCH 2/2] add usb phy control to support fastboot for rk3036
Tested on RK3036 SDK board, it works Okay.
I submitted a series [1] about a day ago which renames the s3c driver to dwc2. You should update your series based on that. To make things easier, just wait a bit until this lands in u-boot-usb .
Sorry for the hassle.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/243401
Are you planning to respin this series? I'd like to apply it for -next.
Are you now picking USB patches too ? ;-) S3C was recently renamed it dwc2, so you might want to respin the series anyway. In this case, it's a simple matter of s/s3c/dwc2/g .
Best regards, Marek Vasut
Hi Marek,
On 19 December 2015 at 14:23, Marek Vasut marex@denx.de wrote:
On Saturday, December 19, 2015 at 09:30:09 PM, Simon Glass wrote:
Hi Frank,
On 4 December 2015 at 11:28, Marek Vasut marex@denx.de wrote:
On Friday, December 04, 2015 at 10:36:32 AM, Frank Wang wrote:
This series adds support for fastboot related to USB.
[PATCH 1/2] fixed max packet size check error for ep_in in high speed condition
[PATCH 2/2] add usb phy control to support fastboot for rk3036
Tested on RK3036 SDK board, it works Okay.
I submitted a series [1] about a day ago which renames the s3c driver to dwc2. You should update your series based on that. To make things easier, just wait a bit until this lands in u-boot-usb .
Sorry for the hassle.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/243401
Are you planning to respin this series? I'd like to apply it for -next.
Are you now picking USB patches too ? ;-) S3C was recently renamed it dwc2, so you might want to respin the series anyway. In this case, it's a simple matter of s/s3c/dwc2/g .
Not really, it is just that it appeared in my patchwork queue. I'm happy for you to pick it up.
Regards, Simon
On Saturday, December 19, 2015 at 11:25:12 PM, Simon Glass wrote:
Hi Marek,
On 19 December 2015 at 14:23, Marek Vasut marex@denx.de wrote:
On Saturday, December 19, 2015 at 09:30:09 PM, Simon Glass wrote:
Hi Frank,
On 4 December 2015 at 11:28, Marek Vasut marex@denx.de wrote:
On Friday, December 04, 2015 at 10:36:32 AM, Frank Wang wrote:
This series adds support for fastboot related to USB.
[PATCH 1/2] fixed max packet size check error for ep_in in high speed condition
[PATCH 2/2] add usb phy control to support fastboot for rk3036
Tested on RK3036 SDK board, it works Okay.
I submitted a series [1] about a day ago which renames the s3c driver to dwc2. You should update your series based on that. To make things easier, just wait a bit until this lands in u-boot-usb .
Sorry for the hassle.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/243401
Are you planning to respin this series? I'd like to apply it for -next.
Are you now picking USB patches too ? ;-) S3C was recently renamed it dwc2, so you might want to respin the series anyway. In this case, it's a simple matter of s/s3c/dwc2/g .
Not really, it is just that it appeared in my patchwork queue. I'm happy for you to pick it up.
Looks like the patchwork distribution doesn't work quite well ;-) btw. it'd be nice if this was updated to u-boot/master due to the dwc2 change. I can do it during application, but I cannot test it.
Best regards, Marek Vasut
On Sat, Dec 19, 2015 at 11:57:26PM +0100, Marek Vasut wrote:
On Saturday, December 19, 2015 at 11:25:12 PM, Simon Glass wrote:
Hi Marek,
On 19 December 2015 at 14:23, Marek Vasut marex@denx.de wrote:
On Saturday, December 19, 2015 at 09:30:09 PM, Simon Glass wrote:
Hi Frank,
On 4 December 2015 at 11:28, Marek Vasut marex@denx.de wrote:
On Friday, December 04, 2015 at 10:36:32 AM, Frank Wang wrote:
This series adds support for fastboot related to USB.
[PATCH 1/2] fixed max packet size check error for ep_in in high speed condition
[PATCH 2/2] add usb phy control to support fastboot for rk3036
Tested on RK3036 SDK board, it works Okay.
I submitted a series [1] about a day ago which renames the s3c driver to dwc2. You should update your series based on that. To make things easier, just wait a bit until this lands in u-boot-usb .
Sorry for the hassle.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/243401
Are you planning to respin this series? I'd like to apply it for -next.
Are you now picking USB patches too ? ;-) S3C was recently renamed it dwc2, so you might want to respin the series anyway. In this case, it's a simple matter of s/s3c/dwc2/g .
Not really, it is just that it appeared in my patchwork queue. I'm happy for you to pick it up.
Looks like the patchwork distribution doesn't work quite well ;-)
It works better when everyone looks at it more often, yes ;). I usually delegate things that don't look to be "core" but rather "soc" changes to the SoC custodian in question.
On Monday, December 21, 2015 at 04:04:14 AM, Tom Rini wrote:
On Sat, Dec 19, 2015 at 11:57:26PM +0100, Marek Vasut wrote:
On Saturday, December 19, 2015 at 11:25:12 PM, Simon Glass wrote:
Hi Marek,
On 19 December 2015 at 14:23, Marek Vasut marex@denx.de wrote:
On Saturday, December 19, 2015 at 09:30:09 PM, Simon Glass wrote:
Hi Frank,
On 4 December 2015 at 11:28, Marek Vasut marex@denx.de wrote:
On Friday, December 04, 2015 at 10:36:32 AM, Frank Wang wrote: > This series adds support for fastboot related to USB. > > [PATCH 1/2] fixed max packet size check error for ep_in in high > speed condition > > [PATCH 2/2] add usb phy control to support fastboot for rk3036 > > Tested on RK3036 SDK board, it works Okay.
I submitted a series [1] about a day ago which renames the s3c driver to dwc2. You should update your series based on that. To make things easier, just wait a bit until this lands in u-boot-usb .
Sorry for the hassle.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/243401
Are you planning to respin this series? I'd like to apply it for -next.
Are you now picking USB patches too ? ;-) S3C was recently renamed it dwc2, so you might want to respin the series anyway. In this case, it's a simple matter of s/s3c/dwc2/g .
Not really, it is just that it appeared in my patchwork queue. I'm happy for you to pick it up.
Looks like the patchwork distribution doesn't work quite well ;-)
It works better when everyone looks at it more often, yes ;). I usually delegate things that don't look to be "core" but rather "soc" changes to the SoC custodian in question.
But patchwork is a pain in the bu...ackside to use. That's probably why noone looks at it that often ;-)
Best regards, Marek Vasut
participants (5)
-
Frank Wang -
Lukasz Majewski -
Marek Vasut -
Simon Glass -
Tom Rini