[PATCH 0/9] TI: AM654/J721e: Add support to boot from OSPI
This series adds support to boot from OSPI on TI's AM654 and J721e SoCs. These EVMs have Micron MT35x flash and works in 1-1-8 mode.
Lokesh Vutla (1): ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFW
Vignesh Raghavendra (8): drivers: Descend to drivers/soc unconditionally ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMU ARM: dts: k3-am65: Add OSPI DT nodes ARM: dts: k3-j721e: Add OSPI DT nodes configs: am65x_evm: Setup mtdparts for OSPI configs: j721e_evm: Setup mtdparts for OSPI configs: j721e_evm_defconfig: Enable OSPI configs configs: am65x_evm_defconfig: Enable OSPI configs
arch/arm/dts/k3-am65-mcu.dtsi | 38 ++++++++++++++++++ arch/arm/dts/k3-am65.dtsi | 13 ++++++- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 19 +++++++++ arch/arm/dts/k3-am654-base-board.dts | 36 +++++++++++++++++ arch/arm/dts/k3-am654-r5-base-board.dts | 39 +++++++++++++++++++ .../k3-j721e-common-proc-board-u-boot.dtsi | 16 ++++++++ arch/arm/dts/k3-j721e-common-proc-board.dts | 33 ++++++++++++++++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 31 +++++++++++++++ .../arm/dts/k3-j721e-r5-common-proc-board.dts | 39 +++++++++++++++++++ arch/arm/dts/k3-j721e-som-p0.dtsi | 36 +++++++++++++++++ arch/arm/dts/k3-j721e.dtsi | 2 + arch/arm/mach-k3/Kconfig | 8 ++++ arch/arm/mach-k3/arm64-mmu.c | 7 ++++ arch/arm/mach-k3/sysfw-loader.c | 31 ++++++++++++++- configs/am65x_evm_a53_defconfig | 25 ++++++++++++ configs/am65x_evm_r5_defconfig | 17 ++++++++ configs/j721e_evm_a72_defconfig | 9 ++++- configs/j721e_evm_r5_defconfig | 7 ++++ drivers/Makefile | 3 +- include/configs/am65x_evm.h | 21 +++++++++- include/configs/j721e_evm.h | 14 ++++++- 21 files changed, 436 insertions(+), 8 deletions(-)
Descend to drivers/soc directory unconditionally for SPL and U-Boot builds. Individual drivers can have their own config to check what needs to be built for SPL. There should be no increase in SPL code size due to this change.
This is required on K3 SoCs to support DMA in SPL.
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com --- drivers/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/Makefile b/drivers/Makefile index 23501fd74388..420875042896 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -107,7 +107,6 @@ obj-y += reset/ obj-y += input/ # SOC specific infrastructure drivers. obj-y += smem/ -obj-y += soc/ obj-y += thermal/ obj-$(CONFIG_TEE) += tee/ obj-y += axi/ @@ -119,3 +118,5 @@ obj-$(CONFIG_MACH_PIC32) += ddr/microchip/ obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock/ obj-$(CONFIG_DM_RNG) += rng/ endif + +obj-y += soc/
On Wed, Jan 29, 2020 at 05:48:47PM +0530, Vignesh Raghavendra wrote:
Descend to drivers/soc directory unconditionally for SPL and U-Boot builds. Individual drivers can have their own config to check what needs to be built for SPL. There should be no increase in SPL code size due to this change.
This is required on K3 SoCs to support DMA in SPL.
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com
Reviewed-by: Tom Rini trini@konsulko.com
Populate address mapping entries in A53 MMU for 4 GB of MMIO space reserved for providing MMIO access to multiple flash devices through OSPI/HBMC IPs within FSS.
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com --- arch/arm/mach-k3/arm64-mmu.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c index 7f908eee803b..b1d1d6e494fc 100644 --- a/arch/arm/mach-k3/arm64-mmu.c +++ b/arch/arm/mach-k3/arm64-mmu.c @@ -49,6 +49,13 @@ struct mm_region am654_mem_map[NR_MMU_REGIONS] = { .size = 0x80000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x500000000UL, + .phys = 0x500000000UL, + .size = 0x400000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { /* List terminator */ 0,
From: Lokesh Vutla lokeshvutla@ti.com
Since ROM configures OSPI controller to be in memory mapped mode in OSPI boot, R5 SPL can directly pass the memory mapped pointer to ROM. With this ROM can directly pull the SYSFW image from OSPI.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Vignesh Raghavendra vigneshr@ti.com --- arch/arm/mach-k3/Kconfig | 8 ++++++++ arch/arm/mach-k3/sysfw-loader.c | 31 ++++++++++++++++++++++++++++++- 2 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 2e111bbf27ee..c98a5c66749f 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -126,6 +126,14 @@ config K3_SYSFW_IMAGE_SIZE_MAX tree blob. Keep it as tight as possible, as this directly affects the overall SPL memory footprint.
+config K3_SYSFW_IMAGE_SPI_OFFS + hex "SPI offset of SYSFW firmware and configuration blob" + depends on K3_LOAD_SYSFW + default 0x6C0000 + help + Offset of the combined System Firmware and configuration image tree + blob to be loaded when booting from a SPI flash memory. + config SYS_K3_SPL_ATF bool "Start Cortex-A from SPL" depends on SPL && CPU_V7R diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c index 94dbeb9437d9..3677a37f55a2 100644 --- a/arch/arm/mach-k3/sysfw-loader.c +++ b/arch/arm/mach-k3/sysfw-loader.c @@ -14,6 +14,8 @@ #include <g_dnl.h> #include <usb.h> #include <dfu.h> +#include <dm/uclass-internal.h> +#include <spi_flash.h>
#include <asm/arch/sys_proto.h> #include "common.h" @@ -197,12 +199,32 @@ exit: } #endif
+#if CONFIG_IS_ENABLED(SPI_LOAD) +static void *k3_sysfw_get_spi_addr(void) +{ + struct udevice *dev; + fdt_addr_t addr; + int ret; + + ret = uclass_find_device_by_seq(UCLASS_SPI, CONFIG_SF_DEFAULT_BUS, + true, &dev); + if (ret) + return NULL; + + addr = dev_read_addr_index(dev, 1); + if (addr == FDT_ADDR_T_NONE) + return NULL; + + return (void *)(addr + CONFIG_K3_SYSFW_IMAGE_SPI_OFFS); +} +#endif + void k3_sysfw_loader(void (*config_pm_done_callback)(void)) { struct spl_image_info spl_image = { 0 }; struct spl_boot_device bootdev = { 0 }; struct ti_sci_handle *ti_sci; - int ret; + int ret = 0;
/* Reserve a block of aligned memory for loading the SYSFW image */ sysfw_load_address = memalign(ARCH_DMA_MINALIGN, @@ -243,6 +265,13 @@ void k3_sysfw_loader(void (*config_pm_done_callback)(void)) #endif break; #endif +#if CONFIG_IS_ENABLED(SPI_LOAD) + case BOOT_DEVICE_SPI: + sysfw_load_address = k3_sysfw_get_spi_addr(); + if (!sysfw_load_address) + ret = -ENODEV; + break; +#endif #if CONFIG_IS_ENABLED(YMODEM_SUPPORT) case BOOT_DEVICE_UART: #ifdef CONFIG_K3_EARLY_CONS
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support OSPI boot.
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com --- arch/arm/dts/k3-am65-mcu.dtsi | 38 +++++++++++++++++++ arch/arm/dts/k3-am65.dtsi | 13 ++++++- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 19 ++++++++++ arch/arm/dts/k3-am654-base-board.dts | 36 ++++++++++++++++++ arch/arm/dts/k3-am654-r5-base-board.dts | 39 ++++++++++++++++++++ 5 files changed, 143 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi index c42e7553c78f..bc9a87210da9 100644 --- a/arch/arm/dts/k3-am65-mcu.dtsi +++ b/arch/arm/dts/k3-am65-mcu.dtsi @@ -64,4 +64,42 @@ loczrama = <1>; }; }; + + fss: fss@47000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x0 0x47040000 0x0 0x100>, + <0x5 0x00000000 0x1 0x0000000>; + interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 248 0>; + assigned-clocks = <&k3_clks 248 0>; + assigned-clock-parents = <&k3_clks 248 2>; + assigned-clock-rates = <166666666>; + power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; + + ospi1: spi@47050000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x0 0x47050000 0x0 0x100>, + <0x7 0x00000000 0x1 0x00000000>; + interrupts = <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 249 6>; + power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; diff --git a/arch/arm/dts/k3-am65.dtsi b/arch/arm/dts/k3-am65.dtsi index 3ead944640a3..3d89bf32a9d1 100644 --- a/arch/arm/dts/k3-am65.dtsi +++ b/arch/arm/dts/k3-am65.dtsi @@ -30,6 +30,8 @@ i2c3 = &main_i2c1; i2c4 = &main_i2c2; i2c5 = &main_i2c3; + spi0 = &ospi0; + spi1 = &ospi1; };
chosen { }; @@ -79,7 +81,11 @@ <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, - <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, + <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, + <0x00 0x70000000 0x00 0x70000000 0x00 0x200000>, + <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, + <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>;
cbass_mcu: interconnect@28380000 { compatible = "simple-bus"; @@ -93,7 +99,10 @@ <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */ <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */ <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */ - <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; /* OSPI space 1 */ + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI space 1 */ + <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, /* FSS OSPI0 data region 1 */ + <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, /* FSS OSPI0 data region 3*/ + <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; /* FSS OSPI1 data region 3*/
cbass_wakeup: interconnect@42040000 { compatible = "simple-bus"; diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index a349edcfa5fd..2cbe69ed1504 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -43,6 +43,7 @@ #address-cells = <2>; #size-cells = <2>; ranges; + u-boot,dm-spl;
ti,sci-dev-id = <119>;
@@ -59,6 +60,7 @@ ti,dma-ring-reset-quirk; ti,sci = <&dmsc>; ti,sci-dev-id = <195>; + u-boot,dm-spl; };
mcu_udmap: udmap@285c0000 { @@ -81,6 +83,7 @@ <0x4>; /* RX_CHAN */ ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ dma-coherent; + u-boot,dm-spl; }; };
@@ -305,6 +308,10 @@ AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ >; }; + + mcu-fss0-ospi0-pins-default { + u-boot,dm-spl; + }; };
&main_uart0 { @@ -365,3 +372,15 @@ &usb1 { dr_mode = "peripheral"; }; + +&fss { + u-boot,dm-spl; +}; + +&ospi0 { + u-boot,dm-spl; + + flash@0{ + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/k3-am654-base-board.dts b/arch/arm/dts/k3-am654-base-board.dts index 7ebbf1786255..375f1d089c7d 100644 --- a/arch/arm/dts/k3-am654-base-board.dts +++ b/arch/arm/dts/k3-am654-base-board.dts @@ -73,6 +73,22 @@ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ >; }; + + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ + AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ + AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ + AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ + AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ + AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ + AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ + AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ + AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ + AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ + AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ + >; + }; };
&sdhci0 { @@ -117,3 +133,23 @@ &usb0_phy { status = "disabled"; }; + +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <8>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 5d5689d28496..257b56a1b032 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -179,6 +179,22 @@ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ >; }; + + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ + AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ + AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ + AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ + AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ + AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ + AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ + AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ + AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ + AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ + AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ + >; + }; };
&main_pmx0 { @@ -239,3 +255,26 @@ u-boot,dm-spl; }; }; + +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + + reg = <0x0 0x47040000 0x0 0x100>, + <0x0 0x50000000 0x0 0x8000000>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <8>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +};
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support OSPI boot.
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com --- .../k3-j721e-common-proc-board-u-boot.dtsi | 16 ++++++++ arch/arm/dts/k3-j721e-common-proc-board.dts | 33 ++++++++++++++++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 31 +++++++++++++++ .../arm/dts/k3-j721e-r5-common-proc-board.dts | 39 +++++++++++++++++++ arch/arm/dts/k3-j721e-som-p0.dtsi | 36 +++++++++++++++++ arch/arm/dts/k3-j721e.dtsi | 2 + 6 files changed, 157 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index a3a81932168e..d422100d42c5 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -349,3 +349,19 @@ &exp2 { u-boot,dm-spl; }; + +&mcu_fss0_ospi0_pins_default { + u-boot,dm-spl; +}; + +&fss { + u-boot,dm-spl; +}; + +&ospi0 { + u-boot,dm-spl; + + flash@0 { + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts index d216b707fd2c..496a15e1d1ac 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-common-proc-board.dts @@ -123,6 +123,19 @@ J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ >; }; + + mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ + J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ + J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */ + J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */ + J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */ + J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */ + J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */ + J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */ + >; + }; };
&usbss0 { @@ -172,3 +185,23 @@ #gpio-cells = <2>; }; }; + +&ospi1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <2>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi index fe52fd1b2f9f..a9e97f219bd0 100644 --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi @@ -143,6 +143,37 @@ assigned-clocks = <&k3_clks 102 0>; assigned-clock-rates = <250000000>; }; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi"; + reg = <0x0 0x47040000 0x0 0x100>, + <0x5 0x00000000 0x1 0x0000000>; + interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 103 0>; + assigned-clocks = <&k3_clks 103 0>; + assigned-clock-parents = <&k3_clks 103 2>; + assigned-clock-rates = <166666666>; + power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; + + ospi1: spi@47050000 { + compatible = "ti,am654-ospi"; + reg = <0x0 0x47050000 0x0 0x100>, + <0x7 0x00000000 0x1 0x00000000>; + interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 104 0>; + power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; };
mcu_i2c0: i2c@40b00000 { diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 1f14d71438b4..d243208c0b11 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -107,6 +107,22 @@ J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ >; }; + + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ + J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ + J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */ + J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */ + J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */ + J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */ + J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */ + J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */ + J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */ + J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */ + J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */ + >; + }; };
&main_pmx0 { @@ -252,4 +268,27 @@ }; };
+&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + + reg = <0x0 0x47040000 0x0 0x100>, + <0x0 0x50000000 0x0 0x8000000>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <8>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + #include "k3-j721e-common-proc-board-u-boot.dtsi" diff --git a/arch/arm/dts/k3-j721e-som-p0.dtsi b/arch/arm/dts/k3-j721e-som-p0.dtsi index 1e1519f1c900..8497ff3e3e12 100644 --- a/arch/arm/dts/k3-j721e-som-p0.dtsi +++ b/arch/arm/dts/k3-j721e-som-p0.dtsi @@ -47,6 +47,22 @@ J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ >; }; + + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ + J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ + J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */ + J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */ + J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */ + J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */ + J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */ + J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */ + J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */ + J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */ + J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */ + >; + }; };
&hbmc { @@ -61,3 +77,23 @@ reg = <0x0 0x0 0x4000000>; }; }; + +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <8>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm/dts/k3-j721e.dtsi b/arch/arm/dts/k3-j721e.dtsi index 68ba517e5009..04137b99486c 100644 --- a/arch/arm/dts/k3-j721e.dtsi +++ b/arch/arm/dts/k3-j721e.dtsi @@ -40,6 +40,8 @@ i2c7 = &main_i2c4; i2c8 = &main_i2c5; i2c9 = &main_i2c6; + spi0 = &ospi0; + spi1 = &ospi1; };
chosen { };
Set up mtdparts cmdline argument to be passed to kernel
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com --- include/configs/am65x_evm.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 7d7f86a0598a..4e095342c0b3 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -73,7 +73,8 @@ "name_kern=Image\0" \ "console=ttyS2,115200n8\0" \ "stdin=serial,usbkbd\0" \ - "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000\0" \ + "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \ + "${mtdparts}\0" \ "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" \
/* U-Boot MMC-specific configuration */ @@ -106,6 +107,22 @@ "0 /lib/firmware/am65x-mcu-r5f0_0-fw " \ "1 /lib/firmware/am65x-mcu-r5f0_1-fw "
+#ifdef CONFIG_TARGET_AM654_A53_EVM +#define EXTRA_ENV_AM65X_BOARD_SETTINGS_MTD \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" +#else +#define EXTRA_ENV_AM65X_BOARD_SETTINGS_MTD +#endif + +#define EXTRA_ENV_AM65X_BOARD_SETTINGS_UBI \ + "init_ubi=run args_all args_ubi; sf probe; " \ + "ubi part ospi.rootfs; ubifsmount ubi:rootfs;\0" \ + "get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0" \ + "get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0" \ + "args_ubi=setenv bootargs console=${console} ${optargs} " \ + "rootfstype=ubifs root=ubi0:rootfs rw ubi.mtd=ospi.rootfs\0" + #define EXTRA_ENV_DFUARGS \ "dfu_bufsiz=0x20000\0" \ DFU_ALT_INFO_MMC \ @@ -118,6 +135,8 @@ DEFAULT_FIT_TI_ARGS \ EXTRA_ENV_AM65X_BOARD_SETTINGS \ EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC \ + EXTRA_ENV_AM65X_BOARD_SETTINGS_MTD \ + EXTRA_ENV_AM65X_BOARD_SETTINGS_UBI \ EXTRA_ENV_RPROC_SETTINGS \ EXTRA_ENV_DFUARGS
Set up mtdparts cmdline argument to be passed to kernel
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com --- include/configs/j721e_evm.h | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 4371c471e5a9..0f8a9739a13f 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -74,7 +74,8 @@ "overlayaddr=0x83000000\0" \ "name_kern=Image\0" \ "console=ttyS2,115200n8\0" \ - "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000\0" \ + "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \ + "${mtdparts}\0" \ "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
#define PARTS_DEFAULT \ @@ -124,6 +125,14 @@ DFU_ALT_INFO_RAM \ DFU_ALT_INFO_OSPI
+#ifdef CONFIG_TARGET_J721E_A72_EVM +#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" +#else +#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD +#endif + /* Incorporate settings into the U-Boot environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_MMC_TI_ARGS \ @@ -132,7 +141,8 @@ EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \ EXTRA_ENV_RPROC_SETTINGS \ EXTRA_ENV_DFUARGS \ - DEFAULT_UFS_TI_ARGS + DEFAULT_UFS_TI_ARGS \ + EXTRA_ENV_J721E_BOARD_SETTINGS_MTD
/* Now for the remaining common defines */ #include <configs/ti_armv7_common.h>
Enable OSPI related defconfigs. Also enable SPL_DMA so that DMA is used during OSPI boot
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com --- configs/j721e_evm_a72_defconfig | 9 ++++++++- configs/j721e_evm_r5_defconfig | 7 +++++++ 2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index c9591eb25723..2dd2f567ac34 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y @@ -35,6 +36,8 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_USB_GADGET=y @@ -56,7 +59,8 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" -CONFIG_MTDPARTS_DEFAULT="mtdparts=47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)" +CONFIG_CMD_UBI=y # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y @@ -112,7 +116,10 @@ CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_HBMC_AM654=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_TI=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 19fbd450c754..d31c116aa695 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y +CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y @@ -34,6 +35,8 @@ CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_REMOTEPROC=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_USB_GADGET=y @@ -64,6 +67,8 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DA8XX_GPIO=y CONFIG_DM_PCA953X=y @@ -81,6 +86,7 @@ CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set @@ -99,6 +105,7 @@ CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y +CONFIG_SOC_TI=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_CADENCE_QSPI=y
Enable OSPI related defconfigs. Also enable SPL_DMA so that DMA is used during OSPI boot
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com --- configs/am65x_evm_a53_defconfig | 25 +++++++++++++++++++++++++ configs/am65x_evm_r5_defconfig | 17 +++++++++++++++++ 2 files changed, 42 insertions(+)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 079cd912ba34..f175d20a66c0 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_DISTRO_DEFAULTS=y @@ -28,10 +30,17 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_DMA=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y @@ -40,9 +49,13 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs)" +CONFIG_CMD_UBI=y # CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y @@ -58,11 +71,13 @@ CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y +CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y CONFIG_DMA_CHANNELS=y CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y @@ -78,6 +93,13 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_TI=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y @@ -102,6 +124,9 @@ CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 69055d553609..4dc5f384e7dd 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x41c00000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y @@ -26,6 +28,7 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 +CONFIG_SPL_DMA=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_DM_RESET=y @@ -34,6 +37,10 @@ CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_REMOTEPROC=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -63,6 +70,8 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y @@ -76,6 +85,10 @@ CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set CONFIG_SPL_PINCTRL=y @@ -95,6 +108,10 @@ CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y
Hi Vignesh,
On Wed, Jan 29, 2020 at 05:48:46PM +0530, Vignesh Raghavendra wrote:
This series adds support to boot from OSPI on TI's AM654 and J721e SoCs. These EVMs have Micron MT35x flash and works in 1-1-8 mode.
we have some documentation in our TI tree regarding OSPI boot in the board-specific readme files such as how to program the OSPI with the different U-Boot artifacts, etc which is super helpful for a user.
Would you mind including this info into this series for both AM654x and J721E?
Thanks, Andreas
-- Andreas Dannenberg Texas Instruments Inc
Lokesh Vutla (1): ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFW
Vignesh Raghavendra (8): drivers: Descend to drivers/soc unconditionally ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMU ARM: dts: k3-am65: Add OSPI DT nodes ARM: dts: k3-j721e: Add OSPI DT nodes configs: am65x_evm: Setup mtdparts for OSPI configs: j721e_evm: Setup mtdparts for OSPI configs: j721e_evm_defconfig: Enable OSPI configs configs: am65x_evm_defconfig: Enable OSPI configs
arch/arm/dts/k3-am65-mcu.dtsi | 38 ++++++++++++++++++ arch/arm/dts/k3-am65.dtsi | 13 ++++++- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 19 +++++++++ arch/arm/dts/k3-am654-base-board.dts | 36 +++++++++++++++++ arch/arm/dts/k3-am654-r5-base-board.dts | 39 +++++++++++++++++++ .../k3-j721e-common-proc-board-u-boot.dtsi | 16 ++++++++ arch/arm/dts/k3-j721e-common-proc-board.dts | 33 ++++++++++++++++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 31 +++++++++++++++ .../arm/dts/k3-j721e-r5-common-proc-board.dts | 39 +++++++++++++++++++ arch/arm/dts/k3-j721e-som-p0.dtsi | 36 +++++++++++++++++ arch/arm/dts/k3-j721e.dtsi | 2 + arch/arm/mach-k3/Kconfig | 8 ++++ arch/arm/mach-k3/arm64-mmu.c | 7 ++++ arch/arm/mach-k3/sysfw-loader.c | 31 ++++++++++++++- configs/am65x_evm_a53_defconfig | 25 ++++++++++++ configs/am65x_evm_r5_defconfig | 17 ++++++++ configs/j721e_evm_a72_defconfig | 9 ++++- configs/j721e_evm_r5_defconfig | 7 ++++ drivers/Makefile | 3 +- include/configs/am65x_evm.h | 21 +++++++++- include/configs/j721e_evm.h | 14 ++++++- 21 files changed, 436 insertions(+), 8 deletions(-)
-- 2.25.0
Hi Andreas,
On 29/01/20 10:01 pm, Andreas Dannenberg wrote:
Hi Vignesh,
On Wed, Jan 29, 2020 at 05:48:46PM +0530, Vignesh Raghavendra wrote:
This series adds support to boot from OSPI on TI's AM654 and J721e SoCs. These EVMs have Micron MT35x flash and works in 1-1-8 mode.
we have some documentation in our TI tree regarding OSPI boot in the board-specific readme files such as how to program the OSPI with the different U-Boot artifacts, etc which is super helpful for a user.
Would you mind including this info into this series for both AM654x and J721E?
Sure, thanks for pointing that out! Will include it as part of this series if I have to respin because of any other comments, else will submit a separate series updating the READMEs
Regards Vignesh
Thanks, Andreas
-- Andreas Dannenberg Texas Instruments Inc
Lokesh Vutla (1): ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFW
Vignesh Raghavendra (8): drivers: Descend to drivers/soc unconditionally ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMU ARM: dts: k3-am65: Add OSPI DT nodes ARM: dts: k3-j721e: Add OSPI DT nodes configs: am65x_evm: Setup mtdparts for OSPI configs: j721e_evm: Setup mtdparts for OSPI configs: j721e_evm_defconfig: Enable OSPI configs configs: am65x_evm_defconfig: Enable OSPI configs
arch/arm/dts/k3-am65-mcu.dtsi | 38 ++++++++++++++++++ arch/arm/dts/k3-am65.dtsi | 13 ++++++- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 19 +++++++++ arch/arm/dts/k3-am654-base-board.dts | 36 +++++++++++++++++ arch/arm/dts/k3-am654-r5-base-board.dts | 39 +++++++++++++++++++ .../k3-j721e-common-proc-board-u-boot.dtsi | 16 ++++++++ arch/arm/dts/k3-j721e-common-proc-board.dts | 33 ++++++++++++++++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 31 +++++++++++++++ .../arm/dts/k3-j721e-r5-common-proc-board.dts | 39 +++++++++++++++++++ arch/arm/dts/k3-j721e-som-p0.dtsi | 36 +++++++++++++++++ arch/arm/dts/k3-j721e.dtsi | 2 + arch/arm/mach-k3/Kconfig | 8 ++++ arch/arm/mach-k3/arm64-mmu.c | 7 ++++ arch/arm/mach-k3/sysfw-loader.c | 31 ++++++++++++++- configs/am65x_evm_a53_defconfig | 25 ++++++++++++ configs/am65x_evm_r5_defconfig | 17 ++++++++ configs/j721e_evm_a72_defconfig | 9 ++++- configs/j721e_evm_r5_defconfig | 7 ++++ drivers/Makefile | 3 +- include/configs/am65x_evm.h | 21 +++++++++- include/configs/j721e_evm.h | 14 ++++++- 21 files changed, 436 insertions(+), 8 deletions(-)
-- 2.25.0
On 29/01/20 5:48 PM, Vignesh Raghavendra wrote:
This series adds support to boot from OSPI on TI's AM654 and J721e SoCs. These EVMs have Micron MT35x flash and works in 1-1-8 mode.
This is causing build failures on hs configs. Can you fix it and repost?
Thanks and regards, Lokesh
Lokesh Vutla (1): ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFW
Vignesh Raghavendra (8): drivers: Descend to drivers/soc unconditionally ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMU ARM: dts: k3-am65: Add OSPI DT nodes ARM: dts: k3-j721e: Add OSPI DT nodes configs: am65x_evm: Setup mtdparts for OSPI configs: j721e_evm: Setup mtdparts for OSPI configs: j721e_evm_defconfig: Enable OSPI configs configs: am65x_evm_defconfig: Enable OSPI configs
arch/arm/dts/k3-am65-mcu.dtsi | 38 ++++++++++++++++++ arch/arm/dts/k3-am65.dtsi | 13 ++++++- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 19 +++++++++ arch/arm/dts/k3-am654-base-board.dts | 36 +++++++++++++++++ arch/arm/dts/k3-am654-r5-base-board.dts | 39 +++++++++++++++++++ .../k3-j721e-common-proc-board-u-boot.dtsi | 16 ++++++++ arch/arm/dts/k3-j721e-common-proc-board.dts | 33 ++++++++++++++++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 31 +++++++++++++++ .../arm/dts/k3-j721e-r5-common-proc-board.dts | 39 +++++++++++++++++++ arch/arm/dts/k3-j721e-som-p0.dtsi | 36 +++++++++++++++++ arch/arm/dts/k3-j721e.dtsi | 2 + arch/arm/mach-k3/Kconfig | 8 ++++ arch/arm/mach-k3/arm64-mmu.c | 7 ++++ arch/arm/mach-k3/sysfw-loader.c | 31 ++++++++++++++- configs/am65x_evm_a53_defconfig | 25 ++++++++++++ configs/am65x_evm_r5_defconfig | 17 ++++++++ configs/j721e_evm_a72_defconfig | 9 ++++- configs/j721e_evm_r5_defconfig | 7 ++++ drivers/Makefile | 3 +- include/configs/am65x_evm.h | 21 +++++++++- include/configs/j721e_evm.h | 14 ++++++- 21 files changed, 436 insertions(+), 8 deletions(-)
participants (4)
-
Andreas Dannenberg -
Lokesh Vutla -
Tom Rini -
Vignesh Raghavendra