[PATCH 0/3] rockchip: sdhci: Add HS400 Enhanced Strobe support
I'm trying to make my gru-kevin's eMMC work properly (it times out while tuning for HS400 and stops working when reinitialized via "mmc dev 0"). While experimenting with what works on my board I ended up implementing HS400ES support. And while I'm at it, I decided to do it for RK3568 as well since it turned out easy enough. Both are ported from relevant Linux drivers.
I'm trying this with "load mmc 0:1 0xd0000000 /bigfile $size" and getting the following speeds; and with "mmc info" the following differences:
gru-kevin mmc0 | w/o this series | w/ this series --------------------+---------------------------+------------------- Bus Speed | 52000000 | 200000000 Mode | MMC High Speed (52MHz) | HS400ES (200 MHz) 8MiB Load Speed | ~9.5 MiB/s | ~51.5 MiB/s 256MiB Load Speed | ~177.8 MiB/s | ~114.5 MiB/s
Listing partitions, listing files, reading files and the loaded bytes all look fine to me, but I'm not sure I haven't missed anything.
Alper Nebi Yasak (3): mmc: sdhci: Add HS400 Enhanced Strobe support rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568
drivers/mmc/rockchip_sdhci.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/mmc/sdhci.c | 18 +++++++++++++ include/sdhci.h | 1 + 3 files changed, 70 insertions(+)
Delegate setting the Enhanced Strobe configuration to individual drivers if they set a function for it. Return -ENOTSUPP if they do not, like what the MMC uclass does.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com ---
drivers/mmc/sdhci.c | 18 ++++++++++++++++++ include/sdhci.h | 1 + 2 files changed, 19 insertions(+)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 766e4a6b0c5e..bf989a594f7e 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -513,6 +513,7 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) reg |= SDHCI_CTRL_UHS_SDR104; break; case MMC_HS_400: + case MMC_HS_400_ES: reg |= SDHCI_CTRL_HS400; break; default: @@ -666,6 +667,7 @@ static int sdhci_set_ios(struct mmc *mmc) mmc->selected_mode == MMC_DDR_52 || mmc->selected_mode == MMC_HS_200 || mmc->selected_mode == MMC_HS_400 || + mmc->selected_mode == MMC_HS_400_ES || mmc->selected_mode == UHS_SDR25 || mmc->selected_mode == UHS_SDR50 || mmc->selected_mode == UHS_SDR104 || @@ -799,6 +801,19 @@ static int sdhci_wait_dat0(struct udevice *dev, int state, return -ETIMEDOUT; }
+#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) +static int sdhci_set_enhanced_strobe(struct udevice *dev) +{ + struct mmc *mmc = mmc_get_mmc_dev(dev); + struct sdhci_host *host = mmc->priv; + + if (host->ops && host->ops->set_enhanced_strobe) + return host->ops->set_enhanced_strobe(host); + + return -ENOTSUPP; +} +#endif + const struct dm_mmc_ops sdhci_ops = { .send_cmd = sdhci_send_command, .set_ios = sdhci_set_ios, @@ -808,6 +823,9 @@ const struct dm_mmc_ops sdhci_ops = { .execute_tuning = sdhci_execute_tuning, #endif .wait_dat0 = sdhci_wait_dat0, +#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) + .set_enhanced_strobe = sdhci_set_enhanced_strobe, +#endif }; #else static const struct mmc_ops sdhci_ops = { diff --git a/include/sdhci.h b/include/sdhci.h index c718dd7206c1..7a65fdf95d30 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -272,6 +272,7 @@ struct sdhci_ops { int (*platform_execute_tuning)(struct mmc *host, u8 opcode); int (*set_delay)(struct sdhci_host *host); int (*deferred_probe)(struct sdhci_host *host); + int (*set_enhanced_strobe)(struct sdhci_host *host); };
#define ADMA_MAX_LEN 65532
On 11/1/21 6:07 PM, Alper Nebi Yasak wrote:
Delegate setting the Enhanced Strobe configuration to individual drivers if they set a function for it. Return -ENOTSUPP if they do not, like what the MMC uclass does.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Best Regards, Jaehoon Chung
drivers/mmc/sdhci.c | 18 ++++++++++++++++++ include/sdhci.h | 1 + 2 files changed, 19 insertions(+)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 766e4a6b0c5e..bf989a594f7e 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -513,6 +513,7 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) reg |= SDHCI_CTRL_UHS_SDR104; break; case MMC_HS_400:
- case MMC_HS_400_ES: reg |= SDHCI_CTRL_HS400; break; default:
@@ -666,6 +667,7 @@ static int sdhci_set_ios(struct mmc *mmc) mmc->selected_mode == MMC_DDR_52 || mmc->selected_mode == MMC_HS_200 || mmc->selected_mode == MMC_HS_400 ||
mmc->selected_mode == MMC_HS_400_ES ||@@ -799,6 +801,19 @@ static int sdhci_wait_dat0(struct udevice *dev, int state, return -ETIMEDOUT; }
+#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) +static int sdhci_set_enhanced_strobe(struct udevice *dev) +{
- struct mmc *mmc = mmc_get_mmc_dev(dev);
- struct sdhci_host *host = mmc->priv;
- if (host->ops && host->ops->set_enhanced_strobe)
return host->ops->set_enhanced_strobe(host);- return -ENOTSUPP;
+} +#endif
const struct dm_mmc_ops sdhci_ops = { .send_cmd = sdhci_send_command, .set_ios = sdhci_set_ios, @@ -808,6 +823,9 @@ const struct dm_mmc_ops sdhci_ops = { .execute_tuning = sdhci_execute_tuning, #endif .wait_dat0 = sdhci_wait_dat0, +#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
- .set_enhanced_strobe = sdhci_set_enhanced_strobe,
+#endif }; #else static const struct mmc_ops sdhci_ops = { diff --git a/include/sdhci.h b/include/sdhci.h index c718dd7206c1..7a65fdf95d30 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -272,6 +272,7 @@ struct sdhci_ops { int (*platform_execute_tuning)(struct mmc *host, u8 opcode); int (*set_delay)(struct sdhci_host *host); int (*deferred_probe)(struct sdhci_host *host);
- int (*set_enhanced_strobe)(struct sdhci_host *host);
};
#define ADMA_MAX_LEN 65532
On RK3399, a register bit must be set to enable Enhanced Strobe. Let the Rockchip SDHCI driver set it when Enhanced Strobe configuration is requested.
This is mostly ported from Linux' Arasan SDHCI driver which happens to be the underlying IP. (drivers/mmc/host/sdhci-of-arasan.c in Linux tree).
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com ---
drivers/mmc/rockchip_sdhci.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 278473899c7c..7457255fa080 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -42,6 +42,9 @@ ((((x) >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK) ==\ PHYCTRL_DLLRDY_DONE)
+#define ARASAN_VENDOR_REGISTER 0x78 +#define ARASAN_VENDOR_ENHANCED_STROBE BIT(0) + /* Rockchip specific Registers */ #define DWCMSHC_EMMC_DLL_CTRL 0x800 #define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1) @@ -93,6 +96,7 @@ struct sdhci_data { int (*emmc_set_clock)(struct sdhci_host *host, unsigned int clock); int (*emmc_phy_init)(struct udevice *dev); int (*get_phy)(struct udevice *dev); + int (*set_enhanced_strobe)(struct sdhci_host *host); };
static int rk3399_emmc_phy_init(struct udevice *dev) @@ -198,6 +202,17 @@ static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo return 0; }
+static int rk3399_set_enhanced_strobe(struct sdhci_host *host) +{ + u32 vendor; + + vendor = sdhci_readl(host, ARASAN_VENDOR_REGISTER); + vendor |= ARASAN_VENDOR_ENHANCED_STROBE; + sdhci_writel(host, vendor, ARASAN_VENDOR_REGISTER); + + return 0; +} + static int rk3568_emmc_phy_init(struct udevice *dev) { struct rockchip_sdhc *prv = dev_get_priv(dev); @@ -355,9 +370,21 @@ static int rockchip_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) return ret; }
+static int rockchip_sdhci_set_enhanced_strobe(struct sdhci_host *host) +{ + struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); + struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev); + + if (data->set_enhanced_strobe) + return data->set_enhanced_strobe(host); + + return -ENOTSUPP; +} + static struct sdhci_ops rockchip_sdhci_ops = { .set_ios_post = rockchip_sdhci_set_ios_post, .platform_execute_tuning = &rockchip_sdhci_execute_tuning, + .set_enhanced_strobe = &rockchip_sdhci_set_enhanced_strobe, };
static int rockchip_sdhci_probe(struct udevice *dev) @@ -439,6 +466,7 @@ static const struct sdhci_data rk3399_data = { .emmc_set_clock = rk3399_sdhci_emmc_set_clock, .get_phy = rk3399_emmc_get_phy, .emmc_phy_init = rk3399_emmc_phy_init, + .set_enhanced_strobe = rk3399_set_enhanced_strobe, };
static const struct sdhci_data rk3568_data = {
On 11/1/21 6:07 PM, Alper Nebi Yasak wrote:
On RK3399, a register bit must be set to enable Enhanced Strobe. Let the Rockchip SDHCI driver set it when Enhanced Strobe configuration is requested.
This is mostly ported from Linux' Arasan SDHCI driver which happens to be the underlying IP. (drivers/mmc/host/sdhci-of-arasan.c in Linux tree).
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Best Regards, Jaehoon Chung
drivers/mmc/rockchip_sdhci.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 278473899c7c..7457255fa080 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -42,6 +42,9 @@ ((((x) >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK) ==\ PHYCTRL_DLLRDY_DONE)
+#define ARASAN_VENDOR_REGISTER 0x78 +#define ARASAN_VENDOR_ENHANCED_STROBE BIT(0)
/* Rockchip specific Registers */ #define DWCMSHC_EMMC_DLL_CTRL 0x800 #define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1) @@ -93,6 +96,7 @@ struct sdhci_data { int (*emmc_set_clock)(struct sdhci_host *host, unsigned int clock); int (*emmc_phy_init)(struct udevice *dev); int (*get_phy)(struct udevice *dev);
- int (*set_enhanced_strobe)(struct sdhci_host *host);
};
static int rk3399_emmc_phy_init(struct udevice *dev) @@ -198,6 +202,17 @@ static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo return 0; }
+static int rk3399_set_enhanced_strobe(struct sdhci_host *host) +{
- u32 vendor;
- vendor = sdhci_readl(host, ARASAN_VENDOR_REGISTER);
- vendor |= ARASAN_VENDOR_ENHANCED_STROBE;
- sdhci_writel(host, vendor, ARASAN_VENDOR_REGISTER);
- return 0;
+}
static int rk3568_emmc_phy_init(struct udevice *dev) { struct rockchip_sdhc *prv = dev_get_priv(dev); @@ -355,9 +370,21 @@ static int rockchip_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) return ret; }
+static int rockchip_sdhci_set_enhanced_strobe(struct sdhci_host *host) +{
- struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host);
- struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev);
- if (data->set_enhanced_strobe)
return data->set_enhanced_strobe(host);- return -ENOTSUPP;
+}
static struct sdhci_ops rockchip_sdhci_ops = { .set_ios_post = rockchip_sdhci_set_ios_post, .platform_execute_tuning = &rockchip_sdhci_execute_tuning,
- .set_enhanced_strobe = &rockchip_sdhci_set_enhanced_strobe,
};
static int rockchip_sdhci_probe(struct udevice *dev) @@ -439,6 +466,7 @@ static const struct sdhci_data rk3399_data = { .emmc_set_clock = rk3399_sdhci_emmc_set_clock, .get_phy = rk3399_emmc_get_phy, .emmc_phy_init = rk3399_emmc_phy_init,
- .set_enhanced_strobe = rk3399_set_enhanced_strobe,
};
static const struct sdhci_data rk3568_data = {
On RK3568, a register bit must be set to enable Enhanced Strobe. However, it appears that the address of this register may differ from vendor to vendor and should be read from the underlying MMC IP. Let the Rockchip SDHCI driver read this address and set the relevant bit when Enhanced Strobe configuration is requested.
This is mostly ported from Linux' Synopsys DWC MSHC driver which happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in Linux tree).
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com --- Merely build-tested as I don't have a RK3568 board.
drivers/mmc/rockchip_sdhci.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 7457255fa080..c95f95578672 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -45,6 +45,13 @@ #define ARASAN_VENDOR_REGISTER 0x78 #define ARASAN_VENDOR_ENHANCED_STROBE BIT(0)
+/* DWC IP vendor area 1 pointer */ +#define DWCMSHC_P_VENDOR_AREA1 0xe8 +#define DWCMSHC_AREA1_MASK GENMASK(11, 0) +/* Offset inside the vendor area 1 */ +#define DWCMSHC_EMMC_CONTROL 0x2c +#define DWCMSHC_ENHANCED_STROBE BIT(8) + /* Rockchip specific Registers */ #define DWCMSHC_EMMC_DLL_CTRL 0x800 #define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1) @@ -284,6 +291,21 @@ static int rk3568_emmc_get_phy(struct udevice *dev) return 0; }
+static int rk3568_set_enhanced_strobe(struct sdhci_host *host) +{ + u32 vendor; + int reg; + + reg = (sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK) + + DWCMSHC_EMMC_CONTROL; + + vendor = sdhci_readl(host, reg); + vendor |= DWCMSHC_ENHANCED_STROBE; + sdhci_writel(host, vendor, reg); + + return 0; +} + static int rockchip_sdhci_set_ios_post(struct sdhci_host *host) { struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); @@ -473,6 +495,7 @@ static const struct sdhci_data rk3568_data = { .emmc_set_clock = rk3568_sdhci_emmc_set_clock, .get_phy = rk3568_emmc_get_phy, .emmc_phy_init = rk3568_emmc_phy_init, + .set_enhanced_strobe = rk3568_set_enhanced_strobe, };
static const struct udevice_id sdhci_ids[] = {
On 11/1/21 6:07 PM, Alper Nebi Yasak wrote:
On RK3568, a register bit must be set to enable Enhanced Strobe. However, it appears that the address of this register may differ from vendor to vendor and should be read from the underlying MMC IP. Let the Rockchip SDHCI driver read this address and set the relevant bit when Enhanced Strobe configuration is requested.
This is mostly ported from Linux' Synopsys DWC MSHC driver which happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in Linux tree).
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Merely build-tested as I don't have a RK3568 board.
If someone can test this patch on RK3568 board, it will be more better.
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Best Regards, Jaehoon Chung
drivers/mmc/rockchip_sdhci.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 7457255fa080..c95f95578672 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -45,6 +45,13 @@ #define ARASAN_VENDOR_REGISTER 0x78 #define ARASAN_VENDOR_ENHANCED_STROBE BIT(0)
+/* DWC IP vendor area 1 pointer */ +#define DWCMSHC_P_VENDOR_AREA1 0xe8 +#define DWCMSHC_AREA1_MASK GENMASK(11, 0) +/* Offset inside the vendor area 1 */ +#define DWCMSHC_EMMC_CONTROL 0x2c +#define DWCMSHC_ENHANCED_STROBE BIT(8)
/* Rockchip specific Registers */ #define DWCMSHC_EMMC_DLL_CTRL 0x800 #define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1) @@ -284,6 +291,21 @@ static int rk3568_emmc_get_phy(struct udevice *dev) return 0; }
+static int rk3568_set_enhanced_strobe(struct sdhci_host *host) +{
- u32 vendor;
- int reg;
- reg = (sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK)
+ DWCMSHC_EMMC_CONTROL;- vendor = sdhci_readl(host, reg);
- vendor |= DWCMSHC_ENHANCED_STROBE;
- sdhci_writel(host, vendor, reg);
- return 0;
+}
static int rockchip_sdhci_set_ios_post(struct sdhci_host *host) { struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); @@ -473,6 +495,7 @@ static const struct sdhci_data rk3568_data = { .emmc_set_clock = rk3568_sdhci_emmc_set_clock, .get_phy = rk3568_emmc_get_phy, .emmc_phy_init = rk3568_emmc_phy_init,
- .set_enhanced_strobe = rk3568_set_enhanced_strobe,
};
static const struct udevice_id sdhci_ids[] = {
On 01/11/2021 12:07, Alper Nebi Yasak wrote:
I'm trying this with "load mmc 0:1 0xd0000000 /bigfile $size" and getting the following speeds; and with "mmc info" the following differences:
gru-kevin mmc0 | w/o this series | w/ this series --------------------+---------------------------+------------------- Bus Speed | 52000000 | 200000000 Mode | MMC High Speed (52MHz) | HS400ES (200 MHz) 8MiB Load Speed | ~9.5 MiB/s | ~51.5 MiB/s 256MiB Load Speed | ~177.8 MiB/s | ~114.5 MiB/s
I have messed this table up while reformatting it from one orientation to another... The last two rows are transposed, and are instead:
8MiB Load Speed | ~9.5 MiB/s | ~177.8 MiB/s 256MiB Load Speed | ~51.5 MiB/s | ~114.5 MiB/s
Hi,
On 11/1/21 6:07 PM, Alper Nebi Yasak wrote:
I'm trying to make my gru-kevin's eMMC work properly (it times out while tuning for HS400 and stops working when reinitialized via "mmc dev 0"). While experimenting with what works on my board I ended up implementing HS400ES support. And while I'm at it, I decided to do it for RK3568 as well since it turned out easy enough. Both are ported from relevant Linux drivers.
I'm trying this with "load mmc 0:1 0xd0000000 /bigfile $size" and getting the following speeds; and with "mmc info" the following differences:
gru-kevin mmc0 | w/o this series | w/ this series --------------------+---------------------------+------------------- Bus Speed | 52000000 | 200000000 Mode | MMC High Speed (52MHz) | HS400ES (200 MHz) 8MiB Load Speed | ~9.5 MiB/s | ~51.5 MiB/s 256MiB Load Speed | ~177.8 MiB/s | ~114.5 MiB/s
I wonder why HS400ES is lower than High Speed mode in 256MiB Load Speed.
Best Regards, Jaehoon Chung
Listing partitions, listing files, reading files and the loaded bytes all look fine to me, but I'm not sure I haven't missed anything.
Alper Nebi Yasak (3): mmc: sdhci: Add HS400 Enhanced Strobe support rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568
drivers/mmc/rockchip_sdhci.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/mmc/sdhci.c | 18 +++++++++++++ include/sdhci.h | 1 + 3 files changed, 70 insertions(+)
On 01/11/2021 12:19, Jaehoon Chung wrote:
On 11/1/21 6:07 PM, Alper Nebi Yasak wrote:
I'm trying this with "load mmc 0:1 0xd0000000 /bigfile $size" and getting the following speeds; and with "mmc info" the following differences:
gru-kevin mmc0 | w/o this series | w/ this series --------------------+---------------------------+------------------- Bus Speed | 52000000 | 200000000 Mode | MMC High Speed (52MHz) | HS400ES (200 MHz) 8MiB Load Speed | ~9.5 MiB/s | ~51.5 MiB/s 256MiB Load Speed | ~177.8 MiB/s | ~114.5 MiB/sI wonder why HS400ES is lower than High Speed mode in 256MiB Load Speed.
I messed up the table, noticed it shortly after sending the series and sent a correction same time as your email. The actual values are:
8MiB Load Speed | ~9.5 MiB/s | ~177.8 MiB/s 256MiB Load Speed | ~51.5 MiB/s | ~114.5 MiB/s
Sorry for the noise.
On 01/11/2021 09:07, Alper Nebi Yasak wrote:
I'm trying to make my gru-kevin's eMMC work properly (it times out while tuning for HS400 and stops working when reinitialized via "mmc dev 0").
I'm also experiencing issue with the re-init of emmc on a 3399 platform, did you come to any conclusions on the reason? It works fine to load u-boot proper from SPL but then fails in u-boot proper when attempting to perform any mmc activity.
Regards, Jack.
While experimenting with what works on my board I ended up implementing HS400ES support. And while I'm at it, I decided to do it for RK3568 as well since it turned out easy enough. Both are ported from relevant Linux drivers.
I'm trying this with "load mmc 0:1 0xd0000000 /bigfile $size" and getting the following speeds; and with "mmc info" the following differences:
gru-kevin mmc0 | w/o this series | w/ this series --------------------+---------------------------+------------------- Bus Speed | 52000000 | 200000000 Mode | MMC High Speed (52MHz) | HS400ES (200 MHz) 8MiB Load Speed | ~9.5 MiB/s | ~51.5 MiB/s 256MiB Load Speed | ~177.8 MiB/s | ~114.5 MiB/sListing partitions, listing files, reading files and the loaded bytes all look fine to me, but I'm not sure I haven't missed anything.
Alper Nebi Yasak (3): mmc: sdhci: Add HS400 Enhanced Strobe support rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568
drivers/mmc/rockchip_sdhci.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/mmc/sdhci.c | 18 +++++++++++++ include/sdhci.h | 1 + 3 files changed, 70 insertions(+)
On 01/11/2021 14:18, Jack Mitchell wrote:
On 01/11/2021 09:07, Alper Nebi Yasak wrote:
I'm trying to make my gru-kevin's eMMC work properly (it times out while tuning for HS400 and stops working when reinitialized via "mmc dev 0").
I'm also experiencing issue with the re-init of emmc on a 3399 platform, did you come to any conclusions on the reason? It works fine to load u-boot proper from SPL but then fails in u-boot proper when attempting to perform any mmc activity.
Not really. But I have a nice hack to keep it in a working state:
diff --git a/cmd/mmc.c b/cmd/mmc.c index 96d81ffdf368..83bd18e34609 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -129,10 +129,13 @@ static struct mmc *__init_mmc_device(...) if (!mmc) { printf("no mmc device at slot %x\n", dev); return NULL; }
+ if (mmc->cfg->host_caps & MMC_CAP_NONREMOVABLE) + force_init = false; + if (!mmc_getcd(mmc)) force_init = true;
if (force_init) mmc->has_init = 0;
Hi,
On 11/1/21 9:16 PM, Alper Nebi Yasak wrote:
On 01/11/2021 14:18, Jack Mitchell wrote:
On 01/11/2021 09:07, Alper Nebi Yasak wrote:
I'm trying to make my gru-kevin's eMMC work properly (it times out while tuning for HS400 and stops working when reinitialized via "mmc dev 0").
I'm also experiencing issue with the re-init of emmc on a 3399 platform, did you come to any conclusions on the reason? It works fine to load u-boot proper from SPL but then fails in u-boot proper when attempting to perform any mmc activity.
Not really. But I have a nice hack to keep it in a working state:
diff --git a/cmd/mmc.c b/cmd/mmc.c index 96d81ffdf368..83bd18e34609 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -129,10 +129,13 @@ static struct mmc *__init_mmc_device(...) if (!mmc) { printf("no mmc device at slot %x\n", dev); return NULL; }
- if (mmc->cfg->host_caps & MMC_CAP_NONREMOVABLE)
force_init = false;
I don't have rockchip board, but this code is working fine. It seems that needs to implement a reinit callback function to clear the previous configurations in rockchip_sdhci.c.
Best Regards, Jaehoon Chung
if (!mmc_getcd(mmc)) force_init = true;
if (force_init) mmc->has_init = 0;
On Mon, Nov 1, 2021 at 11:18 AM Jack Mitchell ml@embed.me.uk wrote:
On 01/11/2021 09:07, Alper Nebi Yasak wrote:
I'm trying to make my gru-kevin's eMMC work properly (it times out while tuning for HS400 and stops working when reinitialized via "mmc dev 0").
I'm also experiencing issue with the re-init of emmc on a 3399 platform, did you come to any conclusions on the reason? It works fine to load u-boot proper from SPL but then fails in u-boot proper when attempting to perform any mmc activity.
Does the following patch fix the rk3399 problem? http://patchwork.ozlabs.org/project/uboot/patch/20211101044347.17822-1-yifen...
Regards, Jack.
While experimenting with what works on my board I ended up implementing HS400ES support. And while I'm at it, I decided to do it for RK3568 as well since it turned out easy enough. Both are ported from relevant Linux drivers.
I'm trying this with "load mmc 0:1 0xd0000000 /bigfile $size" and getting the following speeds; and with "mmc info" the following differences:
gru-kevin mmc0 | w/o this series | w/ this series --------------------+---------------------------+------------------- Bus Speed | 52000000 | 200000000 Mode | MMC High Speed (52MHz) | HS400ES (200 MHz) 8MiB Load Speed | ~9.5 MiB/s | ~51.5 MiB/s 256MiB Load Speed | ~177.8 MiB/s | ~114.5 MiB/sListing partitions, listing files, reading files and the loaded bytes all look fine to me, but I'm not sure I haven't missed anything.
Alper Nebi Yasak (3): mmc: sdhci: Add HS400 Enhanced Strobe support rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568
drivers/mmc/rockchip_sdhci.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/mmc/sdhci.c | 18 +++++++++++++ include/sdhci.h | 1 + 3 files changed, 70 insertions(+)
-- Jack Mitchell, Consultant https://www.tuxable.co.uk
On 01/11/2021 22:11, Peter Robinson wrote:
On Mon, Nov 1, 2021 at 11:18 AM Jack Mitchell ml@embed.me.uk wrote:
On 01/11/2021 09:07, Alper Nebi Yasak wrote:
I'm trying to make my gru-kevin's eMMC work properly (it times out while tuning for HS400 and stops working when reinitialized via "mmc dev 0").
I'm also experiencing issue with the re-init of emmc on a 3399 platform, did you come to any conclusions on the reason? It works fine to load u-boot proper from SPL but then fails in u-boot proper when attempting to perform any mmc activity.
Does the following patch fix the rk3399 problem? http://patchwork.ozlabs.org/project/uboot/patch/20211101044347.17822-1-yifen...
Hi Peter,
I have this patch in my tree which fixes the initial init of the emmc, but it then fails later when it is re-initialised. Does everything work fine on your Rock960, can you boot Linux from the emmc when going SPL (emmc) -> Proper (emmc) -> Linux (emmc)?
Thanks for the suggestion!
Regards,
Regards, Jack.
While experimenting with what works on my board I ended up implementing HS400ES support. And while I'm at it, I decided to do it for RK3568 as well since it turned out easy enough. Both are ported from relevant Linux drivers.
I'm trying this with "load mmc 0:1 0xd0000000 /bigfile $size" and getting the following speeds; and with "mmc info" the following differences:
gru-kevin mmc0 | w/o this series | w/ this series --------------------+---------------------------+------------------- Bus Speed | 52000000 | 200000000 Mode | MMC High Speed (52MHz) | HS400ES (200 MHz) 8MiB Load Speed | ~9.5 MiB/s | ~51.5 MiB/s 256MiB Load Speed | ~177.8 MiB/s | ~114.5 MiB/sListing partitions, listing files, reading files and the loaded bytes all look fine to me, but I'm not sure I haven't missed anything.
Alper Nebi Yasak (3): mmc: sdhci: Add HS400 Enhanced Strobe support rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568
drivers/mmc/rockchip_sdhci.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/mmc/sdhci.c | 18 +++++++++++++ include/sdhci.h | 1 + 3 files changed, 70 insertions(+)
-- Jack Mitchell, Consultant https://www.tuxable.co.uk
On Mon, Nov 1, 2021 at 10:32 PM Jack Mitchell ml@embed.me.uk wrote:
On 01/11/2021 22:11, Peter Robinson wrote:
On Mon, Nov 1, 2021 at 11:18 AM Jack Mitchell ml@embed.me.uk wrote:
On 01/11/2021 09:07, Alper Nebi Yasak wrote:
I'm trying to make my gru-kevin's eMMC work properly (it times out while tuning for HS400 and stops working when reinitialized via "mmc dev 0").
I'm also experiencing issue with the re-init of emmc on a 3399 platform, did you come to any conclusions on the reason? It works fine to load u-boot proper from SPL but then fails in u-boot proper when attempting to perform any mmc activity.
Does the following patch fix the rk3399 problem? http://patchwork.ozlabs.org/project/uboot/patch/20211101044347.17822-1-yifen...
Hi Peter,
I have this patch in my tree which fixes the initial init of the emmc, but it then fails later when it is re-initialised. Does everything work fine on your Rock960, can you boot Linux from the emmc when going SPL (emmc) -> Proper (emmc) -> Linux (emmc)?
Yes, I tested it last night with the patch applied on 2021.10.
Thanks for the suggestion!
Regards,
Regards, Jack.
While experimenting with what works on my board I ended up implementing HS400ES support. And while I'm at it, I decided to do it for RK3568 as well since it turned out easy enough. Both are ported from relevant Linux drivers.
I'm trying this with "load mmc 0:1 0xd0000000 /bigfile $size" and getting the following speeds; and with "mmc info" the following differences:
gru-kevin mmc0 | w/o this series | w/ this series --------------------+---------------------------+------------------- Bus Speed | 52000000 | 200000000 Mode | MMC High Speed (52MHz) | HS400ES (200 MHz) 8MiB Load Speed | ~9.5 MiB/s | ~51.5 MiB/s 256MiB Load Speed | ~177.8 MiB/s | ~114.5 MiB/sListing partitions, listing files, reading files and the loaded bytes all look fine to me, but I'm not sure I haven't missed anything.
Alper Nebi Yasak (3): mmc: sdhci: Add HS400 Enhanced Strobe support rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568
drivers/mmc/rockchip_sdhci.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/mmc/sdhci.c | 18 +++++++++++++ include/sdhci.h | 1 + 3 files changed, 70 insertions(+)
-- Jack Mitchell, Consultant https://www.tuxable.co.uk
-- Jack Mitchell, Consultant https://www.tuxable.co.uk
On 02/11/2021 08:02, Peter Robinson wrote:
On Mon, Nov 1, 2021 at 10:32 PM Jack Mitchell ml@embed.me.uk wrote:
On 01/11/2021 22:11, Peter Robinson wrote:
On Mon, Nov 1, 2021 at 11:18 AM Jack Mitchell ml@embed.me.uk wrote:
On 01/11/2021 09:07, Alper Nebi Yasak wrote:
I'm trying to make my gru-kevin's eMMC work properly (it times out while tuning for HS400 and stops working when reinitialized via "mmc dev 0").
I'm also experiencing issue with the re-init of emmc on a 3399 platform, did you come to any conclusions on the reason? It works fine to load u-boot proper from SPL but then fails in u-boot proper when attempting to perform any mmc activity.
Does the following patch fix the rk3399 problem? http://patchwork.ozlabs.org/project/uboot/patch/20211101044347.17822-1-yifen...
Hi Peter,
I have this patch in my tree which fixes the initial init of the emmc, but it then fails later when it is re-initialised. Does everything work fine on your Rock960, can you boot Linux from the emmc when going SPL (emmc) -> Proper (emmc) -> Linux (emmc)?
Yes, I tested it last night with the patch applied on 2021.10.
If you get some time would you mind checking what speed the emmc is running at, by breaking into u-boot proper and running `mmc info`. I'm wondering if yours isn't configuring at hs400 and therefore bypassing the issue.
Thanks for the suggestion!
Regards,
Regards, Jack.
While experimenting with what works on my board I ended up implementing HS400ES support. And while I'm at it, I decided to do it for RK3568 as well since it turned out easy enough. Both are ported from relevant Linux drivers.
I'm trying this with "load mmc 0:1 0xd0000000 /bigfile $size" and getting the following speeds; and with "mmc info" the following differences:
gru-kevin mmc0 | w/o this series | w/ this series --------------------+---------------------------+------------------- Bus Speed | 52000000 | 200000000 Mode | MMC High Speed (52MHz) | HS400ES (200 MHz) 8MiB Load Speed | ~9.5 MiB/s | ~51.5 MiB/s 256MiB Load Speed | ~177.8 MiB/s | ~114.5 MiB/sListing partitions, listing files, reading files and the loaded bytes all look fine to me, but I'm not sure I haven't missed anything.
Alper Nebi Yasak (3): mmc: sdhci: Add HS400 Enhanced Strobe support rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568
drivers/mmc/rockchip_sdhci.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/mmc/sdhci.c | 18 +++++++++++++ include/sdhci.h | 1 + 3 files changed, 70 insertions(+)
-- Jack Mitchell, Consultant https://www.tuxable.co.uk
-- Jack Mitchell, Consultant https://www.tuxable.co.uk
participants (4)
-
Alper Nebi Yasak -
Jack Mitchell -
Jaehoon Chung -
Peter Robinson