Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on platforms with AEMIF controller.

Reported-by: Nishanth Menon nm@ti.com Signed-off-by: Lokesh Vutla lokeshvutla@ti.com --- board/ti/ks2_evm/board.c | 5 +++++ configs/k2e_evm_defconfig | 1 + configs/k2hk_evm_defconfig | 1 + configs/k2l_evm_defconfig | 1 + drivers/Kconfig | 2 ++ drivers/memory/Kconfig | 18 ++++++++++++++++++ include/configs/ti_armv7_keystone2.h | 2 -- 7 files changed, 28 insertions(+), 2 deletions(-) create mode 100644 drivers/memory/Kconfig

diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index e16669d..9e8ad93 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -20,6 +20,7 @@

DECLARE_GLOBAL_DATA_PTR;

+#if defined(CONFIG_TI_AEMIF) static struct aemif_config aemif_configs[] = { { /* CS0 */ .mode = AEMIF_MODE_NAND, @@ -33,6 +34,7 @@ static struct aemif_config aemif_configs[] = { .width = AEMIF_WIDTH_8, }, }; +#endif

int dram_init(void) { @@ -42,7 +44,10 @@ int dram_init(void)

gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_MAX_RAM_BANK_SIZE); +#if defined(CONFIG_TI_AEMIF) aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs); +#endif + if (ddr3_size) ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size); return 0; diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index a3fa758..f45bce0 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -15,3 +15,4 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y +CONFIG_TI_AEMIF=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 83efcbb..56b3fe4 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -15,3 +15,4 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y +CONFIG_TI_AEMIF=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index d2ebb1d..3863c56 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -15,3 +15,4 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y +CONFIG_TI_AEMIF=y diff --git a/drivers/Kconfig b/drivers/Kconfig index c82a94b..118b66e 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -30,6 +30,8 @@ source "drivers/input/Kconfig"

source "drivers/led/Kconfig"

+source "drivers/memory/Kconfig" + source "drivers/misc/Kconfig"

source "drivers/mmc/Kconfig" diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig new file mode 100644 index 0000000..4fbb5aa --- /dev/null +++ b/drivers/memory/Kconfig @@ -0,0 +1,18 @@ +# +# Memory devices +# + +menu "Memory Controller drivers" + +config TI_AEMIF + tristate "Texas Instruments AEMIF driver" + depends on ARCH_KEYSTONE + help + This driver is for the AEMIF module available in Texas Instruments + SoCs. AEMIF stands for Asynchronous External Memory Interface and + is intended to provide a glue-less interface to a variety of + asynchronuous memory devices like ASRAM, NOR and NAND memory. A total + of 256M bytes of any of these memories can be accessed at a given + time via four chip selects with 64M byte access per chip select. + +endmenu diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 41185a1..61c7174 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -145,8 +145,6 @@ /* SerDes */ #define CONFIG_TI_KEYSTONE_SERDES

-/* AEMIF */ -#define CONFIG_TI_AEMIF #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE

/* I2C Configuration */