[U-Boot] U-Boot for the Socfpga Arria10 board

Hello,
I'm trying to understand what is necessary to get mainline U-Boot booting from the eMMC of an Arria10 board, which is significantly different to the Cyclone 5.
I'm playing with U-Boot v2019.10! I find some related documentation at [1]. Section "Arria 10 SoC - Boot from SD Card " seems to apply to the mainline U-Boot as well, at a first glance. Is there some similar doc for mainline U-Boot? What are the differences in mainline? Is it working or is something missing?
So I need at least three partitions on the eMMC:
1. VFAT partition with u-boot.img and fit_spl_fpga.itb 2. A2 partition with 4x u-boot-spl.sfp (or u-boot-with-spl.sfp) 3. Linux partition
Where do I specify the physical number of the partition 1.?
Is it still possible to load the secondary bootloader (u-boot.img) from offset 0x800 of the A2 partition? It seems that "SPL_FS_FAT" breaks it.
[1] https://rocketboards.org/foswiki/Documentation/BuildingBootloader
TIA, Wolfgang

Am 18.11.2019 um 19:08 schrieb Wolfgang Grandegger:
Hello,
I'm trying to understand what is necessary to get mainline U-Boot booting from the eMMC of an Arria10 board, which is significantly different to the Cyclone 5.
Unfortunately, my playground here is limited to Cyclone 5, but from the U-Boot side and from what I know, booting an Arria 10 should be very similar to Cyclone5 (given that Stratix 10 and Agilex have a very much different boot flow).
Do you have vendor U-Boot running? If not, I suggest to first get that running. The step to mainline U-Boot should then hopefully not be too hard.
I'm playing with U-Boot v2019.10! I find some related documentation at [1]. Section "Arria 10 SoC - Boot from SD Card " seems to apply to the mainline U-Boot as well, at a first glance. Is there some similar doc for mainline U-Boot? What are the differences in mainline? Is it working or is something missing?
So I need at least three partitions on the eMMC:
- VFAT partition with u-boot.img and fit_spl_fpga.itb
- A2 partition with 4x u-boot-spl.sfp (or u-boot-with-spl.sfp)
- Linux partition
Where do I specify the physical number of the partition 1.?
In the config (or via menuconfig), set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION to y and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION contains the partition number
Is it still possible to load the secondary bootloader (u-boot.img) from offset 0x800 of the A2 partition? It seems that "SPL_FS_FAT" breaks it.
Yes, and no. Enable the above and enable CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR as well then CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR controls the offset in this partition. However, this uses CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION, which is not necessarily the same as the boot-ROM-detected A2 partition.
Hope that helps.
Regards, Simon

Hello,
Am 18.11.19 um 22:15 schrieb Simon Goldschmidt:
Am 18.11.2019 um 19:08 schrieb Wolfgang Grandegger:
Hello,
I'm trying to understand what is necessary to get mainline U-Boot booting from the eMMC of an Arria10 board, which is significantly different to the Cyclone 5.
Unfortunately, my playground here is limited to Cyclone 5, but from the U-Boot side and from what I know, booting an Arria 10 should be very similar to Cyclone5 (given that Stratix 10 and Agilex have a very much different boot flow).
Do you have vendor U-Boot running? If not, I suggest to first get that running. The step to mainline U-Boot should then hopefully not be too hard.
I trying to get the vendor U-Boot v2019.04 from [1] booting as described in [2]. Unfortunately the SDRAM calibration fails:
FPGA: Early Release Succeeded. wait_for_bit_le32: Timeout (reg= mask=1 wait_set=) c2s=00000000 s2c=00000040 nr0=00000620 nr1=00004847 nr2=00000000 dst=00000002 emif_reset interrupt cleared nr0=00000620 nr1=00004847 nr2=00000000 wait_for_bit_le32: Timeout (reg= mask=1 wait_set=) c2s=00000000 s2c=00000040 nr0=00000620 nr1=00004847 nr2=00000000 dst=00000002 emif_reset interrupt cleared nr0=00000620 nr1=00004847 nr2=00000000 ... Error: Could Not Calibrate SDRAM DDRCAL: Failed Trying to boot from MMC1
It seems, that the SDRAM is still not accessible after loading the periph image. Any idea what could cause that issue? It works fine after a soft-reset or if I load the full image via JTAG.
[1] https://github.com/altera-opensource/u-boot-socfpga/tree/socfpga_v2019.04 [2] https://rocketboards.org/foswiki/Documentation/BuildingBootloader
TIA.
Wolfgang
participants (2)
-
Simon Goldschmidt
-
Wolfgang Grandegger