[U-Boot-Users] [PATCH] Add support for hammerhead AVR32 board
Hi
This patch adds support for our new AVR32 based board.
It is against the latest u-boot-avr32.git.
As suggested I removed 'flash.c'. And as Ben Warren suggested I named my network initialization 'board_eth_initialize( ... )'. Like this I don't need to ifdef the call to this function, right?
Alex
diff -Nur old/u-boot-avr32/board/miromico/hammerhead/config.mk new/u-boot-avr32/board/miromico/hammerhead/config.mk --- old/u-boot-avr32/board/miromico/hammerhead/config.mk 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/config.mk 2008-03-14 11:48:10.000000000 +0100 @@ -0,0 +1,3 @@ +TEXT_BASE = 0x00000000 +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_LDFLAGS += --gc-sections diff -Nur old/u-boot-avr32/board/miromico/hammerhead/eth.c new/u-boot-avr32/board/miromico/hammerhead/eth.c --- old/u-boot-avr32/board/miromico/hammerhead/eth.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/eth.c 2008-03-14 16:06:35.000000000 +0100 @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2008 Miromico AG + * + * Ethernet initialization for the Miromico Hammerhead AVR32 board + * + * Mostly copied form Atmel ATNGW100 sources + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/arch/memory-map.h> + +extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); + +#ifdef CONFIG_CMD_NET +void board_eth_initialize(bd_t *bi) +{ + macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]); +} +#endif diff -Nur old/u-boot-avr32/board/miromico/hammerhead/hammerhead.c new/u-boot-avr32/board/miromico/hammerhead/hammerhead.c --- old/u-boot-avr32/board/miromico/hammerhead/hammerhead.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/hammerhead.c 2008-03-14 15:34:22.000000000 +0100 @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2008 Miromico AG + * + * Mostly copied form atmel ATNGW100 sources + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/io.h> +#include <asm/sdram.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hmatrix2.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct sdram_info sdram = { + .phys_addr = CFG_SDRAM_BASE, + .row_bits = 13, + .col_bits = 9, + .bank_bits = 2, + .cas = 3, + .twr = 2, + .trc = 7, + .trp = 2, + .trcd = 2, + .tras = 5, + .txsr = 5, + /* 7.81 us */ + .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, +}; + +int board_early_init_f(void) +{ + /* Set the SDRAM_ENABLE bit in the HEBI SFR */ + hmatrix2_writel(SFR4, 1 << 1); + + gpio_enable_ebi(); + gpio_enable_usart1(); + +#if defined(CONFIG_MACB) + gpio_enable_macb0(); +#endif +#if defined(CONFIG_MMC) + gpio_enable_mmci(); +#endif + + /* Select GCLK3 peripheral function. We'll need it as clock output + * for ethernet PHY. */ + gpio_enable_gclk3(); + return 0; +} + +long int initdram(int board_type) +{ + return sdram_init(&sdram); +} + +void board_init_info(void) +{ + gd->bd->bi_phy_id[0] = 0x01; +} diff -Nur old/u-boot-avr32/board/miromico/hammerhead/Makefile new/u-boot-avr32/board/miromico/hammerhead/Makefile --- old/u-boot-avr32/board/miromico/hammerhead/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/Makefile 2008-03-14 14:53:46.000000000 +0100 @@ -0,0 +1,40 @@ +# +# Copyright (C) 2008 Miromico AG +# +# See file CREDITS for list of people who contributed to this project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o eth.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff -Nur old/u-boot-avr32/board/miromico/hammerhead/u-boot.lds new/u-boot-avr32/board/miromico/hammerhead/u-boot.lds --- old/u-boot-avr32/board/miromico/hammerhead/u-boot.lds 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/u-boot.lds 2008-03-14 14:57:37.000000000 +0100 @@ -0,0 +1,80 @@ +/* -*- Fundamental -*- + * + * Copyright (C) 2008 Miromico AG + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") +OUTPUT_ARCH(avr32) +ENTRY(_start) + +SECTIONS +{ + . = 0; + _text = .; + .text : { + *(.text) + *(.text.*) + } + + . = ALIGN(32); + __flashprog_start = .; + .flashprog : { + *(.flashprog) + } + . = ALIGN(32); + __flashprog_end = .; + _etext = .; + + .rodata : { + *(.rodata) + *(.rodata.*) + } + + . = ALIGN(8); + _data = .; + .data : { + *(.data) + *(.data.*) + } + + . = ALIGN(4); + __u_boot_cmd_start = .; + .u_boot_cmd : { + KEEP(*(.u_boot_cmd)) + } + __u_boot_cmd_end = .; + + . = ALIGN(4); + _got = .; + .got : { + *(.got) + } + _egot = .; + + . = ALIGN(8); + _edata = .; + + .bss : { + *(.bss) + *(.bss.*) + } + . = ALIGN(8); + _end = .; +} diff -Nur old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c --- old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-14 14:40:30.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-14 15:34:43.000000000 +0100 @@ -142,3 +142,14 @@ gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ } #endif + +#ifdef CONFIG_HAMMERHEAD +/* + * Hammerhead board uses GCLK3 (Periph A on PB29) as 25MHz clock output + * for ethernet PHY. + */ +void gpio_enable_gclk3(void) +{ + gpio_select_periph_A(GPIO_PIN_PB29, 0); /* GCLK3 */ +} +#endif diff -Nur old/u-boot-avr32/cpu/at32ap/cpu.c new/u-boot-avr32/cpu/at32ap/cpu.c --- old/u-boot-avr32/cpu/at32ap/cpu.c 2008-03-14 14:40:30.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/cpu.c 2008-03-14 15:43:09.000000000 +0100 @@ -81,6 +81,16 @@ #endif }
+#ifdef CONFIG_HAMMERHEAD +static void gclk_init(void) +{ + /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */ + + /* Enable GCLK3 with no input divider, from OSC0 (crystal) */ + sm_writel( PM_GCCTRL3, SM_BIT(CEN) ); +} +#endif + int cpu_init(void) { extern void _evba(void); @@ -105,6 +115,10 @@ p += CFG_ICACHE_LINESZ) asm volatile("cache %0, 0x02" : "=m"(*p) :: "memory");
+#ifdef CONFIG_HAMMERHEAD + gclk_init(); +#endif + return 0; }
diff -Nur old/u-boot-avr32/cpu/at32ap/sm.h new/u-boot-avr32/cpu/at32ap/sm.h --- old/u-boot-avr32/cpu/at32ap/sm.h 2008-03-14 14:40:30.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/sm.h 2008-03-14 15:51:10.000000000 +0100 @@ -21,7 +21,16 @@ #define SM_PM_IMR 0x0048 #define SM_PM_ISR 0x004c #define SM_PM_ICR 0x0050 -#define SM_PM_GCCTRL 0x0060 + +#define SM_PM_GCCTRL0 0x0060 +#define SM_PM_GCCTRL1 0x0064 +#define SM_PM_GCCTRL2 0x0068 +#define SM_PM_GCCTRL3 0x006c +#define SM_PM_GCCTRL4 0x0070 +#define SM_PM_GCCTRL5 0x0074 +#define SM_PM_GCCTRL6 0x0078 +#define SM_PM_GCCTRL7 0x007c + #define SM_RTC_CTRL 0x0080 #define SM_RTC_VAL 0x0084 #define SM_RTC_TOP 0x0088 diff -Nur old/u-boot-avr32/include/asm-avr32/arch-at32ap700x/gpio.h new/u-boot-avr32/include/asm-avr32/arch-at32ap700x/gpio.h --- old/u-boot-avr32/include/asm-avr32/arch-at32ap700x/gpio.h 2008-03-14 14:40:31.000000000 +0100 +++ new/u-boot-avr32/include/asm-avr32/arch-at32ap700x/gpio.h 2008-03-14 14:11:03.000000000 +0100 @@ -217,4 +217,8 @@ void gpio_enable_mmci(void); #endif
+#ifdef CONFIG_HAMMERHEAD +void gpio_enable_gclk3(void); +#endif + #endif /* __ASM_AVR32_ARCH_GPIO_H__ */ diff -Nur old/u-boot-avr32/include/configs/hammerhead.h new/u-boot-avr32/include/configs/hammerhead.h --- old/u-boot-avr32/include/configs/hammerhead.h 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/include/configs/hammerhead.h 2008-03-14 15:03:56.000000000 +0100 @@ -0,0 +1,177 @@ +/* + * Copyright (C) 2008 Miromico AG + * + * Configuration settings for the Miromico Hammerhead AVR32 board + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_AVR32 1 +#define CONFIG_AT32AP 1 +#define CONFIG_AT32AP7000 1 +#define CONFIG_HAMMERHEAD 1 + +#define CFG_HZ 1000 + +/* + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency + * and the PBA bus to run at 1/4 the PLL frequency. + */ +#define CONFIG_PLL 1 +#define CFG_POWER_MANAGER 1 +#define CFG_OSC0_HZ 25000000 /* 25MHz crystal */ +#define CFG_PLL0_DIV 1 +#define CFG_PLL0_MUL 5 +#define CFG_PLL0_SUPPRESS_CYCLES 16 +#define CFG_CLKDIV_CPU 0 +#define CFG_CLKDIV_HSB 1 +#define CFG_CLKDIV_PBA 2 +#define CFG_CLKDIV_PBB 1 + +/* + * The PLLOPT register controls the PLL like this: + * icp = PLLOPT<2> + * ivco = PLLOPT<1:0> + * + * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). + */ +#define CFG_PLL0_OPT 0x04 + +#define CONFIG_USART1 1 + +/* User serviceable stuff */ +#define CONFIG_DOS_PARTITION 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_STACKSIZE (2048) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS \ + "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND \ + "fsload; bootm" + +/* + * Only interrupt autoboot if <space> is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_AUTOBOOT 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_DELAY_STR "d" +#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * After booting the board for the first time, new ethernet address + * should be generated and assigned to the environment variables + * "ethaddr". This is normally done during production. + */ +#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 +#define CONFIG_NET_MULTI 1 + +/* + * BOOTP/DHCP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY + +#define CONFIG_DOS_PARTITION 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MMC +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR + +#define CONFIG_ATMEL_USART 1 +#define CONFIG_MACB 1 +#define CONFIG_PIO2 1 +#define CFG_NR_PIOS 5 +#define CFG_HSDRAMC 1 +#define CONFIG_MMC 1 + +#define CFG_DCACHE_LINESZ 32 +#define CFG_ICACHE_LINESZ 32 + +#define CONFIG_NR_DRAM_BANKS 1 + +#define CFG_FLASH_CFI 1 +#define CFG_FLASH_CFI_DRIVER 1 + +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x800000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 135 + +#define CFG_MONITOR_BASE CFG_FLASH_BASE + +#define CFG_INTRAM_BASE 0x24000000 +#define CFG_INTRAM_SIZE 0x8000 + +#define CFG_SDRAM_BASE 0x10000000 + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 65536 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE) + +#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) + +#define CFG_MALLOC_LEN (256*1024) +#define CFG_MALLOC_END \ + ({ \ + DECLARE_GLOBAL_DATA_PTR; \ + CFG_SDRAM_BASE + gd->sdram_size; \ + }) +#define CFG_MALLOC_START (CFG_MALLOC_END - CFG_MALLOC_LEN) + +#define CFG_DMA_ALLOC_LEN (16384) + +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00400000) +#define CFG_BOOTPARAMS_LEN (16 * 1024) + +/* Other configuration settings that shouldn't have to change all that often */ +#define CFG_PROMPT "Uboot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 + +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x1f00000) + +#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } + +#endif /* __CONFIG_H */ diff -Nur old/u-boot-avr32/MAKEALL new/u-boot-avr32/MAKEALL --- old/u-boot-avr32/MAKEALL 2008-03-14 14:40:29.000000000 +0100 +++ new/u-boot-avr32/MAKEALL 2008-03-14 16:00:44.000000000 +0100 @@ -676,6 +676,7 @@ atstk1003 \ atstk1004 \ atngw100 \ + hammerhead \ "
######################################################################### diff -Nur old/u-boot-avr32/Makefile new/u-boot-avr32/Makefile --- old/u-boot-avr32/Makefile 2008-03-14 14:40:29.000000000 +0100 +++ new/u-boot-avr32/Makefile 2008-03-14 14:14:06.000000000 +0100 @@ -2813,6 +2813,9 @@ atngw100_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
+hammerhead_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap hammerhead miromico at32ap700x + ######################################################################### ######################################################################### ######################################################################### diff -Nur old/u-boot-avr32/net/eth.c new/u-boot-avr32/net/eth.c --- old/u-boot-avr32/net/eth.c 2008-03-14 14:40:32.000000000 +0100 +++ new/u-boot-avr32/net/eth.c 2008-03-14 16:04:58.000000000 +0100 @@ -64,6 +64,7 @@ extern int mcffec_initialize(bd_t*); extern int mcdmafec_initialize(bd_t*); extern int at91cap9_eth_initialize(bd_t *); +extern int board_eth_initialize(bd_t *);
#ifdef CONFIG_API extern void (*push_packet)(volatile void *, int); @@ -288,6 +289,8 @@ at91cap9_eth_initialize(bis); #endif
+ board_eth_initialize(bis); + if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64);
In message 47DA976A.6000309@miromico.ch you wrote:
This patch adds support for our new AVR32 based board.
...
diff -Nur old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c --- old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-14 14:40:30.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-14 15:34:43.000000000 +0100 @@ -142,3 +142,14 @@ gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ } #endif
+#ifdef CONFIG_HAMMERHEAD +/*
- Hammerhead board uses GCLK3 (Periph A on PB29) as 25MHz clock output
- for ethernet PHY.
- */
+void gpio_enable_gclk3(void) +{
gpio_select_periph_A(GPIO_PIN_PB29, 0); /* GCLK3 */
^^^^^^^^^^
Indentation not by TAB.
--- old/u-boot-avr32/net/eth.c 2008-03-14 14:40:32.000000000 +0100 +++ new/u-boot-avr32/net/eth.c 2008-03-14 16:04:58.000000000 +0100 @@ -64,6 +64,7 @@ extern int mcffec_initialize(bd_t*); extern int mcdmafec_initialize(bd_t*); extern int at91cap9_eth_initialize(bd_t *); +extern int board_eth_initialize(bd_t *);
#ifdef CONFIG_API extern void (*push_packet)(volatile void *, int); @@ -288,6 +289,8 @@ at91cap9_eth_initialize(bis); #endif
- board_eth_initialize(bis);
Hm... did you really check if other boards still build? Did you run the MAKEALL script?
Best regards,
Wolfgang Denk
Hi
Sorry, as you might have guessed I did not run MAKEALL to check my patch :-( Worse, It would have broken existing code... Sorry again.
I try to avoid such things in future.
I corrected the patch. I tried to run MAKEALL, but it fails, as I don't have all those cross-compilers installed. Am I missing something? Do I need to install them, or what is the correct procedure?
So instead of MAKEALL I compiled a few targets by hand.
Alex
diff -Naur old/u-boot-avr32/board/miromico/hammerhead/eth.c new/u-boot-avr32/board/miromico/hammerhead/eth.c --- old/u-boot-avr32/board/miromico/hammerhead/eth.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/eth.c 2008-03-14 16:06:35.000000000 +0100 @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2008 Miromico AG + * + * Ethernet initialization for the Miromico Hammerhead AVR32 board + * + * Mostly copied form Atmel ATNGW100 sources + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/arch/memory-map.h> + +extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); + +#ifdef CONFIG_CMD_NET +void board_eth_initialize(bd_t *bi) +{ + macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]); +} +#endif diff -Naur old/u-boot-avr32/board/miromico/hammerhead/hammerhead.c new/u-boot-avr32/board/miromico/hammerhead/hammerhead.c --- old/u-boot-avr32/board/miromico/hammerhead/hammerhead.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/hammerhead.c 2008-03-14 15:34:22.000000000 +0100 @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2008 Miromico AG + * + * Mostly copied form atmel ATNGW100 sources + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/io.h> +#include <asm/sdram.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hmatrix2.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct sdram_info sdram = { + .phys_addr = CFG_SDRAM_BASE, + .row_bits = 13, + .col_bits = 9, + .bank_bits = 2, + .cas = 3, + .twr = 2, + .trc = 7, + .trp = 2, + .trcd = 2, + .tras = 5, + .txsr = 5, + /* 7.81 us */ + .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, +}; + +int board_early_init_f(void) +{ + /* Set the SDRAM_ENABLE bit in the HEBI SFR */ + hmatrix2_writel(SFR4, 1 << 1); + + gpio_enable_ebi(); + gpio_enable_usart1(); + +#if defined(CONFIG_MACB) + gpio_enable_macb0(); +#endif +#if defined(CONFIG_MMC) + gpio_enable_mmci(); +#endif + + /* Select GCLK3 peripheral function. We'll need it as clock output + * for ethernet PHY. */ + gpio_enable_gclk3(); + return 0; +} + +long int initdram(int board_type) +{ + return sdram_init(&sdram); +} + +void board_init_info(void) +{ + gd->bd->bi_phy_id[0] = 0x01; +} diff -Naur old/u-boot-avr32/board/miromico/hammerhead/Makefile new/u-boot-avr32/board/miromico/hammerhead/Makefile --- old/u-boot-avr32/board/miromico/hammerhead/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/Makefile 2008-03-14 14:53:46.000000000 +0100 @@ -0,0 +1,40 @@ +# +# Copyright (C) 2008 Miromico AG +# +# See file CREDITS for list of people who contributed to this project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o eth.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff -Naur old/u-boot-avr32/board/miromico/hammerhead/u-boot.lds new/u-boot-avr32/board/miromico/hammerhead/u-boot.lds --- old/u-boot-avr32/board/miromico/hammerhead/u-boot.lds 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/u-boot.lds 2008-03-14 14:57:37.000000000 +0100 @@ -0,0 +1,80 @@ +/* -*- Fundamental -*- + * + * Copyright (C) 2008 Miromico AG + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") +OUTPUT_ARCH(avr32) +ENTRY(_start) + +SECTIONS +{ + . = 0; + _text = .; + .text : { + *(.text) + *(.text.*) + } + + . = ALIGN(32); + __flashprog_start = .; + .flashprog : { + *(.flashprog) + } + . = ALIGN(32); + __flashprog_end = .; + _etext = .; + + .rodata : { + *(.rodata) + *(.rodata.*) + } + + . = ALIGN(8); + _data = .; + .data : { + *(.data) + *(.data.*) + } + + . = ALIGN(4); + __u_boot_cmd_start = .; + .u_boot_cmd : { + KEEP(*(.u_boot_cmd)) + } + __u_boot_cmd_end = .; + + . = ALIGN(4); + _got = .; + .got : { + *(.got) + } + _egot = .; + + . = ALIGN(8); + _edata = .; + + .bss : { + *(.bss) + *(.bss.*) + } + . = ALIGN(8); + _end = .; +} diff -Naur old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c --- old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-17 10:23:49.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-17 10:10:37.000000000 +0100 @@ -142,3 +142,14 @@ gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ } #endif + +#ifdef CONFIG_HAMMERHEAD +/* + * Hammerhead board uses GCLK3 (Periph A on PB29) as 25MHz clock output + * for ethernet PHY. + */ +void gpio_enable_gclk3(void) +{ + gpio_select_periph_A(GPIO_PIN_PB29, 0); /* GCLK3 */ +} +#endif diff -Naur old/u-boot-avr32/cpu/at32ap/cpu.c new/u-boot-avr32/cpu/at32ap/cpu.c --- old/u-boot-avr32/cpu/at32ap/cpu.c 2008-03-17 10:23:49.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/cpu.c 2008-03-14 15:43:09.000000000 +0100 @@ -81,6 +81,16 @@ #endif }
+#ifdef CONFIG_HAMMERHEAD +static void gclk_init(void) +{ + /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */ + + /* Enable GCLK3 with no input divider, from OSC0 (crystal) */ + sm_writel( PM_GCCTRL3, SM_BIT(CEN) ); +} +#endif + int cpu_init(void) { extern void _evba(void); @@ -105,6 +115,10 @@ p += CFG_ICACHE_LINESZ) asm volatile("cache %0, 0x02" : "=m"(*p) :: "memory");
+#ifdef CONFIG_HAMMERHEAD + gclk_init(); +#endif + return 0; }
diff -Naur old/u-boot-avr32/cpu/at32ap/sm.h new/u-boot-avr32/cpu/at32ap/sm.h --- old/u-boot-avr32/cpu/at32ap/sm.h 2008-03-17 10:23:49.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/sm.h 2008-03-14 15:51:10.000000000 +0100 @@ -21,7 +21,16 @@ #define SM_PM_IMR 0x0048 #define SM_PM_ISR 0x004c #define SM_PM_ICR 0x0050 -#define SM_PM_GCCTRL 0x0060 + +#define SM_PM_GCCTRL0 0x0060 +#define SM_PM_GCCTRL1 0x0064 +#define SM_PM_GCCTRL2 0x0068 +#define SM_PM_GCCTRL3 0x006c +#define SM_PM_GCCTRL4 0x0070 +#define SM_PM_GCCTRL5 0x0074 +#define SM_PM_GCCTRL6 0x0078 +#define SM_PM_GCCTRL7 0x007c + #define SM_RTC_CTRL 0x0080 #define SM_RTC_VAL 0x0084 #define SM_RTC_TOP 0x0088 diff -Naur old/u-boot-avr32/include/asm-avr32/arch-at32ap700x/gpio.h new/u-boot-avr32/include/asm-avr32/arch-at32ap700x/gpio.h --- old/u-boot-avr32/include/asm-avr32/arch-at32ap700x/gpio.h 2008-03-17 10:23:49.000000000 +0100 +++ new/u-boot-avr32/include/asm-avr32/arch-at32ap700x/gpio.h 2008-03-14 14:11:03.000000000 +0100 @@ -217,4 +217,8 @@ void gpio_enable_mmci(void); #endif
+#ifdef CONFIG_HAMMERHEAD +void gpio_enable_gclk3(void); +#endif + #endif /* __ASM_AVR32_ARCH_GPIO_H__ */ diff -Naur old/u-boot-avr32/include/configs/hammerhead.h new/u-boot-avr32/include/configs/hammerhead.h --- old/u-boot-avr32/include/configs/hammerhead.h 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/include/configs/hammerhead.h 2008-03-14 15:03:56.000000000 +0100 @@ -0,0 +1,177 @@ +/* + * Copyright (C) 2008 Miromico AG + * + * Configuration settings for the Miromico Hammerhead AVR32 board + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_AVR32 1 +#define CONFIG_AT32AP 1 +#define CONFIG_AT32AP7000 1 +#define CONFIG_HAMMERHEAD 1 + +#define CFG_HZ 1000 + +/* + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency + * and the PBA bus to run at 1/4 the PLL frequency. + */ +#define CONFIG_PLL 1 +#define CFG_POWER_MANAGER 1 +#define CFG_OSC0_HZ 25000000 /* 25MHz crystal */ +#define CFG_PLL0_DIV 1 +#define CFG_PLL0_MUL 5 +#define CFG_PLL0_SUPPRESS_CYCLES 16 +#define CFG_CLKDIV_CPU 0 +#define CFG_CLKDIV_HSB 1 +#define CFG_CLKDIV_PBA 2 +#define CFG_CLKDIV_PBB 1 + +/* + * The PLLOPT register controls the PLL like this: + * icp = PLLOPT<2> + * ivco = PLLOPT<1:0> + * + * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). + */ +#define CFG_PLL0_OPT 0x04 + +#define CONFIG_USART1 1 + +/* User serviceable stuff */ +#define CONFIG_DOS_PARTITION 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_STACKSIZE (2048) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS \ + "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND \ + "fsload; bootm" + +/* + * Only interrupt autoboot if <space> is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_AUTOBOOT 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_DELAY_STR "d" +#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * After booting the board for the first time, new ethernet address + * should be generated and assigned to the environment variables + * "ethaddr". This is normally done during production. + */ +#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 +#define CONFIG_NET_MULTI 1 + +/* + * BOOTP/DHCP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY + +#define CONFIG_DOS_PARTITION 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MMC +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR + +#define CONFIG_ATMEL_USART 1 +#define CONFIG_MACB 1 +#define CONFIG_PIO2 1 +#define CFG_NR_PIOS 5 +#define CFG_HSDRAMC 1 +#define CONFIG_MMC 1 + +#define CFG_DCACHE_LINESZ 32 +#define CFG_ICACHE_LINESZ 32 + +#define CONFIG_NR_DRAM_BANKS 1 + +#define CFG_FLASH_CFI 1 +#define CFG_FLASH_CFI_DRIVER 1 + +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x800000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 135 + +#define CFG_MONITOR_BASE CFG_FLASH_BASE + +#define CFG_INTRAM_BASE 0x24000000 +#define CFG_INTRAM_SIZE 0x8000 + +#define CFG_SDRAM_BASE 0x10000000 + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 65536 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE) + +#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) + +#define CFG_MALLOC_LEN (256*1024) +#define CFG_MALLOC_END \ + ({ \ + DECLARE_GLOBAL_DATA_PTR; \ + CFG_SDRAM_BASE + gd->sdram_size; \ + }) +#define CFG_MALLOC_START (CFG_MALLOC_END - CFG_MALLOC_LEN) + +#define CFG_DMA_ALLOC_LEN (16384) + +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00400000) +#define CFG_BOOTPARAMS_LEN (16 * 1024) + +/* Other configuration settings that shouldn't have to change all that often */ +#define CFG_PROMPT "Uboot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 + +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x1f00000) + +#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } + +#endif /* __CONFIG_H */ diff -Naur old/u-boot-avr32/MAKEALL new/u-boot-avr32/MAKEALL --- old/u-boot-avr32/MAKEALL 2008-03-17 10:23:47.000000000 +0100 +++ new/u-boot-avr32/MAKEALL 2008-03-17 10:15:04.000000000 +0100 @@ -676,6 +676,7 @@ atstk1003 \ atstk1004 \ atngw100 \ + hammerhead \ "
######################################################################### diff -Naur old/u-boot-avr32/Makefile new/u-boot-avr32/Makefile --- old/u-boot-avr32/Makefile 2008-03-17 10:23:47.000000000 +0100 +++ new/u-boot-avr32/Makefile 2008-03-14 14:14:06.000000000 +0100 @@ -2813,6 +2813,9 @@ atngw100_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
+hammerhead_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap hammerhead miromico at32ap700x + ######################################################################### ######################################################################### ######################################################################### diff -Naur old/u-boot-avr32/net/eth.c new/u-boot-avr32/net/eth.c --- old/u-boot-avr32/net/eth.c 2008-03-17 10:23:50.000000000 +0100 +++ new/u-boot-avr32/net/eth.c 2008-03-17 10:11:33.000000000 +0100 @@ -64,6 +64,7 @@ extern int mcffec_initialize(bd_t*); extern int mcdmafec_initialize(bd_t*); extern int at91cap9_eth_initialize(bd_t *); +extern int board_eth_initialize(bd_t *);
#ifdef CONFIG_API extern void (*push_packet)(volatile void *, int); @@ -287,6 +288,9 @@ #if defined(CONFIG_AT91CAP9) at91cap9_eth_initialize(bis); #endif +#if defined(CONFIG_HAMMERHEAD) + board_eth_initialize(bis); +#endif
if (!eth_devices) { puts ("No ethernet found.\n");
On 11:31 Mon 17 Mar , Alex wrote:
Hi
Sorry, as you might have guessed I did not run MAKEALL to check my patch :-( Worse, It would have broken existing code... Sorry again.
I try to avoid such things in future.
I corrected the patch. I tried to run MAKEALL, but it fails, as I don't have all those cross-compilers installed. Am I missing something? Do I need to install them, or what is the correct procedure?
So instead of MAKEALL I compiled a few targets by hand.
Alex
diff -Naur old/u-boot-avr32/board/miromico/hammerhead/eth.c new/u-boot-avr32/board/miromico/hammerhead/eth.c --- old/u-boot-avr32/board/miromico/hammerhead/eth.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/eth.c 2008-03-14 16:06:35.000000000 +0100 @@ -0,0 +1,37 @@ +/*
- Copyright (C) 2008 Miromico AG
- Ethernet initialization for the Miromico Hammerhead AVR32 board
- Mostly copied form Atmel ATNGW100 sources
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h>
+#include <asm/arch/memory-map.h>
+extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
+#ifdef CONFIG_CMD_NET
Please move this to the Makefile
+void board_eth_initialize(bd_t *bi) +{
- macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
+} +#endif diff -Naur old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c --- old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-17 10:23:49.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-17 10:10:37.000000000 +0100 @@ -142,3 +142,14 @@ gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ } #endif
+#ifdef CONFIG_HAMMERHEAD +/*
- Hammerhead board uses GCLK3 (Periph A on PB29) as 25MHz clock output
- for ethernet PHY.
- */
+void gpio_enable_gclk3(void) +{
- gpio_select_periph_A(GPIO_PIN_PB29, 0); /* GCLK3 */
+} +#endif
I'll prefer a weak function
diff -Naur old/u-boot-avr32/cpu/at32ap/cpu.c new/u-boot-avr32/cpu/at32ap/cpu.c --- old/u-boot-avr32/cpu/at32ap/cpu.c 2008-03-17 10:23:49.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/cpu.c 2008-03-14 15:43:09.000000000 +0100 @@ -81,6 +81,16 @@ #endif }
+#ifdef CONFIG_HAMMERHEAD +static void gclk_init(void)
same I'll prefer a weak function
+{
- /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */
- /* Enable GCLK3 with no input divider, from OSC0 (crystal) */
- sm_writel( PM_GCCTRL3, SM_BIT(CEN) );
+} +#endif
Best Regards, J.
Hi Alex,
Please see below for some (delayed) review comments.
On Mon, 17 Mar 2008 11:31:42 +0100 Alex mailinglist@miromico.ch wrote:
I corrected the patch. I tried to run MAKEALL, but it fails, as I don't have all those cross-compilers installed. Am I missing something? Do I need to install them, or what is the correct procedure?
You can run MAKEALL for one particular architecture by doing
CROSS_COMPILE=<target>- ./MAKEALL <arch>
where <arch> can be a major architecture (e.g. ppc, arm, etc.) or a subarchitecture/platform (e.g. 4xx, ARM9, etc.)
diff -Naur old/u-boot-avr32/board/miromico/hammerhead/eth.c new/u-boot-avr32/board/miromico/hammerhead/eth.c --- old/u-boot-avr32/board/miromico/hammerhead/eth.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/eth.c 2008-03-14 16:06:35.000000000 +0100
+extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
Hrm...we should really move this to a separate header, but let's wait until the current discussions reach some sort of conclusion.
+#ifdef CONFIG_CMD_NET +void board_eth_initialize(bd_t *bi) +{
- macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
+} +#endif diff -Naur old/u-boot-avr32/board/miromico/hammerhead/hammerhead.c new/u-boot-avr32/board/miromico/hammerhead/hammerhead.c --- old/u-boot-avr32/board/miromico/hammerhead/hammerhead.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/hammerhead.c 2008-03-14 15:34:22.000000000 +0100
- /* Select GCLK3 peripheral function. We'll need it as clock output
* for ethernet PHY. */
There's a bit of whitespace damage here and there, as others have pointed out.
+void board_init_info(void) +{
- gd->bd->bi_phy_id[0] = 0x01;
+}
We should probably get rid of this function. Don't worry about it for now though.
diff -Naur old/u-boot-avr32/board/miromico/hammerhead/u-boot.lds new/u-boot-avr32/board/miromico/hammerhead/u-boot.lds --- old/u-boot-avr32/board/miromico/hammerhead/u-boot.lds 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/u-boot.lds 2008-03-14 14:57:37.000000000 +0100
- . = ALIGN(32);
- __flashprog_start = .;
- .flashprog : {
*(.flashprog)- }
- . = ALIGN(32);
- __flashprog_end = .;
I don't think this block is needed since you're using the CFI flash driver. It should probably be culled from the ATNGW100 linker script too.
diff -Naur old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c --- old/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-17 10:23:49.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/at32ap700x/gpio.c 2008-03-17 10:10:37.000000000 +0100 @@ -142,3 +142,14 @@ gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ } #endif
+#ifdef CONFIG_HAMMERHEAD +/*
- Hammerhead board uses GCLK3 (Periph A on PB29) as 25MHz clock output
- for ethernet PHY.
- */
+void gpio_enable_gclk3(void) +{
- gpio_select_periph_A(GPIO_PIN_PB29, 0); /* GCLK3 */
+} +#endif
Please drop the #ifdef. --gc-sections will take care of it.
diff -Naur old/u-boot-avr32/cpu/at32ap/cpu.c new/u-boot-avr32/cpu/at32ap/cpu.c --- old/u-boot-avr32/cpu/at32ap/cpu.c 2008-03-17 10:23:49.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/cpu.c 2008-03-14 15:43:09.000000000 +0100 @@ -81,6 +81,16 @@ #endif }
+#ifdef CONFIG_HAMMERHEAD +static void gclk_init(void) +{
- /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */
- /* Enable GCLK3 with no input divider, from OSC0 (crystal) */
- sm_writel( PM_GCCTRL3, SM_BIT(CEN) );
+} +#endif
Hmm...could you turn it into something more generic, like
void gclk_enable(unsigned int id)
and call it from the board code? Then you could get rid of the #ifdefs and let --gc-sections remove it if it turns out to be unused.
@@ -105,6 +115,10 @@ p += CFG_ICACHE_LINESZ) asm volatile("cache %0, 0x02" : "=m"(*p) :: "memory");
Hmm...another piece of code we can get rid of. This is unrelated to your patch though.
+#ifdef CONFIG_HAMMERHEAD
- gclk_init();
+#endif
Please remove this if you follow my suggestion above.
diff -Naur old/u-boot-avr32/cpu/at32ap/sm.h new/u-boot-avr32/cpu/at32ap/sm.h --- old/u-boot-avr32/cpu/at32ap/sm.h 2008-03-17 10:23:49.000000000 +0100 +++ new/u-boot-avr32/cpu/at32ap/sm.h 2008-03-14 15:51:10.000000000 +0100 @@ -21,7 +21,16 @@ #define SM_PM_IMR 0x0048 #define SM_PM_ISR 0x004c #define SM_PM_ICR 0x0050 -#define SM_PM_GCCTRL 0x0060
+#define SM_PM_GCCTRL0 0x0060 +#define SM_PM_GCCTRL1 0x0064 +#define SM_PM_GCCTRL2 0x0068 +#define SM_PM_GCCTRL3 0x006c +#define SM_PM_GCCTRL4 0x0070 +#define SM_PM_GCCTRL5 0x0074 +#define SM_PM_GCCTRL6 0x0078 +#define SM_PM_GCCTRL7 0x007c
Why not
#define SM_PM_GCCTRL(x) (0x0060 + 4 * (x))
perhaps as a separate patch?
diff -Naur old/u-boot-avr32/net/eth.c new/u-boot-avr32/net/eth.c --- old/u-boot-avr32/net/eth.c 2008-03-17 10:23:50.000000000 +0100 +++ new/u-boot-avr32/net/eth.c 2008-03-17 10:11:33.000000000 +0100 @@ -64,6 +64,7 @@ extern int mcffec_initialize(bd_t*); extern int mcdmafec_initialize(bd_t*); extern int at91cap9_eth_initialize(bd_t *); +extern int board_eth_initialize(bd_t *);
#ifdef CONFIG_API extern void (*push_packet)(volatile void *, int); @@ -287,6 +288,9 @@ #if defined(CONFIG_AT91CAP9) at91cap9_eth_initialize(bis); #endif +#if defined(CONFIG_HAMMERHEAD)
- board_eth_initialize(bis);
+#endif
We probably want something more generic-sounding like CONFIG_HAS_BOARD_ETH_INITIALIZE so that boards can migrate over to the new API one by one. But I'll leave it to Ben to decide how to do this.
Haavard
Hi Alex,
Alex wrote:
Hi
Sorry, as you might have guessed I did not run MAKEALL to check my patch :-( Worse, It would have broken existing code... Sorry again.
I try to avoid such things in future.
I corrected the patch. I tried to run MAKEALL, but it fails, as I don't have all those cross-compilers installed. Am I missing something? Do I need to install them, or what is the correct procedure?
So instead of MAKEALL I compiled a few targets by hand.
Alex
diff -Naur old/u-boot-avr32/board/miromico/hammerhead/eth.c new/u-boot-avr32/board/miromico/hammerhead/eth.c --- old/u-boot-avr32/board/miromico/hammerhead/eth.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-avr32/board/miromico/hammerhead/eth.c 2008-03-14 16:06:35.000000000 +0100 @@ -0,0 +1,37 @@ +/*
- Copyright (C) 2008 Miromico AG
- Ethernet initialization for the Miromico Hammerhead AVR32 board
- Mostly copied form Atmel ATNGW100 sources
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h>
+#include <asm/arch/memory-map.h>
+extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
+#ifdef CONFIG_CMD_NET +void board_eth_initialize(bd_t *bi) +{
- macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
+} +#endif
I don't know the overall status of this patch set, but if you change the name of this function to board_eth_init(bd_t *bi), you won't need to touch /net/eth.c. Sorry for the churn... <snip>
diff -Naur old/u-boot-avr32/net/eth.c new/u-boot-avr32/net/eth.c --- old/u-boot-avr32/net/eth.c 2008-03-17 10:23:50.000000000 +0100 +++ new/u-boot-avr32/net/eth.c 2008-03-17 10:11:33.000000000 +0100 @@ -64,6 +64,7 @@ extern int mcffec_initialize(bd_t*); extern int mcdmafec_initialize(bd_t*); extern int at91cap9_eth_initialize(bd_t *); +extern int board_eth_initialize(bd_t *);
#ifdef CONFIG_API extern void (*push_packet)(volatile void *, int); @@ -287,6 +288,9 @@ #if defined(CONFIG_AT91CAP9) at91cap9_eth_initialize(bis); #endif +#if defined(CONFIG_HAMMERHEAD)
- board_eth_initialize(bis);
+#endif
if (!eth_devices) { puts ("No ethernet found.\n");
I have a patch that will be submitted tomorrow that puts a call to board_eth_init() here, so you don't need to. If this is already in the AVR32 repo no big deal.
regards, Ben
On Sun, 30 Mar 2008 19:41:52 -0400 Ben Warren bwarren@qstreams.com wrote:
I have a patch that will be submitted tomorrow that puts a call to board_eth_init() here, so you don't need to. If this is already in the AVR32 repo no big deal.
FWIW, it's not in the AVR32 repo yet. I think the patch needs another spin to address the comments that came up.
That said, I'm totally out of sync with most mailing lists right now, so if a newer version was posted without me in the Cc list, I haven't noticed it yet.
Haavard
participants (5)
-
Alex -
Ben Warren -
Haavard Skinnemoen -
Jean-Christophe PLAGNIOL-VILLARD -
Wolfgang Denk